--- /dev/null
+//*****************************************************************************\r
+//\r
+// startup_gcc.c - Startup code for use with GNU tools.\r
+//\r
+// Copyright (c) 2009 Luminary Micro, Inc. All rights reserved.\r
+// Software License Agreement\r
+// \r
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
+// exclusively on LMI's microcontroller products.\r
+// \r
+// The software is owned by LMI and/or its suppliers, and is protected under\r
+// applicable copyright laws. All rights are reserved. You may not combine\r
+// this software with "viral" open-source software in order to form a larger\r
+// program. Any use in violation of the foregoing restrictions may subject\r
+// the user to criminal sanctions under applicable laws, as well as to civil\r
+// liability for the breach of the terms and conditions of this license.\r
+// \r
+// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+// \r
+// This is part of revision 32 of the Stellaris CMSIS Package.\r
+//\r
+//*****************************************************************************\r
+\r
+#define WEAK __attribute__ ((weak))\r
+\r
+//*****************************************************************************\r
+//\r
+// Forward declaration of the default fault handlers.\r
+//\r
+//*****************************************************************************\r
+void WEAK Reset_Handler(void);\r
+static void Default_Handler(void);\r
+void WEAK NMI_Handler(void);\r
+void WEAK HardFault_Handler(void);\r
+void WEAK MemManage_Handler(void);\r
+void WEAK BusFault_Handler(void);\r
+void WEAK UsageFault_Handler(void);\r
+void WEAK MemManage_Handler(void);\r
+void WEAK SVC_Handler(void);\r
+void WEAK DebugMon_Handler(void);\r
+void WEAK PendSV_Handler(void);\r
+void WEAK SysTick_Handler(void);\r
+void WEAK GPIOPortA_IRQHandler(void);\r
+void WEAK GPIOPortB_IRQHandler(void);\r
+void WEAK GPIOPortC_IRQHandler(void);\r
+void WEAK GPIOPortD_IRQHandler(void);\r
+void WEAK GPIOPortE_IRQHandler(void);\r
+void WEAK UART0_IRQHandler(void);\r
+void WEAK UART1_IRQHandler(void);\r
+void WEAK SSI0_IRQHandler(void);\r
+void WEAK I2C0_IRQHandler(void);\r
+void WEAK PWMFault_IRQHandler(void);\r
+void WEAK PWMGen0_IRQHandler(void);\r
+void WEAK PWMGen1_IRQHandler(void);\r
+void WEAK PWMGen2_IRQHandler(void);\r
+void WEAK QEI0_IRQHandler(void);\r
+void WEAK ADCSeq0_IRQHandler(void);\r
+void WEAK ADCSeq1_IRQHandler(void);\r
+void WEAK ADCSeq2_IRQHandler(void);\r
+void WEAK ADCSeq3_IRQHandler(void);\r
+void WEAK Watchdog_IRQHandler(void);\r
+void WEAK Timer0A_IRQHandler(void);\r
+void WEAK Timer0B_IRQHandler(void);\r
+void WEAK Timer1A_IRQHandler(void);\r
+void WEAK Timer1B_IRQHandler(void);\r
+void WEAK Timer2A_IRQHandler(void);\r
+void WEAK Timer2B_IRQHandler(void);\r
+void WEAK Comp0_IRQHandler(void);\r
+void WEAK Comp1_IRQHandler(void);\r
+void WEAK Comp2_IRQHandler(void);\r
+void WEAK SysCtrl_IRQHandler(void);\r
+void WEAK FlashCtrl_IRQHandler(void);\r
+void WEAK GPIOPortF_IRQHandler(void);\r
+void WEAK GPIOPortG_IRQHandler(void);\r
+void WEAK GPIOPortH_IRQHandler(void);\r
+void WEAK UART2_IRQHandler(void);\r
+void WEAK SSI1_IRQHandler(void);\r
+void WEAK Timer3A_IRQHandler(void);\r
+void WEAK Timer3B_IRQHandler(void);\r
+void WEAK I2C1_IRQHandler(void);\r
+void WEAK QEI1_IRQHandler(void);\r
+void WEAK CAN0_IRQHandler(void);\r
+void WEAK CAN1_IRQHandler(void);\r
+void WEAK CAN2_IRQHandler(void);\r
+void WEAK Ethernet_IRQHandler(void);\r
+void WEAK Hibernate_IRQHandler(void);\r
+\r
+//*****************************************************************************\r
+//\r
+// The entry point for the application.\r
+//\r
+//*****************************************************************************\r
+extern int main(void);\r
+\r
+//*****************************************************************************\r
+//\r
+// Reserve space for the system stack.\r
+//\r
+//*****************************************************************************\r
+static unsigned long pulStack[64];\r
+\r
+//*****************************************************************************\r
+//\r
+// The vector table. Note that the proper constructs must be placed on this to\r
+// ensure that it ends up at physical address 0x0000.0000.\r
+//\r
+//*****************************************************************************\r
+__attribute__ ((section(".isr_vector")))\r
+void (* const g_pfnVectors[])(void) =\r
+{\r
+ (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)),\r
+ // The initial stack pointer\r
+ Reset_Handler, // The reset handler\r
+ NMI_Handler, // The NMI handler\r
+ HardFault_Handler, // The hard fault handler\r
+ MemManage_Handler, // The MPU fault handler\r
+ BusFault_Handler, // The bus fault handler\r
+ UsageFault_Handler, // The usage fault handler\r
+ 0xefff9d6e, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ 0, // Reserved\r
+ SVC_Handler, // SVCall handler\r
+ DebugMon_Handler, // Debug monitor handler\r
+ 0, // Reserved\r
+ PendSV_Handler, // The PendSV handler\r
+ SysTick_Handler, // The SysTick handler\r
+\r
+ //\r
+ // External Interrupts\r
+ //\r
+ GPIOPortA_IRQHandler, // GPIO Port A\r
+ GPIOPortB_IRQHandler, // GPIO Port B\r
+ GPIOPortC_IRQHandler, // GPIO Port C\r
+ GPIOPortD_IRQHandler, // GPIO Port D\r
+ GPIOPortE_IRQHandler, // GPIO Port E\r
+ UART0_IRQHandler, // UART0 Rx and Tx\r
+ UART1_IRQHandler, // UART1 Rx and Tx\r
+ SSI0_IRQHandler, // SSI0 Rx and Tx\r
+ I2C0_IRQHandler, // I2C0 Master and Slave\r
+ PWMFault_IRQHandler, // PWM Fault\r
+ PWMGen0_IRQHandler, // PWM Generator 0\r
+ PWMGen1_IRQHandler, // PWM Generator 1\r
+ PWMGen2_IRQHandler, // PWM Generator 2\r
+ QEI0_IRQHandler, // Quadrature Encoder 0\r
+ ADCSeq0_IRQHandler, // ADC Sequence 0\r
+ ADCSeq1_IRQHandler, // ADC Sequence 1\r
+ ADCSeq2_IRQHandler, // ADC Sequence 2\r
+ ADCSeq3_IRQHandler, // ADC Sequence 3\r
+ Watchdog_IRQHandler, // Watchdog timer\r
+ Timer0A_IRQHandler, // Timer 0 subtimer A\r
+ Timer0B_IRQHandler, // Timer 0 subtimer B\r
+ Timer1A_IRQHandler, // Timer 1 subtimer A\r
+ Timer1B_IRQHandler, // Timer 1 subtimer B\r
+ Timer2A_IRQHandler, // Timer 2 subtimer A\r
+ Timer2B_IRQHandler, // Timer 2 subtimer B\r
+ Comp0_IRQHandler, // Analog Comparator 0\r
+ Comp1_IRQHandler, // Analog Comparator 1\r
+ Comp2_IRQHandler, // Analog Comparator 2\r
+ SysCtrl_IRQHandler, // System Control (PLL, OSC, BO)\r
+ FlashCtrl_IRQHandler, // FLASH Control\r
+ GPIOPortF_IRQHandler, // GPIO Port F\r
+ GPIOPortG_IRQHandler, // GPIO Port G\r
+ GPIOPortH_IRQHandler, // GPIO Port H\r
+ UART2_IRQHandler, // UART2 Rx and Tx\r
+ SSI1_IRQHandler, // SSI1 Rx and Tx\r
+ Timer3A_IRQHandler, // Timer 3 subtimer A\r
+ Timer3B_IRQHandler, // Timer 3 subtimer B\r
+ I2C1_IRQHandler, // I2C1 Master and Slave\r
+ QEI1_IRQHandler, // Quadrature Encoder 1\r
+ CAN0_IRQHandler, // CAN0\r
+ CAN1_IRQHandler, // CAN1\r
+ CAN2_IRQHandler, // CAN2\r
+ Ethernet_IRQHandler, // Ethernet\r
+ Hibernate_IRQHandler // Hibernate\r
+};\r
+\r
+//*****************************************************************************\r
+//\r
+// The following are constructs created by the linker, indicating where the\r
+// the "data" and "bss" segments reside in memory. The initializers for the\r
+// for the "data" segment resides immediately following the "text" segment.\r
+//\r
+//*****************************************************************************\r
+extern unsigned long _etext;\r
+extern unsigned long _sdata;\r
+extern unsigned long _edata;\r
+extern unsigned long _sbss;\r
+extern unsigned long _ebss;\r
+\r
+//*****************************************************************************\r
+//\r
+// This is the code that gets called when the processor first starts execution\r
+// following a reset event. Only the absolutely necessary set is performed,\r
+// after which the application supplied entry() routine is called. Any fancy\r
+// actions (such as making decisions based on the reset cause register, and\r
+// resetting the bits in that register) are left solely in the hands of the\r
+// application.\r
+//\r
+//*****************************************************************************\r
+void\r
+Reset_Handler(void)\r
+{\r
+ unsigned long *pulSrc, *pulDest;\r
+\r
+ //\r
+ // Copy the data segment initializers from flash to SRAM.\r
+ //\r
+ pulSrc = &_etext;\r
+ for(pulDest = &_sdata; pulDest < &_edata; )\r
+ {\r
+ *pulDest++ = *pulSrc++;\r
+ }\r
+\r
+ //\r
+ // Zero fill the bss segment. This is done with inline assembly since this\r
+ // will clear the value of pulDest if it is not kept in a register.\r
+ //\r
+ __asm(" ldr r0, =_sbss\n"\r
+ " ldr r1, =_ebss\n"\r
+ " mov r2, #0\n"\r
+ " .thumb_func\n"\r
+ "zero_loop:\n"\r
+ " cmp r0, r1\n"\r
+ " it lt\n"\r
+ " strlt r2, [r0], #4\n"\r
+ " blt zero_loop");\r
+\r
+ //\r
+ // Call the application's entry point.\r
+ //\r
+ main();\r
+}\r
+\r
+//*****************************************************************************\r
+//\r
+// Provide weak aliases for each Exception handler to the Default_Handler.\r
+// As they are weak aliases, any function with the same name will override\r
+// this definition.\r
+//\r
+//*****************************************************************************\r
+#pragma weak NMI_Handler = Default_Handler\r
+#pragma weak HardFault_Handler = Default_Handler\r
+#pragma weak MemManage_Handler = Default_Handler\r
+#pragma weak BusFault_Handler = Default_Handler\r
+#pragma weak UsageFault_Handler = Default_Handler\r
+#pragma weak SVC_Handler = Default_Handler\r
+#pragma weak DebugMon_Handler = Default_Handler\r
+#pragma weak PendSV_Handler = Default_Handler\r
+#pragma weak SysTick_Handler = Default_Handler\r
+#pragma weak GPIOPortA_IRQHandler = Default_Handler\r
+#pragma weak GPIOPortB_IRQHandler = Default_Handler\r
+#pragma weak GPIOPortC_IRQHandler = Default_Handler\r
+#pragma weak GPIOPortD_IRQHandler = Default_Handler\r
+#pragma weak GPIOPortE_IRQHandler = Default_Handler\r
+#pragma weak UART0_IRQHandler = Default_Handler\r
+#pragma weak UART1_IRQHandler = Default_Handler\r
+#pragma weak SSI0_IRQHandler = Default_Handler\r
+#pragma weak I2C0_IRQHandler = Default_Handler\r
+#pragma weak PWMFault_IRQHandler = Default_Handler\r
+#pragma weak PWMGen0_IRQHandler = Default_Handler\r
+#pragma weak PWMGen1_IRQHandler = Default_Handler\r
+#pragma weak PWMGen2_IRQHandler = Default_Handler\r
+#pragma weak QEI0_IRQHandler = Default_Handler\r
+#pragma weak ADCSeq0_IRQHandler = Default_Handler\r
+#pragma weak ADCSeq1_IRQHandler = Default_Handler\r
+#pragma weak ADCSeq2_IRQHandler = Default_Handler\r
+#pragma weak ADCSeq3_IRQHandler = Default_Handler\r
+#pragma weak Watchdog_IRQHandler = Default_Handler\r
+#pragma weak Timer0A_IRQHandler = Default_Handler\r
+#pragma weak Timer0B_IRQHandler = Default_Handler\r
+#pragma weak Timer1A_IRQHandler = Default_Handler\r
+#pragma weak Timer1B_IRQHandler = Default_Handler\r
+#pragma weak Timer2A_IRQHandler = Default_Handler\r
+#pragma weak Timer2B_IRQHandler = Default_Handler\r
+#pragma weak Comp0_IRQHandler = Default_Handler\r
+#pragma weak Comp1_IRQHandler = Default_Handler\r
+#pragma weak Comp2_IRQHandler = Default_Handler\r
+#pragma weak SysCtrl_IRQHandler = Default_Handler\r
+#pragma weak FlashCtrl_IRQHandler = Default_Handler\r
+#pragma weak GPIOPortF_IRQHandler = Default_Handler\r
+#pragma weak GPIOPortG_IRQHandler = Default_Handler\r
+#pragma weak GPIOPortH_IRQHandler = Default_Handler\r
+#pragma weak UART2_IRQHandler = Default_Handler\r
+#pragma weak SSI1_IRQHandler = Default_Handler\r
+#pragma weak Timer3A_IRQHandler = Default_Handler\r
+#pragma weak Timer3B_IRQHandler = Default_Handler\r
+#pragma weak I2C1_IRQHandler = Default_Handler\r
+#pragma weak QEI1_IRQHandler = Default_Handler\r
+#pragma weak CAN0_IRQHandler = Default_Handler\r
+#pragma weak CAN1_IRQHandler = Default_Handler\r
+#pragma weak CAN2_IRQHandler = Default_Handler\r
+#pragma weak Ethernet_IRQHandler = Default_Handler\r
+#pragma weak Hibernate_IRQHandler = Default_Handler\r
+\r
+//*****************************************************************************\r
+//\r
+// This is the code that gets called when the processor receives an unexpected\r
+// interrupt. This simply enters an infinite loop, preserving the system state\r
+// for examination by a debugger.\r
+//\r
+//*****************************************************************************\r
+static void\r
+Default_Handler(void)\r
+{\r
+ //\r
+ // Go into an infinite loop.\r
+ //\r
+ while(1)\r
+ {\r
+ }\r
+}\r
git.asbjorn.biz / rapper.git / blobdiff