X-Git-Url: http://git.asbjorn.biz/?p=rapper.git;a=blobdiff_plain;f=src%2Fboards%2Flpc1768%2Fstartup.c;fp=src%2Fboards%2Flpc1768%2Fstartup.c;h=66eab26fce43926026f25f23b4a07080d0d06496;hp=0000000000000000000000000000000000000000;hb=ab3f716f01b5b40ce743fbaa5780e12e448b609c;hpb=2253dc3498d4ace7f07884ec6d40d654ca677571 diff --git a/src/boards/lpc1768/startup.c b/src/boards/lpc1768/startup.c new file mode 100644 index 0000000..66eab26 --- /dev/null +++ b/src/boards/lpc1768/startup.c @@ -0,0 +1,281 @@ +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2009 Luminary Micro, Inc. All rights reserved. +// Software License Agreement +// +// Luminary Micro, Inc. (LMI) is supplying this software for use solely and +// exclusively on LMI's microcontroller products. +// +// The software is owned by LMI and/or its suppliers, and is protected under +// applicable copyright laws. All rights are reserved. You may not combine +// this software with "viral" open-source software in order to form a larger +// program. Any use in violation of the foregoing restrictions may subject +// the user to criminal sanctions under applicable laws, as well as to civil +// liability for the breach of the terms and conditions of this license. +// +// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED +// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF +// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. +// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR +// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 32 of the Stellaris CMSIS Package. +// +//***************************************************************************** + +#define WEAK __attribute__ ((weak)) + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void WEAK Reset_Handler(void); +static void Default_Handler(void); +void WEAK NMI_Handler(void); +void WEAK HardFault_Handler(void); +void WEAK MemManage_Handler(void); +void WEAK BusFault_Handler(void); +void WEAK UsageFault_Handler(void); +void WEAK MemManage_Handler(void); +void WEAK SVC_Handler(void); +void WEAK DebugMon_Handler(void); +void WEAK PendSV_Handler(void); +void WEAK SysTick_Handler(void); + +void WEAK WDT_IRQHandler(void); +void WEAK TIMER0_IRQHandler(void); +void WEAK TIMER1_IRQHandler(void); +void WEAK TIMER2_IRQHandler(void); +void WEAK TIMER3_IRQHandler(void); +void WEAK UART0_IRQHandler(void); +void WEAK UART1_IRQHandler(void); +void WEAK UART2_IRQHandler(void); +void WEAK UART3_IRQHandler(void); +void WEAK PWM1_IRQHandler(void); +void WEAK I2C0_IRQHandler(void); +void WEAK I2C1_IRQHandler(void); +void WEAK I2C2_IRQHandler(void); +void WEAK SPI_IRQHandler(void); +void WEAK SSP0_IRQHandler(void); +void WEAK SSP1_IRQHandler(void); +void WEAK PLL0_IRQHandler(void); +void WEAK RTC_IRQHandler(void); +void WEAK EINT0_IRQHandler(void); +void WEAK EINT1_IRQHandler(void); +void WEAK EINT2_IRQHandler(void); +void WEAK EINT3_IRQHandler(void); +void WEAK ADC_IRQHandler(void); +void WEAK BOD_IRQHandler(void); +void WEAK USB_IRQHandler(void); +void WEAK CAN_IRQHandler(void); +void WEAK DMA_IRQHandler(void); +void WEAK I2S_IRQHandler(void); +void WEAK ENET_IRQHandler(void); +void WEAK RIT_IRQHandler(void); +void WEAK MCPWM_IRQHandler(void); +void WEAK QEI_IRQHandler(void); +void WEAK PLL1_IRQHandler(void); +void WEAK USBActivity_IRQHandler(void); +void WEAK CANActivity_IRQHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + Reset_Handler, // The reset handler + NMI_Handler, // The NMI handler + HardFault_Handler, // The hard fault handler + MemManage_Handler, // The MPU fault handler + BusFault_Handler, // The bus fault handler + UsageFault_Handler, // The usage fault handler + 0xeffffcbf, // Interrupt CRC + 0, // Reserved + 0, // Reserved + 0, // Reserved + SVC_Handler, // SVCall handler + DebugMon_Handler, // Debug monitor handler + 0, // Reserved + PendSV_Handler, // The PendSV handler + SysTick_Handler, // The SysTick handler + + // + // External Interrupts + // + WDT_IRQHandler, /* 16: Watchdog Timer */ + TIMER0_IRQHandler, /* 17: Timer0 */ + TIMER1_IRQHandler, /* 18: Timer1 */ + TIMER2_IRQHandler, /* 19: Timer2 */ + TIMER3_IRQHandler, /* 20: Timer3 */ + UART0_IRQHandler, /* 21: UART0 */ + UART1_IRQHandler, /* 22: UART1 */ + UART2_IRQHandler, /* 23: UART2 */ + UART3_IRQHandler, /* 24: UART3 */ + PWM1_IRQHandler, /* 25: PWM1 */ + I2C0_IRQHandler, /* 26: I2C0 */ + I2C1_IRQHandler, /* 27: I2C1 */ + I2C2_IRQHandler, /* 28: I2C2 */ + SPI_IRQHandler, /* 29: SPI */ + SSP0_IRQHandler, /* 30: SSP0 */ + SSP1_IRQHandler, /* 31: SSP1 */ + PLL0_IRQHandler, /* 32: PLL0 Lock (Main PLL) */ + RTC_IRQHandler, /* 33: Real Time Clock */ + EINT0_IRQHandler, /* 34: External Interrupt 0 */ + EINT1_IRQHandler, /* 35: External Interrupt 1 */ + EINT2_IRQHandler, /* 36: External Interrupt 2 */ + EINT3_IRQHandler, /* 37: External Interrupt 3 */ + ADC_IRQHandler, /* 38: A/D Converter */ + BOD_IRQHandler, /* 39: Brown-Out Detect */ + USB_IRQHandler, /* 40: USB */ + CAN_IRQHandler, /* 41: CAN */ + DMA_IRQHandler, /* 42: General Purpose DMA */ + I2S_IRQHandler, /* 43: I2S */ + ENET_IRQHandler, /* 44: Ethernet */ + RIT_IRQHandler, /* 45: Repetitive Interrupt Timer */ + MCPWM_IRQHandler, /* 46: Motor Control PWM */ + QEI_IRQHandler, /* 47: Quadrature Encoder Interface */ + PLL1_IRQHandler, /* 48: PLL1 Lock (USB PLL) */ + USBActivity_IRQHandler, /* 49: USB Activity interrupt to wakeup */ + CANActivity_IRQHandler /* 50: CAN Activity interrupt to wakeup */ +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _sdata; +extern unsigned long _edata; +extern unsigned long _sbss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +Reset_Handler(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_sdata; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. This is done with inline assembly since this + // will clear the value of pulDest if it is not kept in a register. + // + __asm(" ldr r0, =_sbss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// Provide weak aliases for each Exception handler to the Default_Handler. +// As they are weak aliases, any function with the same name will override +// this definition. +// +//***************************************************************************** +#pragma weak WDT_IRQHandler = Default_Handler +#pragma weak TIMER0_IRQHandler = Default_Handler +#pragma weak TIMER1_IRQHandler = Default_Handler +#pragma weak TIMER2_IRQHandler = Default_Handler +#pragma weak TIMER3_IRQHandler = Default_Handler +#pragma weak UART0_IRQHandler = Default_Handler +#pragma weak UART1_IRQHandler = Default_Handler +#pragma weak UART2_IRQHandler = Default_Handler +#pragma weak UART3_IRQHandler = Default_Handler +#pragma weak PWM1_IRQHandler = Default_Handler +#pragma weak I2C0_IRQHandler = Default_Handler +#pragma weak I2C1_IRQHandler = Default_Handler +#pragma weak I2C2_IRQHandler = Default_Handler +#pragma weak SPI_IRQHandler = Default_Handler +#pragma weak SSP0_IRQHandler = Default_Handler +#pragma weak SSP1_IRQHandler = Default_Handler +#pragma weak PLL0_IRQHandler = Default_Handler +#pragma weak RTC_IRQHandler = Default_Handler +#pragma weak EINT0_IRQHandler = Default_Handler +#pragma weak EINT1_IRQHandler = Default_Handler +#pragma weak EINT2_IRQHandler = Default_Handler +#pragma weak EINT3_IRQHandler = Default_Handler +#pragma weak ADC_IRQHandler = Default_Handler +#pragma weak BOD_IRQHandler = Default_Handler +#pragma weak USB_IRQHandler = Default_Handler +#pragma weak CAN_IRQHandler = Default_Handler +#pragma weak DMA_IRQHandler = Default_Handler +#pragma weak I2S_IRQHandler = Default_Handler +#pragma weak ENET_IRQHandler = Default_Handler +#pragma weak RIT_IRQHandler = Default_Handler +#pragma weak MCPWM_IRQHandler = Default_Handler +#pragma weak QEI_IRQHandler = Default_Handler +#pragma weak PPL1_IRQHandler = Default_Handler +#pragma weak USBActivity_IRQHandler = Default_Handler +#pragma weak CANActivity_IRQHandler = Default_Handler + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +Default_Handler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +}