From: Asbjørn Sloth Tønnesen Date: Fri, 14 Jan 2011 01:22:59 +0000 (+0000) Subject: Fix USB, DOS line endings, integrate and reorganize project X-Git-Url: http://git.asbjorn.biz/?p=rapper.git;a=commitdiff_plain;h=2253dc3498d4ace7f07884ec6d40d654ca677571 Fix USB, DOS line endings, integrate and reorganize project Signed-off-by: Asbjørn Sloth Tønnesen --- diff --git a/new_cmsis/.gdbinit b/new_cmsis/.gdbinit index 702cc6e..365b230 100644 --- a/new_cmsis/.gdbinit +++ b/new_cmsis/.gdbinit @@ -1 +1,4 @@ -target remote localhost:3333 +target remote localhost:3333 +monitor reset init +monitor reset halt +symbol-file rapper.elf diff --git a/new_cmsis/.gitignore b/new_cmsis/.gitignore index 448edee..c97b852 100644 --- a/new_cmsis/.gitignore +++ b/new_cmsis/.gitignore @@ -2,3 +2,4 @@ *.d *.map *.elf +*.bin diff --git a/new_cmsis/Makefile b/new_cmsis/Makefile index f143b3b..bf7dcc7 100644 --- a/new_cmsis/Makefile +++ b/new_cmsis/Makefile @@ -1,26 +1,36 @@ -PROJECT=rapper -PLATFORM ?= arm-none-eabi -LDFLAGS=--gc-sections -g -T LPC1768-flash.ld -CFLAGS=-W -Wall --std=gnu99 -fgnu89-inline -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections -I. -g -#CFLAGS+=-Os - -# objects are separated by space -OBJECTS=startup.o system_LPC17xx.o main.o core_cm3.o - - -all: $(PROJECT).elf - -$(PROJECT).elf: $(OBJECTS) - $(PLATFORM)-ld -Map $(PROJECT).map $(LDFLAGS) $(OBJECTS) -o $@ - -%.o: %.c - $(PLATFORM)-gcc -MM $< -MF $(patsubst %.o,%.d,$@) -MP - $(PLATFORM)-gcc $(CFLAGS) -c $< -o $@ - -.PHONY: clean gdb - -clean: - rm -f $(PROJECT).elf $(OBJECTS) $(OBJECTS:.o=.d) $(PROJECT).map - -gdb: - $(PLATFORM)-gdb $(PROJECT).elf +PROJECT=rapper +PLATFORM ?= arm-none-eabi +BOARD?=lpc1768 +BPATH=boards/$(BOARD) +LDFLAGS=--gc-sections -g -T $(BPATH)/flash.ld +CFLAGS=-W -Wall --std=gnu99 -fgnu89-inline -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections -I$(BPATH) -I. -g +#CFLAGS+=-Os + +# objects are separated by space +USB_OBJS=usb/serial.o usb/core.o usb/desc.o usb/hw.o usb/user.o usb/vcom.o usb/cdcuser.o +BOARD_OBJS=$(BPATH)/startup.o $(BPATH)/system.o boards/cortex_m3/core_cm3.o +OBJECTS=main.o $(BOARD_OBJS) $(USB_OBJS) + + +all: crc + +$(PROJECT).elf: $(OBJECTS) + $(PLATFORM)-ld -Map $(PROJECT).map $(LDFLAGS) $(OBJECTS) -o $@ + +%.bin: %.elf + $(PLATFORM)-objcopy -O binary $< $*.bin + +%.o: %.c + $(PLATFORM)-gcc -MM $< -MF $(patsubst %.o,%.d,$@) -MP + $(PLATFORM)-gcc $(CFLAGS) -c $< -o $@ + +.PHONY: clean gdb crc + +clean: + rm -f $(PROJECT).elf $(OBJECTS) $(OBJECTS:.o=.d) $(PROJECT).map + +gdb: + $(PLATFORM)-gdb $(PROJECT).elf + +crc: $(PROJECT).bin + ../tools/lpcrc/lpcrc.sh $(PROJECT).bin $(BPATH)/startup.c diff --git a/new_cmsis/core_cm3.c b/new_cmsis/boards/cortex_m3/core_cm3.c similarity index 92% rename from new_cmsis/core_cm3.c rename to new_cmsis/boards/cortex_m3/core_cm3.c index ea8cb1a..69e61c3 100644 --- a/new_cmsis/core_cm3.c +++ b/new_cmsis/boards/cortex_m3/core_cm3.c @@ -1,829 +1,812 @@ -/****************************************************************************** - * @file: core_cm3.c - * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Source File - * @version: V1.20 - * @date: 22. May 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-Mx - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - - -#include - - -/* define compiler specific symbols */ -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for armcc */ - #define __INLINE __inline /*!< inline keyword for armcc */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for iarcc */ - #define __INLINE inline /*!< inline keyword for iarcc. Only avaiable in High optimization mode! */ - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for gcc */ - #define __INLINE inline /*!< inline keyword for gcc */ - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - -#endif - - - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -__ASM uint32_t __get_PSP(void) -{ - mrs r0, psp - bx lr -} - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -__ASM void __set_PSP(uint32_t topOfProcStack) -{ - msr psp, r0 - bx lr -} - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -__ASM uint32_t __get_MSP(void) -{ - mrs r0, msp - bx lr -} - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -__ASM void __set_MSP(uint32_t mainStackPointer) -{ - msr msp, r0 - bx lr -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -__ASM uint32_t __REV16(uint16_t value) -{ - rev16 r0, r0 - bx lr -} - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param int16_t value to reverse - * @return int32_t reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -__ASM int32_t __REVSH(int16_t value) -{ - revsh r0, r0 - bx lr -} - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * @param none - * @return none - * - * Removes the exclusive lock which is created by ldrex. - */ -__ASM void __CLREX(void) -{ - clrex -} - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -__ASM uint32_t __get_BASEPRI(void) -{ - mrs r0, basepri - bx lr -} - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -__ASM void __set_BASEPRI(uint32_t basePri) -{ - msr basepri, r0 - bx lr -} - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -__ASM uint32_t __get_PRIMASK(void) -{ - mrs r0, primask - bx lr -} - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -__ASM void __set_PRIMASK(uint32_t priMask) -{ - msr primask, r0 - bx lr -} - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -__ASM uint32_t __get_FAULTMASK(void) -{ - mrs r0, faultmask - bx lr -} - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -__ASM void __set_FAULTMASK(uint32_t faultMask) -{ - msr faultmask, r0 - bx lr -} - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -__ASM uint32_t __get_CONTROL(void) -{ - mrs r0, control - bx lr -} - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -__ASM void __set_CONTROL(uint32_t control) -{ - msr control, r0 - bx lr -} - -#endif /* __ARMCC_VERSION */ - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -#pragma diag_suppress=Pe940 - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -uint32_t __get_PSP(void) -{ - __ASM("mrs r0, psp"); - __ASM("bx lr"); -} - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -void __set_PSP(uint32_t topOfProcStack) -{ - __ASM("msr psp, r0"); - __ASM("bx lr"); -} - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -uint32_t __get_MSP(void) -{ - __ASM("mrs r0, msp"); - __ASM("bx lr"); -} - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -void __set_MSP(uint32_t topOfMainStack) -{ - __ASM("msr msp, r0"); - __ASM("bx lr"); -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -uint32_t __REV16(uint16_t value) -{ - __ASM("rev16 r0, r0"); - __ASM("bx lr"); -} - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -uint32_t __RBIT(uint32_t value) -{ - __ASM("rbit r0, r0"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -uint8_t __LDREXB(uint8_t *addr) -{ - __ASM("ldrexb r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -uint16_t __LDREXH(uint16_t *addr) -{ - __ASM("ldrexh r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -uint32_t __LDREXW(uint32_t *addr) -{ - __ASM("ldrex r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXB(uint8_t value, uint8_t *addr) -{ - __ASM("strexb r0, r0, [r1]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXH(uint16_t value, uint16_t *addr) -{ - __ASM("strexh r0, r0, [r1]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXW(uint32_t value, uint32_t *addr) -{ - __ASM("strex r0, r0, [r1]"); - __ASM("bx lr"); -} - -#pragma diag_default=Pe940 - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -uint32_t __get_PSP(void) __attribute__( ( naked ) ); -uint32_t __get_PSP(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, psp\n\t" - "MOV r0, %0 \n\t" - "BX lr \n\t" : "=r" (result) ); - return(result); -} - - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) ); -void __set_PSP(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp, %0\n\t" - "BX lr \n\t" : : "r" (topOfProcStack) ); -} - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -uint32_t __get_MSP(void) __attribute__( ( naked ) ); -uint32_t __get_MSP(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, msp\n\t" - "MOV r0, %0 \n\t" - "BX lr \n\t" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) ); -void __set_MSP(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp, %0\n\t" - "BX lr \n\t" : : "r" (topOfMainStack) ); -} - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -uint32_t __get_BASEPRI(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -void __set_BASEPRI(uint32_t value) -{ - __ASM volatile ("MSR basepri, %0" : : "r" (value) ); -} - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -uint32_t __get_PRIMASK(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -void __set_PRIMASK(uint32_t priMask) -{ - __ASM volatile ("MSR primask, %0" : : "r" (priMask) ); -} - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -uint32_t __get_FAULTMASK(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -void __set_FAULTMASK(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) ); -} - -/** - * @brief Reverse byte order in integer value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in integer value - */ -uint32_t __REV(uint32_t value) -{ - uint32_t result=0; - - __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -uint32_t __REV16(uint16_t value) -{ - uint32_t result=0; - - __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param int32_t value to reverse - * @return int32_t reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -int32_t __REVSH(int16_t value) -{ - uint32_t result=0; - - __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -uint32_t __RBIT(uint32_t value) -{ - uint32_t result=0; - - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -uint8_t __LDREXB(uint8_t *addr) -{ - uint8_t result=0; - - __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -uint16_t __LDREXH(uint16_t *addr) -{ - uint16_t result=0; - - __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -uint32_t __LDREXW(uint32_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXB(uint8_t value, uint8_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXH(uint16_t value, uint16_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -uint32_t __STREXW(uint32_t value, uint32_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -uint32_t __get_CONTROL(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, control" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -void __set_CONTROL(uint32_t control) -{ - __ASM volatile ("MSR control, %0" : : "r" (control) ); -} - -#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ -/* TASKING carm specific functions */ - -/* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all instrinsics, - * Including the CMSIS ones. - */ - -#endif - - - - - - - - - - - - - - - - - +/****************************************************************************** + * @file: core_cm3.c + * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Source File + * @version: V1.20 + * @date: 22. May 2009 + *---------------------------------------------------------------------------- + * + * Copyright (C) 2009 ARM Limited. All rights reserved. + * + * ARM Limited (ARM) is supplying this software for use with Cortex-Mx + * processor based microcontrollers. This file can be freely distributed + * within development tools that are supporting such ARM based processors. + * + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + ******************************************************************************/ + + + +#include + + +/* define compiler specific symbols */ +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for armcc */ + #define __INLINE __inline /*!< inline keyword for armcc */ + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for iarcc */ + #define __INLINE inline /*!< inline keyword for iarcc. Only avaiable in High optimization mode! */ + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for gcc */ + #define __INLINE inline /*!< inline keyword for gcc */ + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + +#endif + + + +#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ + +/** + * @brief Return the Process Stack Pointer + * + * @param none + * @return uint32_t ProcessStackPointer + * + * Return the actual process stack pointer + */ +__ASM uint32_t __get_PSP(void) +{ + mrs r0, psp + bx lr +} + +/** + * @brief Set the Process Stack Pointer + * + * @param uint32_t Process Stack Pointer + * @return none + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +__ASM void __set_PSP(uint32_t topOfProcStack) +{ + msr psp, r0 + bx lr +} + +/** + * @brief Return the Main Stack Pointer + * + * @param none + * @return uint32_t Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +__ASM uint32_t __get_MSP(void) +{ + mrs r0, msp + bx lr +} + +/** + * @brief Set the Main Stack Pointer + * + * @param uint32_t Main Stack Pointer + * @return none + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +__ASM void __set_MSP(uint32_t mainStackPointer) +{ + msr msp, r0 + bx lr +} + +/** + * @brief Reverse byte order in unsigned short value + * + * @param uint16_t value to reverse + * @return uint32_t reversed value + * + * Reverse byte order in unsigned short value + */ +__ASM uint32_t __REV16(uint16_t value) +{ + rev16 r0, r0 + bx lr +} + +/** + * @brief Reverse byte order in signed short value with sign extension to integer + * + * @param int16_t value to reverse + * @return int32_t reversed value + * + * Reverse byte order in signed short value with sign extension to integer + */ +__ASM int32_t __REVSH(int16_t value) +{ + revsh r0, r0 + bx lr +} + + +#if (__ARMCC_VERSION < 400000) + +/** + * @brief Remove the exclusive lock created by ldrex + * + * @param none + * @return none + * + * Removes the exclusive lock which is created by ldrex. + */ +__ASM void __CLREX(void) +{ + clrex +} + +/** + * @brief Return the Base Priority value + * + * @param none + * @return uint32_t BasePriority + * + * Return the content of the base priority register + */ +__ASM uint32_t __get_BASEPRI(void) +{ + mrs r0, basepri + bx lr +} + +/** + * @brief Set the Base Priority value + * + * @param uint32_t BasePriority + * @return none + * + * Set the base priority register + */ +__ASM void __set_BASEPRI(uint32_t basePri) +{ + msr basepri, r0 + bx lr +} + +/** + * @brief Return the Priority Mask value + * + * @param none + * @return uint32_t PriMask + * + * Return the state of the priority mask bit from the priority mask + * register + */ +__ASM uint32_t __get_PRIMASK(void) +{ + mrs r0, primask + bx lr +} + +/** + * @brief Set the Priority Mask value + * + * @param uint32_t PriMask + * @return none + * + * Set the priority mask bit in the priority mask register + */ +__ASM void __set_PRIMASK(uint32_t priMask) +{ + msr primask, r0 + bx lr +} + +/** + * @brief Return the Fault Mask value + * + * @param none + * @return uint32_t FaultMask + * + * Return the content of the fault mask register + */ +__ASM uint32_t __get_FAULTMASK(void) +{ + mrs r0, faultmask + bx lr +} + +/** + * @brief Set the Fault Mask value + * + * @param uint32_t faultMask value + * @return none + * + * Set the fault mask register + */ +__ASM void __set_FAULTMASK(uint32_t faultMask) +{ + msr faultmask, r0 + bx lr +} + +/** + * @brief Return the Control Register value + * + * @param none + * @return uint32_t Control value + * + * Return the content of the control register + */ +__ASM uint32_t __get_CONTROL(void) +{ + mrs r0, control + bx lr +} + +/** + * @brief Set the Control Register value + * + * @param uint32_t Control value + * @return none + * + * Set the control register + */ +__ASM void __set_CONTROL(uint32_t control) +{ + msr control, r0 + bx lr +} + +#endif /* __ARMCC_VERSION */ + + +#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ +#pragma diag_suppress=Pe940 + +/** + * @brief Return the Process Stack Pointer + * + * @param none + * @return uint32_t ProcessStackPointer + * + * Return the actual process stack pointer + */ +uint32_t __get_PSP(void) +{ + __ASM("mrs r0, psp"); + __ASM("bx lr"); +} + +/** + * @brief Set the Process Stack Pointer + * + * @param uint32_t Process Stack Pointer + * @return none + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +void __set_PSP(uint32_t topOfProcStack) +{ + __ASM("msr psp, r0"); + __ASM("bx lr"); +} + +/** + * @brief Return the Main Stack Pointer + * + * @param none + * @return uint32_t Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +uint32_t __get_MSP(void) +{ + __ASM("mrs r0, msp"); + __ASM("bx lr"); +} + +/** + * @brief Set the Main Stack Pointer + * + * @param uint32_t Main Stack Pointer + * @return none + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +void __set_MSP(uint32_t topOfMainStack) +{ + __ASM("msr msp, r0"); + __ASM("bx lr"); +} + +/** + * @brief Reverse byte order in unsigned short value + * + * @param uint16_t value to reverse + * @return uint32_t reversed value + * + * Reverse byte order in unsigned short value + */ +uint32_t __REV16(uint16_t value) +{ + __ASM("rev16 r0, r0"); + __ASM("bx lr"); +} + +/** + * @brief Reverse bit order of value + * + * @param uint32_t value to reverse + * @return uint32_t reversed value + * + * Reverse bit order of value + */ +uint32_t __RBIT(uint32_t value) +{ + __ASM("rbit r0, r0"); + __ASM("bx lr"); +} + +/** + * @brief LDR Exclusive + * + * @param uint8_t* address + * @return uint8_t value of (*address) + * + * Exclusive LDR command + */ +uint8_t __LDREXB(uint8_t *addr) +{ + __ASM("ldrexb r0, [r0]"); + __ASM("bx lr"); +} + +/** + * @brief LDR Exclusive + * + * @param uint16_t* address + * @return uint16_t value of (*address) + * + * Exclusive LDR command + */ +uint16_t __LDREXH(uint16_t *addr) +{ + __ASM("ldrexh r0, [r0]"); + __ASM("bx lr"); +} + +/** + * @brief LDR Exclusive + * + * @param uint32_t* address + * @return uint32_t value of (*address) + * + * Exclusive LDR command + */ +uint32_t __LDREXW(uint32_t *addr) +{ + __ASM("ldrex r0, [r0]"); + __ASM("bx lr"); +} + +/** + * @brief STR Exclusive + * + * @param uint8_t *address + * @param uint8_t value to store + * @return uint32_t successful / failed + * + * Exclusive STR command + */ +uint32_t __STREXB(uint8_t value, uint8_t *addr) +{ + __ASM("strexb r0, r0, [r1]"); + __ASM("bx lr"); +} + +/** + * @brief STR Exclusive + * + * @param uint16_t *address + * @param uint16_t value to store + * @return uint32_t successful / failed + * + * Exclusive STR command + */ +uint32_t __STREXH(uint16_t value, uint16_t *addr) +{ + __ASM("strexh r0, r0, [r1]"); + __ASM("bx lr"); +} + +/** + * @brief STR Exclusive + * + * @param uint32_t *address + * @param uint32_t value to store + * @return uint32_t successful / failed + * + * Exclusive STR command + */ +uint32_t __STREXW(uint32_t value, uint32_t *addr) +{ + __ASM("strex r0, r0, [r1]"); + __ASM("bx lr"); +} + +#pragma diag_default=Pe940 + + +#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ + +/** + * @brief Return the Process Stack Pointer + * + * @param none + * @return uint32_t ProcessStackPointer + * + * Return the actual process stack pointer + */ +uint32_t __get_PSP(void) __attribute__( ( naked ) ); +uint32_t __get_PSP(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, psp\n\t" + "MOV r0, %0 \n\t" + "BX lr \n\t" : "=r" (result) ); + return(result); +} + + +/** + * @brief Set the Process Stack Pointer + * + * @param uint32_t Process Stack Pointer + * @return none + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) ); +void __set_PSP(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp, %0\n\t" + "BX lr \n\t" : : "r" (topOfProcStack) ); +} + +/** + * @brief Return the Main Stack Pointer + * + * @param none + * @return uint32_t Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +uint32_t __get_MSP(void) __attribute__( ( naked ) ); +uint32_t __get_MSP(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, msp\n\t" + "MOV r0, %0 \n\t" + "BX lr \n\t" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Main Stack Pointer + * + * @param uint32_t Main Stack Pointer + * @return none + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) ); +void __set_MSP(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp, %0\n\t" + "BX lr \n\t" : : "r" (topOfMainStack) ); +} + +/** + * @brief Return the Base Priority value + * + * @param none + * @return uint32_t BasePriority + * + * Return the content of the base priority register + */ +uint32_t __get_BASEPRI(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Base Priority value + * + * @param uint32_t BasePriority + * @return none + * + * Set the base priority register + */ +void __set_BASEPRI(uint32_t value) +{ + __ASM volatile ("MSR basepri, %0" : : "r" (value) ); +} + +/** + * @brief Return the Priority Mask value + * + * @param none + * @return uint32_t PriMask + * + * Return the state of the priority mask bit from the priority mask + * register + */ +uint32_t __get_PRIMASK(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Priority Mask value + * + * @param uint32_t PriMask + * @return none + * + * Set the priority mask bit in the priority mask register + */ +void __set_PRIMASK(uint32_t priMask) +{ + __ASM volatile ("MSR primask, %0" : : "r" (priMask) ); +} + +/** + * @brief Return the Fault Mask value + * + * @param none + * @return uint32_t FaultMask + * + * Return the content of the fault mask register + */ +uint32_t __get_FAULTMASK(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Fault Mask value + * + * @param uint32_t faultMask value + * @return none + * + * Set the fault mask register + */ +void __set_FAULTMASK(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) ); +} + +/** + * @brief Reverse byte order in integer value + * + * @param uint32_t value to reverse + * @return uint32_t reversed value + * + * Reverse byte order in integer value + */ +uint32_t __REV(uint32_t value) +{ + uint32_t result=0; + + __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); + return(result); +} + +/** + * @brief Reverse byte order in unsigned short value + * + * @param uint16_t value to reverse + * @return uint32_t reversed value + * + * Reverse byte order in unsigned short value + */ +uint32_t __REV16(uint16_t value) +{ + uint32_t result=0; + + __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); + return(result); +} + +/** + * @brief Reverse byte order in signed short value with sign extension to integer + * + * @param int32_t value to reverse + * @return int32_t reversed value + * + * Reverse byte order in signed short value with sign extension to integer + */ +int32_t __REVSH(int16_t value) +{ + uint32_t result=0; + + __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); + return(result); +} + +/** + * @brief Reverse bit order of value + * + * @param uint32_t value to reverse + * @return uint32_t reversed value + * + * Reverse bit order of value + */ +uint32_t __RBIT(uint32_t value) +{ + uint32_t result=0; + + __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); + return(result); +} + +/** + * @brief LDR Exclusive + * + * @param uint8_t* address + * @return uint8_t value of (*address) + * + * Exclusive LDR command + */ +uint8_t __LDREXB(uint8_t *addr) +{ + uint8_t result=0; + + __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); + return(result); +} + +/** + * @brief LDR Exclusive + * + * @param uint16_t* address + * @return uint16_t value of (*address) + * + * Exclusive LDR command + */ +uint16_t __LDREXH(uint16_t *addr) +{ + uint16_t result=0; + + __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); + return(result); +} + +/** + * @brief LDR Exclusive + * + * @param uint32_t* address + * @return uint32_t value of (*address) + * + * Exclusive LDR command + */ +uint32_t __LDREXW(uint32_t *addr) +{ + uint32_t result=0; + + __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); + return(result); +} + +/** + * @brief STR Exclusive + * + * @param uint8_t *address + * @param uint8_t value to store + * @return uint32_t successful / failed + * + * Exclusive STR command + */ +uint32_t __STREXB(uint8_t value, uint8_t *addr) +{ + uint32_t result=0; + + __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); + return(result); +} + +/** + * @brief STR Exclusive + * + * @param uint16_t *address + * @param uint16_t value to store + * @return uint32_t successful / failed + * + * Exclusive STR command + */ +uint32_t __STREXH(uint16_t value, uint16_t *addr) +{ + uint32_t result=0; + + __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); + return(result); +} + +/** + * @brief STR Exclusive + * + * @param uint32_t *address + * @param uint32_t value to store + * @return uint32_t successful / failed + * + * Exclusive STR command + */ +uint32_t __STREXW(uint32_t value, uint32_t *addr) +{ + uint32_t result=0; + + __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); + return(result); +} + +/** + * @brief Return the Control Register value + * + * @param none + * @return uint32_t Control value + * + * Return the content of the control register + */ +uint32_t __get_CONTROL(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, control" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Control Register value + * + * @param uint32_t Control value + * @return none + * + * Set the control register + */ +void __set_CONTROL(uint32_t control) +{ + __ASM volatile ("MSR control, %0" : : "r" (control) ); +} + +#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ +/* TASKING carm specific functions */ + +/* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all instrinsics, + * Including the CMSIS ones. + */ + +#endif diff --git a/new_cmsis/core_cm3.h b/new_cmsis/boards/cortex_m3/core_cm3.h similarity index 94% rename from new_cmsis/core_cm3.h rename to new_cmsis/boards/cortex_m3/core_cm3.h index b6f9696..fb8caa7 100644 --- a/new_cmsis/core_cm3.h +++ b/new_cmsis/boards/cortex_m3/core_cm3.h @@ -1,1367 +1,1367 @@ -/****************************************************************************** - * @file: core_cm3.h - * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version: V1.20 - * @date: 22. May 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-Mx - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -#ifndef __CM3_CORE_H__ -#define __CM3_CORE_H__ - -#ifdef __cplusplus - extern "C" { -#endif - -#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ -#define __CM3_CMSIS_VERSION_SUB (0x20) /*!< [15:0] CMSIS HAL sub version */ -#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x03) /*!< Cortex core */ - -/** - * Lint configuration \n - * ----------------------- \n - * - * The following Lint messages will be suppressed and not shown: \n - * \n - * --- Error 10: --- \n - * register uint32_t __regBasePri __asm("basepri"); \n - * Error 10: Expecting ';' \n - * \n - * --- Error 530: --- \n - * return(__regBasePri); \n - * Warning 530: Symbol '__regBasePri' (line 264) not initialized \n - * \n - * --- Error 550: --- \n - * __regBasePri = (basePri & 0x1ff); \n - * } \n - * Warning 550: Symbol '__regBasePri' (line 271) not accessed \n - * \n - * --- Error 754: --- \n - * uint32_t RESERVED0[24]; \n - * Info 754: local structure member '' (line 109, file ./cm3_core.h) not referenced \n - * \n - * --- Error 750: --- \n - * #define __CM3_CORE_H__ \n - * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced \n - * \n - * --- Error 528: --- \n - * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n - * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced \n - * \n - * --- Error 751: --- \n - * } InterruptType_Type; \n - * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced \n - * \n - * \n - * Note: To re-enable a Message, insert a space before 'lint' * \n - * - */ - -/*lint -save */ -/*lint -e10 */ -/*lint -e530 */ -/*lint -e550 */ -/*lint -e754 */ -/*lint -e750 */ -/*lint -e528 */ -/*lint -e751 */ - - -#include /* Include standard types */ - -#if defined (__ICCARM__) - #include /* IAR Intrinsics */ -#endif - - -#ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ -#endif - - - - -/** - * IO definitions - * - * define access restrictions to peripheral registers - */ - -#ifdef __cplusplus -#define __I volatile /*!< defines 'read only' permissions */ -#else -#define __I volatile const /*!< defines 'read only' permissions */ -#endif -#define __O volatile /*!< defines 'write only' permissions */ -#define __IO volatile /*!< defines 'read / write' permissions */ - - - -/******************************************************************************* - * Register Abstraction - ******************************************************************************/ - - -/* System Reset */ -#define NVIC_VECTRESET 0 /*!< Vector Reset Bit */ -#define NVIC_SYSRESETREQ 2 /*!< System Reset Request */ -#define NVIC_AIRCR_VECTKEY (0x5FA << 16) /*!< AIRCR Key for write access */ -#define NVIC_AIRCR_ENDIANESS 15 /*!< Endianess */ - -/* Core Debug */ -#define CoreDebug_DEMCR_TRCENA (1 << 24) /*!< DEMCR TRCENA enable */ -#define ITM_TCR_ITMENA 1 /*!< ITM enable */ - - - - -/* memory mapping struct for Nested Vectored Interrupt Controller (NVIC) */ -typedef struct -{ - __IO uint32_t ISER[8]; /*!< Interrupt Set Enable Register */ - uint32_t RESERVED0[24]; - __IO uint32_t ICER[8]; /*!< Interrupt Clear Enable Register */ - uint32_t RSERVED1[24]; - __IO uint32_t ISPR[8]; /*!< Interrupt Set Pending Register */ - uint32_t RESERVED2[24]; - __IO uint32_t ICPR[8]; /*!< Interrupt Clear Pending Register */ - uint32_t RESERVED3[24]; - __IO uint32_t IABR[8]; /*!< Interrupt Active bit Register */ - uint32_t RESERVED4[56]; - __IO uint8_t IP[240]; /*!< Interrupt Priority Register, 8Bit wide */ - uint32_t RESERVED5[644]; - __O uint32_t STIR; /*!< Software Trigger Interrupt Register */ -} NVIC_Type; - - -/* memory mapping struct for System Control Block */ -typedef struct -{ - __I uint32_t CPUID; /*!< CPU ID Base Register */ - __IO uint32_t ICSR; /*!< Interrupt Control State Register */ - __IO uint32_t VTOR; /*!< Vector Table Offset Register */ - __IO uint32_t AIRCR; /*!< Application Interrupt / Reset Control Register */ - __IO uint32_t SCR; /*!< System Control Register */ - __IO uint32_t CCR; /*!< Configuration Control Register */ - __IO uint8_t SHP[12]; /*!< System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IO uint32_t SHCSR; /*!< System Handler Control and State Register */ - __IO uint32_t CFSR; /*!< Configurable Fault Status Register */ - __IO uint32_t HFSR; /*!< Hard Fault Status Register */ - __IO uint32_t DFSR; /*!< Debug Fault Status Register */ - __IO uint32_t MMFAR; /*!< Mem Manage Address Register */ - __IO uint32_t BFAR; /*!< Bus Fault Address Register */ - __IO uint32_t AFSR; /*!< Auxiliary Fault Status Register */ - __I uint32_t PFR[2]; /*!< Processor Feature Register */ - __I uint32_t DFR; /*!< Debug Feature Register */ - __I uint32_t ADR; /*!< Auxiliary Feature Register */ - __I uint32_t MMFR[4]; /*!< Memory Model Feature Register */ - __I uint32_t ISAR[5]; /*!< ISA Feature Register */ -} SCB_Type; - - -/* memory mapping struct for SysTick */ -typedef struct -{ - __IO uint32_t CTRL; /*!< SysTick Control and Status Register */ - __IO uint32_t LOAD; /*!< SysTick Reload Value Register */ - __IO uint32_t VAL; /*!< SysTick Current Value Register */ - __I uint32_t CALIB; /*!< SysTick Calibration Register */ -} SysTick_Type; - - -/* memory mapping structur for ITM */ -typedef struct -{ - __O union - { - __O uint8_t u8; /*!< ITM Stimulus Port 8-bit */ - __O uint16_t u16; /*!< ITM Stimulus Port 16-bit */ - __O uint32_t u32; /*!< ITM Stimulus Port 32-bit */ - } PORT [32]; /*!< ITM Stimulus Port Registers */ - uint32_t RESERVED0[864]; - __IO uint32_t TER; /*!< ITM Trace Enable Register */ - uint32_t RESERVED1[15]; - __IO uint32_t TPR; /*!< ITM Trace Privilege Register */ - uint32_t RESERVED2[15]; - __IO uint32_t TCR; /*!< ITM Trace Control Register */ - uint32_t RESERVED3[29]; - __IO uint32_t IWR; /*!< ITM Integration Write Register */ - __IO uint32_t IRR; /*!< ITM Integration Read Register */ - __IO uint32_t IMCR; /*!< ITM Integration Mode Control Register */ - uint32_t RESERVED4[43]; - __IO uint32_t LAR; /*!< ITM Lock Access Register */ - __IO uint32_t LSR; /*!< ITM Lock Status Register */ - uint32_t RESERVED5[6]; - __I uint32_t PID4; /*!< ITM Product ID Registers */ - __I uint32_t PID5; - __I uint32_t PID6; - __I uint32_t PID7; - __I uint32_t PID0; - __I uint32_t PID1; - __I uint32_t PID2; - __I uint32_t PID3; - __I uint32_t CID0; - __I uint32_t CID1; - __I uint32_t CID2; - __I uint32_t CID3; -} ITM_Type; - - -/* memory mapped struct for Interrupt Type */ -typedef struct -{ - uint32_t RESERVED0; - __I uint32_t ICTR; /*!< Interrupt Control Type Register */ -#if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) - __IO uint32_t ACTLR; /*!< Auxiliary Control Register */ -#else - uint32_t RESERVED1; -#endif -} InterruptType_Type; - - -/* Memory Protection Unit */ -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) -typedef struct -{ - __I uint32_t TYPE; /*!< MPU Type Register */ - __IO uint32_t CTRL; /*!< MPU Control Register */ - __IO uint32_t RNR; /*!< MPU Region RNRber Register */ - __IO uint32_t RBAR; /*!< MPU Region Base Address Register */ - __IO uint32_t RASR; /*!< MPU Region Attribute and Size Register */ - __IO uint32_t RBAR_A1; /*!< MPU Alias 1 Region Base Address Register */ - __IO uint32_t RASR_A1; /*!< MPU Alias 1 Region Attribute and Size Register */ - __IO uint32_t RBAR_A2; /*!< MPU Alias 2 Region Base Address Register */ - __IO uint32_t RASR_A2; /*!< MPU Alias 2 Region Attribute and Size Register */ - __IO uint32_t RBAR_A3; /*!< MPU Alias 3 Region Base Address Register */ - __IO uint32_t RASR_A3; /*!< MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; -#endif - - -/* Core Debug Register */ -typedef struct -{ - __IO uint32_t DHCSR; /*!< Debug Halting Control and Status Register */ - __O uint32_t DCRSR; /*!< Debug Core Register Selector Register */ - __IO uint32_t DCRDR; /*!< Debug Core Register Data Register */ - __IO uint32_t DEMCR; /*!< Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000) /*!< ITM Base Address */ -#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ - -#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ -#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) - #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ -#endif - - - -/******************************************************************************* - * Hardware Abstraction Layer - ******************************************************************************/ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ -/* ARM armcc specific functions */ - -#define __enable_fault_irq __enable_fiq -#define __disable_fault_irq __disable_fiq - -#define __NOP __nop -#define __WFI __wfi -#define __WFE __wfe -#define __SEV __sev -#define __ISB() __isb(0) -#define __DSB() __dsb(0) -#define __DMB() __dmb(0) -#define __REV __rev -#define __RBIT __rbit -#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) -#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) -#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) -#define __STREXB(value, ptr) __strex(value, ptr) -#define __STREXH(value, ptr) __strex(value, ptr) -#define __STREXW(value, ptr) __strex(value, ptr) - - -/* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ -/* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ -/* intrinsic void __enable_irq(); */ -/* intrinsic void __disable_irq(); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/* - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param int16_t value to reverse - * @return int32_t reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * @param none - * @return none - * - * Removes the exclusive lock which is created by ldrex. - */ -extern void __CLREX(void); - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -#else /* (__ARMCC_VERSION >= 400000) */ - - -/** - * @brief Remove the exclusive lock created by ldrex - * - * @param none - * @return none - * - * Removes the exclusive lock which is created by ldrex. - */ -#define __CLREX __clrex - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -static __INLINE uint32_t __get_BASEPRI(void) -{ - register uint32_t __regBasePri __ASM("basepri"); - return(__regBasePri); -} - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -static __INLINE void __set_BASEPRI(uint32_t basePri) -{ - register uint32_t __regBasePri __ASM("basepri"); - __regBasePri = (basePri & 0x1ff); -} - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -static __INLINE uint32_t __get_PRIMASK(void) -{ - register uint32_t __regPriMask __ASM("primask"); - return(__regPriMask); -} - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -static __INLINE void __set_PRIMASK(uint32_t priMask) -{ - register uint32_t __regPriMask __ASM("primask"); - __regPriMask = (priMask); -} - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -static __INLINE uint32_t __get_FAULTMASK(void) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - return(__regFaultMask); -} - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -static __INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - __regFaultMask = (faultMask & 1); -} - -/** - * @brief Return the Control Register value - * - * @param none - * @return uint32_t Control value - * - * Return the content of the control register - */ -static __INLINE uint32_t __get_CONTROL(void) -{ - register uint32_t __regControl __ASM("control"); - return(__regControl); -} - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -static __INLINE void __set_CONTROL(uint32_t control) -{ - register uint32_t __regControl __ASM("control"); - __regControl = control; -} - -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -/* IAR iccarm specific functions */ - -#define __enable_irq __enable_interrupt /*!< global Interrupt enable */ -#define __disable_irq __disable_interrupt /*!< global Interrupt disable */ - -static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } - -#define __NOP __no_operation() /*!< no operation intrinsic in IAR Compiler */ -static __INLINE void __WFI() { __ASM ("wfi"); } -static __INLINE void __WFE() { __ASM ("wfe"); } -static __INLINE void __SEV() { __ASM ("sev"); } -static __INLINE void __CLREX() { __ASM ("clrex"); } - -/* intrinsic void __ISB(void) */ -/* intrinsic void __DSB(void) */ -/* intrinsic void __DMB(void) */ -/* intrinsic void __set_PRIMASK(); */ -/* intrinsic void __get_PRIMASK(); */ -/* intrinsic void __set_FAULTMASK(); */ -/* intrinsic void __get_FAULTMASK(); */ -/* intrinsic uint32_t __REV(uint32_t value); */ -/* intrinsic uint32_t __REVSH(uint32_t value); */ -/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ -/* intrinsic unsigned long __LDREX(unsigned long *); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* GNU gcc specific functions */ - -static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } -static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } - -static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } - -static __INLINE void __NOP() { __ASM volatile ("nop"); } -static __INLINE void __WFI() { __ASM volatile ("wfi"); } -static __INLINE void __WFE() { __ASM volatile ("wfe"); } -static __INLINE void __SEV() { __ASM volatile ("sev"); } -static __INLINE void __ISB() { __ASM volatile ("isb"); } -static __INLINE void __DSB() { __ASM volatile ("dsb"); } -static __INLINE void __DMB() { __ASM volatile ("dmb"); } -static __INLINE void __CLREX() { __ASM volatile ("clrex"); } - - -/** - * @brief Return the Process Stack Pointer - * - * @param none - * @return uint32_t ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param uint32_t Process Stack Pointer - * @return none - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @param none - * @return uint32_t Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param uint32_t Main Stack Pointer - * @return none - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Return the Base Priority value - * - * @param none - * @return uint32_t BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param uint32_t BasePriority - * @return none - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @param none - * @return uint32_t PriMask - * - * Return the state of the priority mask bit from the priority mask - * register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param uint32_t PriMask - * @return none - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @param none - * @return uint32_t FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param uint32_t faultMask value - * @return none - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value -* -* @param none -* @return uint32_t Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param uint32_t Control value - * @return none - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -/** - * @brief Reverse byte order in integer value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in integer value - */ -extern uint32_t __REV(uint32_t value); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param uint16_t value to reverse - * @return uint32_t reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/* - * Reverse byte order in signed short value with sign extension to integer - * - * @param int16_t value to reverse - * @return int32_t reversed value - * - * @brief Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - -/** - * @brief Reverse bit order of value - * - * @param uint32_t value to reverse - * @return uint32_t reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive - * - * @param uint8_t* address - * @return uint8_t value of (*address) - * - * Exclusive LDR command - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint16_t* address - * @return uint16_t value of (*address) - * - * Exclusive LDR command - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive - * - * @param uint32_t* address - * @return uint32_t value of (*address) - * - * Exclusive LDR command - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint8_t *address - * @param uint8_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint16_t *address - * @param uint16_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive - * - * @param uint32_t *address - * @param uint32_t value to store - * @return uint32_t successful / failed - * - * Exclusive STR command - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - -#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ -/* TASKING carm specific functions */ - -/* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all instrinsics, - * Including the CMSIS ones. - */ - -#endif - - - -/* ########################## NVIC functions #################################### */ - - -/** - * @brief Set the Priority Grouping in NVIC Interrupt Controller - * - * @param uint32_t priority_grouping is priority grouping field - * @return none - * - * Set the priority grouping field using the required unlock sequence. - * The parameter priority_grouping is assigned to the field - * SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - */ -static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((0xFFFFU << 16) | (0x0F << 8)); /* clear bits to change */ - reg_value = ((reg_value | NVIC_AIRCR_VECTKEY | (PriorityGroupTmp << 8))); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - -/** - * @brief Get the Priority Grouping from NVIC Interrupt Controller - * - * @param none - * @return uint32_t priority grouping field - * - * Get the priority grouping from NVIC Interrupt Controller. - * priority grouping is SCB->AIRCR [10:8] PRIGROUP field. - */ -static __INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((SCB->AIRCR >> 8) & 0x07); /* read priority grouping field */ -} - -/** - * @brief Enable Interrupt in NVIC Interrupt Controller - * - * @param IRQn_Type IRQn specifies the interrupt number - * @return none - * - * Enable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ -} - -/** - * @brief Disable the interrupt line for external interrupt specified - * - * @param IRQn_Type IRQn is the positive number of the external interrupt - * @return none - * - * Disable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ -} - -/** - * @brief Read the interrupt pending bit for a device specific interrupt source - * - * @param IRQn_Type IRQn is the number of the device specifc interrupt - * @return uint32_t 1 if pending interrupt else 0 - * - * Read the pending register in NVIC and return 1 if its status is pending, - * otherwise it returns 0 - */ -static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */ -} - -/** - * @brief Set the pending bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return none - * - * Set the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ -} - -/** - * @brief Clear the pending bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return none - * - * Clear the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ -} - -/** - * @brief Read the active bit for an external interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return uint32_t 1 if active else 0 - * - * Read the active register in NVIC and returns 1 if its status is active, - * otherwise it returns 0. - */ -static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */ -} - -/** - * @brief Set the priority for an interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @param priority is the priority for the interrupt - * @return none - * - * Set the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. \n - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if(IRQn < 0) { - SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ - else { - NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ -} - -/** - * @brief Read the priority for an interrupt - * - * @param IRQn_Type IRQn is the Number of the interrupt - * @return uint32_t priority is the priority for the interrupt - * - * Read the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * The returned priority value is automatically aligned to the implemented - * priority bits of the microcontroller. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if(IRQn < 0) { - return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ - else { - return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ -} - - -/** - * @brief Encode the priority for an interrupt - * - * @param uint32_t PriorityGroup is the used priority group - * @param uint32_t PreemptPriority is the preemptive priority value (starting from 0) - * @param uint32_t SubPriority is the sub priority value (starting from 0) - * @return uint32_t the priority for the interrupt - * - * Encode the priority for an interrupt with the given priority group, - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The returned priority value can be used for NVIC_SetPriority(...) function - */ -static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - return ( - ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) | - ((SubPriority & ((1 << (SubPriorityBits )) - 1))) - ); -} - - -/** - * @brief Decode the priority of an interrupt - * - * @param uint32_t Priority the priority for the interrupt - * @param uint32_t PrioGroup is the used priority group - * @param uint32_t* pPreemptPrio is the preemptive priority value (starting from 0) - * @param uint32_t* pSubPrio is the sub priority value (starting from 0) - * @return none - * - * Decode an interrupt priority value with the given priority group to - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The priority value can be retrieved with NVIC_GetPriority(...) function - */ -static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1); - *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1); -} - - - -/* ################################## SysTick function ############################################ */ - -#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) - -/* SysTick constants */ -#define SYSTICK_ENABLE 0 /* Config-Bit to start or stop the SysTick Timer */ -#define SYSTICK_TICKINT 1 /* Config-Bit to enable or disable the SysTick interrupt */ -#define SYSTICK_CLKSOURCE 2 /* Clocksource has the offset 2 in SysTick Control and Status Register */ -#define SYSTICK_MAXCOUNT ((1<<24) -1) /* SysTick MaxCount */ - -/** - * @brief Initialize and start the SysTick counter and its interrupt. - * - * @param uint32_t ticks is the number of ticks between two interrupts - * @return none - * - * Initialise the system tick timer and its interrupt and start the - * system tick timer / counter in free running mode to generate - * periodical interrupts. - */ -static __INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if (ticks > SYSTICK_MAXCOUNT) return (1); /* Reload value impossible */ - - SysTick->LOAD = (ticks & SYSTICK_MAXCOUNT) - 1; /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ - SysTick->VAL = (0x00); /* Load the SysTick Counter Value */ - SysTick->CTRL = (1 << SYSTICK_CLKSOURCE) | (1<AIRCR = (NVIC_AIRCR_VECTKEY | (SCB->AIRCR & (0x700)) | (1<DEMCR & CoreDebug_DEMCR_TRCENA) && - (ITM->TCR & ITM_TCR_ITMENA) && - (ITM->TER & (1UL << 0)) ) - { - while (ITM->PORT[0].u32 == 0); - ITM->PORT[0].u8 = (uint8_t) ch; - } - return (ch); -} - -#ifdef __cplusplus -} -#endif - -#endif /* __CM3_CORE_H__ */ - -/*lint -restore */ +/****************************************************************************** + * @file: core_cm3.h + * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File + * @version: V1.20 + * @date: 22. May 2009 + *---------------------------------------------------------------------------- + * + * Copyright (C) 2009 ARM Limited. All rights reserved. + * + * ARM Limited (ARM) is supplying this software for use with Cortex-Mx + * processor based microcontrollers. This file can be freely distributed + * within development tools that are supporting such ARM based processors. + * + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + ******************************************************************************/ + +#ifndef __CM3_CORE_H__ +#define __CM3_CORE_H__ + +#ifdef __cplusplus + extern "C" { +#endif + +#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ +#define __CM3_CMSIS_VERSION_SUB (0x20) /*!< [15:0] CMSIS HAL sub version */ +#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ + +#define __CORTEX_M (0x03) /*!< Cortex core */ + +/** + * Lint configuration \n + * ----------------------- \n + * + * The following Lint messages will be suppressed and not shown: \n + * \n + * --- Error 10: --- \n + * register uint32_t __regBasePri __asm("basepri"); \n + * Error 10: Expecting ';' \n + * \n + * --- Error 530: --- \n + * return(__regBasePri); \n + * Warning 530: Symbol '__regBasePri' (line 264) not initialized \n + * \n + * --- Error 550: --- \n + * __regBasePri = (basePri & 0x1ff); \n + * } \n + * Warning 550: Symbol '__regBasePri' (line 271) not accessed \n + * \n + * --- Error 754: --- \n + * uint32_t RESERVED0[24]; \n + * Info 754: local structure member '' (line 109, file ./cm3_core.h) not referenced \n + * \n + * --- Error 750: --- \n + * #define __CM3_CORE_H__ \n + * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced \n + * \n + * --- Error 528: --- \n + * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n + * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced \n + * \n + * --- Error 751: --- \n + * } InterruptType_Type; \n + * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced \n + * \n + * \n + * Note: To re-enable a Message, insert a space before 'lint' * \n + * + */ + +/*lint -save */ +/*lint -e10 */ +/*lint -e530 */ +/*lint -e550 */ +/*lint -e754 */ +/*lint -e750 */ +/*lint -e528 */ +/*lint -e751 */ + + +#include /* Include standard types */ + +#if defined (__ICCARM__) + #include /* IAR Intrinsics */ +#endif + + +#ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ +#endif + + + + +/** + * IO definitions + * + * define access restrictions to peripheral registers + */ + +#ifdef __cplusplus +#define __I volatile /*!< defines 'read only' permissions */ +#else +#define __I volatile const /*!< defines 'read only' permissions */ +#endif +#define __O volatile /*!< defines 'write only' permissions */ +#define __IO volatile /*!< defines 'read / write' permissions */ + + + +/******************************************************************************* + * Register Abstraction + ******************************************************************************/ + + +/* System Reset */ +#define NVIC_VECTRESET 0 /*!< Vector Reset Bit */ +#define NVIC_SYSRESETREQ 2 /*!< System Reset Request */ +#define NVIC_AIRCR_VECTKEY (0x5FA << 16) /*!< AIRCR Key for write access */ +#define NVIC_AIRCR_ENDIANESS 15 /*!< Endianess */ + +/* Core Debug */ +#define CoreDebug_DEMCR_TRCENA (1 << 24) /*!< DEMCR TRCENA enable */ +#define ITM_TCR_ITMENA 1 /*!< ITM enable */ + + + + +/* memory mapping struct for Nested Vectored Interrupt Controller (NVIC) */ +typedef struct +{ + __IO uint32_t ISER[8]; /*!< Interrupt Set Enable Register */ + uint32_t RESERVED0[24]; + __IO uint32_t ICER[8]; /*!< Interrupt Clear Enable Register */ + uint32_t RSERVED1[24]; + __IO uint32_t ISPR[8]; /*!< Interrupt Set Pending Register */ + uint32_t RESERVED2[24]; + __IO uint32_t ICPR[8]; /*!< Interrupt Clear Pending Register */ + uint32_t RESERVED3[24]; + __IO uint32_t IABR[8]; /*!< Interrupt Active bit Register */ + uint32_t RESERVED4[56]; + __IO uint8_t IP[240]; /*!< Interrupt Priority Register, 8Bit wide */ + uint32_t RESERVED5[644]; + __O uint32_t STIR; /*!< Software Trigger Interrupt Register */ +} NVIC_Type; + + +/* memory mapping struct for System Control Block */ +typedef struct +{ + __I uint32_t CPUID; /*!< CPU ID Base Register */ + __IO uint32_t ICSR; /*!< Interrupt Control State Register */ + __IO uint32_t VTOR; /*!< Vector Table Offset Register */ + __IO uint32_t AIRCR; /*!< Application Interrupt / Reset Control Register */ + __IO uint32_t SCR; /*!< System Control Register */ + __IO uint32_t CCR; /*!< Configuration Control Register */ + __IO uint8_t SHP[12]; /*!< System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IO uint32_t SHCSR; /*!< System Handler Control and State Register */ + __IO uint32_t CFSR; /*!< Configurable Fault Status Register */ + __IO uint32_t HFSR; /*!< Hard Fault Status Register */ + __IO uint32_t DFSR; /*!< Debug Fault Status Register */ + __IO uint32_t MMFAR; /*!< Mem Manage Address Register */ + __IO uint32_t BFAR; /*!< Bus Fault Address Register */ + __IO uint32_t AFSR; /*!< Auxiliary Fault Status Register */ + __I uint32_t PFR[2]; /*!< Processor Feature Register */ + __I uint32_t DFR; /*!< Debug Feature Register */ + __I uint32_t ADR; /*!< Auxiliary Feature Register */ + __I uint32_t MMFR[4]; /*!< Memory Model Feature Register */ + __I uint32_t ISAR[5]; /*!< ISA Feature Register */ +} SCB_Type; + + +/* memory mapping struct for SysTick */ +typedef struct +{ + __IO uint32_t CTRL; /*!< SysTick Control and Status Register */ + __IO uint32_t LOAD; /*!< SysTick Reload Value Register */ + __IO uint32_t VAL; /*!< SysTick Current Value Register */ + __I uint32_t CALIB; /*!< SysTick Calibration Register */ +} SysTick_Type; + + +/* memory mapping structur for ITM */ +typedef struct +{ + __O union + { + __O uint8_t u8; /*!< ITM Stimulus Port 8-bit */ + __O uint16_t u16; /*!< ITM Stimulus Port 16-bit */ + __O uint32_t u32; /*!< ITM Stimulus Port 32-bit */ + } PORT [32]; /*!< ITM Stimulus Port Registers */ + uint32_t RESERVED0[864]; + __IO uint32_t TER; /*!< ITM Trace Enable Register */ + uint32_t RESERVED1[15]; + __IO uint32_t TPR; /*!< ITM Trace Privilege Register */ + uint32_t RESERVED2[15]; + __IO uint32_t TCR; /*!< ITM Trace Control Register */ + uint32_t RESERVED3[29]; + __IO uint32_t IWR; /*!< ITM Integration Write Register */ + __IO uint32_t IRR; /*!< ITM Integration Read Register */ + __IO uint32_t IMCR; /*!< ITM Integration Mode Control Register */ + uint32_t RESERVED4[43]; + __IO uint32_t LAR; /*!< ITM Lock Access Register */ + __IO uint32_t LSR; /*!< ITM Lock Status Register */ + uint32_t RESERVED5[6]; + __I uint32_t PID4; /*!< ITM Product ID Registers */ + __I uint32_t PID5; + __I uint32_t PID6; + __I uint32_t PID7; + __I uint32_t PID0; + __I uint32_t PID1; + __I uint32_t PID2; + __I uint32_t PID3; + __I uint32_t CID0; + __I uint32_t CID1; + __I uint32_t CID2; + __I uint32_t CID3; +} ITM_Type; + + +/* memory mapped struct for Interrupt Type */ +typedef struct +{ + uint32_t RESERVED0; + __I uint32_t ICTR; /*!< Interrupt Control Type Register */ +#if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) + __IO uint32_t ACTLR; /*!< Auxiliary Control Register */ +#else + uint32_t RESERVED1; +#endif +} InterruptType_Type; + + +/* Memory Protection Unit */ +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) +typedef struct +{ + __I uint32_t TYPE; /*!< MPU Type Register */ + __IO uint32_t CTRL; /*!< MPU Control Register */ + __IO uint32_t RNR; /*!< MPU Region RNRber Register */ + __IO uint32_t RBAR; /*!< MPU Region Base Address Register */ + __IO uint32_t RASR; /*!< MPU Region Attribute and Size Register */ + __IO uint32_t RBAR_A1; /*!< MPU Alias 1 Region Base Address Register */ + __IO uint32_t RASR_A1; /*!< MPU Alias 1 Region Attribute and Size Register */ + __IO uint32_t RBAR_A2; /*!< MPU Alias 2 Region Base Address Register */ + __IO uint32_t RASR_A2; /*!< MPU Alias 2 Region Attribute and Size Register */ + __IO uint32_t RBAR_A3; /*!< MPU Alias 3 Region Base Address Register */ + __IO uint32_t RASR_A3; /*!< MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; +#endif + + +/* Core Debug Register */ +typedef struct +{ + __IO uint32_t DHCSR; /*!< Debug Halting Control and Status Register */ + __O uint32_t DCRSR; /*!< Debug Core Register Selector Register */ + __IO uint32_t DCRDR; /*!< Debug Core Register Data Register */ + __IO uint32_t DEMCR; /*!< Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + + +/* Memory mapping of Cortex-M3 Hardware */ +#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000) /*!< ITM Base Address */ +#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ + +#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ +#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) + #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ +#endif + + + +/******************************************************************************* + * Hardware Abstraction Layer + ******************************************************************************/ + + +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + +#endif + + +/* ################### Compiler specific Intrinsics ########################### */ + +#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ +/* ARM armcc specific functions */ + +#define __enable_fault_irq __enable_fiq +#define __disable_fault_irq __disable_fiq + +#define __NOP __nop +#define __WFI __wfi +#define __WFE __wfe +#define __SEV __sev +#define __ISB() __isb(0) +#define __DSB() __dsb(0) +#define __DMB() __dmb(0) +#define __REV __rev +#define __RBIT __rbit +#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) +#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) +#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) +#define __STREXB(value, ptr) __strex(value, ptr) +#define __STREXH(value, ptr) __strex(value, ptr) +#define __STREXW(value, ptr) __strex(value, ptr) + + +/* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ +/* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ +/* intrinsic void __enable_irq(); */ +/* intrinsic void __disable_irq(); */ + + +/** + * @brief Return the Process Stack Pointer + * + * @param none + * @return uint32_t ProcessStackPointer + * + * Return the actual process stack pointer + */ +extern uint32_t __get_PSP(void); + +/** + * @brief Set the Process Stack Pointer + * + * @param uint32_t Process Stack Pointer + * @return none + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +extern void __set_PSP(uint32_t topOfProcStack); + +/** + * @brief Return the Main Stack Pointer + * + * @param none + * @return uint32_t Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +extern uint32_t __get_MSP(void); + +/** + * @brief Set the Main Stack Pointer + * + * @param uint32_t Main Stack Pointer + * @return none + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +extern void __set_MSP(uint32_t topOfMainStack); + +/** + * @brief Reverse byte order in unsigned short value + * + * @param uint16_t value to reverse + * @return uint32_t reversed value + * + * Reverse byte order in unsigned short value + */ +extern uint32_t __REV16(uint16_t value); + +/* + * @brief Reverse byte order in signed short value with sign extension to integer + * + * @param int16_t value to reverse + * @return int32_t reversed value + * + * Reverse byte order in signed short value with sign extension to integer + */ +extern int32_t __REVSH(int16_t value); + + +#if (__ARMCC_VERSION < 400000) + +/** + * @brief Remove the exclusive lock created by ldrex + * + * @param none + * @return none + * + * Removes the exclusive lock which is created by ldrex. + */ +extern void __CLREX(void); + +/** + * @brief Return the Base Priority value + * + * @param none + * @return uint32_t BasePriority + * + * Return the content of the base priority register + */ +extern uint32_t __get_BASEPRI(void); + +/** + * @brief Set the Base Priority value + * + * @param uint32_t BasePriority + * @return none + * + * Set the base priority register + */ +extern void __set_BASEPRI(uint32_t basePri); + +/** + * @brief Return the Priority Mask value + * + * @param none + * @return uint32_t PriMask + * + * Return the state of the priority mask bit from the priority mask + * register + */ +extern uint32_t __get_PRIMASK(void); + +/** + * @brief Set the Priority Mask value + * + * @param uint32_t PriMask + * @return none + * + * Set the priority mask bit in the priority mask register + */ +extern void __set_PRIMASK(uint32_t priMask); + +/** + * @brief Return the Fault Mask value + * + * @param none + * @return uint32_t FaultMask + * + * Return the content of the fault mask register + */ +extern uint32_t __get_FAULTMASK(void); + +/** + * @brief Set the Fault Mask value + * + * @param uint32_t faultMask value + * @return none + * + * Set the fault mask register + */ +extern void __set_FAULTMASK(uint32_t faultMask); + +/** + * @brief Return the Control Register value + * + * @param none + * @return uint32_t Control value + * + * Return the content of the control register + */ +extern uint32_t __get_CONTROL(void); + +/** + * @brief Set the Control Register value + * + * @param uint32_t Control value + * @return none + * + * Set the control register + */ +extern void __set_CONTROL(uint32_t control); + +#else /* (__ARMCC_VERSION >= 400000) */ + + +/** + * @brief Remove the exclusive lock created by ldrex + * + * @param none + * @return none + * + * Removes the exclusive lock which is created by ldrex. + */ +#define __CLREX __clrex + +/** + * @brief Return the Base Priority value + * + * @param none + * @return uint32_t BasePriority + * + * Return the content of the base priority register + */ +static __INLINE uint32_t __get_BASEPRI(void) +{ + register uint32_t __regBasePri __ASM("basepri"); + return(__regBasePri); +} + +/** + * @brief Set the Base Priority value + * + * @param uint32_t BasePriority + * @return none + * + * Set the base priority register + */ +static __INLINE void __set_BASEPRI(uint32_t basePri) +{ + register uint32_t __regBasePri __ASM("basepri"); + __regBasePri = (basePri & 0x1ff); +} + +/** + * @brief Return the Priority Mask value + * + * @param none + * @return uint32_t PriMask + * + * Return the state of the priority mask bit from the priority mask + * register + */ +static __INLINE uint32_t __get_PRIMASK(void) +{ + register uint32_t __regPriMask __ASM("primask"); + return(__regPriMask); +} + +/** + * @brief Set the Priority Mask value + * + * @param uint32_t PriMask + * @return none + * + * Set the priority mask bit in the priority mask register + */ +static __INLINE void __set_PRIMASK(uint32_t priMask) +{ + register uint32_t __regPriMask __ASM("primask"); + __regPriMask = (priMask); +} + +/** + * @brief Return the Fault Mask value + * + * @param none + * @return uint32_t FaultMask + * + * Return the content of the fault mask register + */ +static __INLINE uint32_t __get_FAULTMASK(void) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + return(__regFaultMask); +} + +/** + * @brief Set the Fault Mask value + * + * @param uint32_t faultMask value + * @return none + * + * Set the fault mask register + */ +static __INLINE void __set_FAULTMASK(uint32_t faultMask) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + __regFaultMask = (faultMask & 1); +} + +/** + * @brief Return the Control Register value + * + * @param none + * @return uint32_t Control value + * + * Return the content of the control register + */ +static __INLINE uint32_t __get_CONTROL(void) +{ + register uint32_t __regControl __ASM("control"); + return(__regControl); +} + +/** + * @brief Set the Control Register value + * + * @param uint32_t Control value + * @return none + * + * Set the control register + */ +static __INLINE void __set_CONTROL(uint32_t control) +{ + register uint32_t __regControl __ASM("control"); + __regControl = control; +} + +#endif /* __ARMCC_VERSION */ + + + +#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ +/* IAR iccarm specific functions */ + +#define __enable_irq __enable_interrupt /*!< global Interrupt enable */ +#define __disable_irq __disable_interrupt /*!< global Interrupt disable */ + +static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } +static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } + +#define __NOP __no_operation() /*!< no operation intrinsic in IAR Compiler */ +static __INLINE void __WFI() { __ASM ("wfi"); } +static __INLINE void __WFE() { __ASM ("wfe"); } +static __INLINE void __SEV() { __ASM ("sev"); } +static __INLINE void __CLREX() { __ASM ("clrex"); } + +/* intrinsic void __ISB(void) */ +/* intrinsic void __DSB(void) */ +/* intrinsic void __DMB(void) */ +/* intrinsic void __set_PRIMASK(); */ +/* intrinsic void __get_PRIMASK(); */ +/* intrinsic void __set_FAULTMASK(); */ +/* intrinsic void __get_FAULTMASK(); */ +/* intrinsic uint32_t __REV(uint32_t value); */ +/* intrinsic uint32_t __REVSH(uint32_t value); */ +/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ +/* intrinsic unsigned long __LDREX(unsigned long *); */ + + +/** + * @brief Return the Process Stack Pointer + * + * @param none + * @return uint32_t ProcessStackPointer + * + * Return the actual process stack pointer + */ +extern uint32_t __get_PSP(void); + +/** + * @brief Set the Process Stack Pointer + * + * @param uint32_t Process Stack Pointer + * @return none + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +extern void __set_PSP(uint32_t topOfProcStack); + +/** + * @brief Return the Main Stack Pointer + * + * @param none + * @return uint32_t Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +extern uint32_t __get_MSP(void); + +/** + * @brief Set the Main Stack Pointer + * + * @param uint32_t Main Stack Pointer + * @return none + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +extern void __set_MSP(uint32_t topOfMainStack); + +/** + * @brief Reverse byte order in unsigned short value + * + * @param uint16_t value to reverse + * @return uint32_t reversed value + * + * Reverse byte order in unsigned short value + */ +extern uint32_t __REV16(uint16_t value); + +/** + * @brief Reverse bit order of value + * + * @param uint32_t value to reverse + * @return uint32_t reversed value + * + * Reverse bit order of value + */ +extern uint32_t __RBIT(uint32_t value); + +/** + * @brief LDR Exclusive + * + * @param uint8_t* address + * @return uint8_t value of (*address) + * + * Exclusive LDR command + */ +extern uint8_t __LDREXB(uint8_t *addr); + +/** + * @brief LDR Exclusive + * + * @param uint16_t* address + * @return uint16_t value of (*address) + * + * Exclusive LDR command + */ +extern uint16_t __LDREXH(uint16_t *addr); + +/** + * @brief LDR Exclusive + * + * @param uint32_t* address + * @return uint32_t value of (*address) + * + * Exclusive LDR command + */ +extern uint32_t __LDREXW(uint32_t *addr); + +/** + * @brief STR Exclusive + * + * @param uint8_t *address + * @param uint8_t value to store + * @return uint32_t successful / failed + * + * Exclusive STR command + */ +extern uint32_t __STREXB(uint8_t value, uint8_t *addr); + +/** + * @brief STR Exclusive + * + * @param uint16_t *address + * @param uint16_t value to store + * @return uint32_t successful / failed + * + * Exclusive STR command + */ +extern uint32_t __STREXH(uint16_t value, uint16_t *addr); + +/** + * @brief STR Exclusive + * + * @param uint32_t *address + * @param uint32_t value to store + * @return uint32_t successful / failed + * + * Exclusive STR command + */ +extern uint32_t __STREXW(uint32_t value, uint32_t *addr); + + + +#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ +/* GNU gcc specific functions */ + +static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } +static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } + +static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } +static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } + +static __INLINE void __NOP() { __ASM volatile ("nop"); } +static __INLINE void __WFI() { __ASM volatile ("wfi"); } +static __INLINE void __WFE() { __ASM volatile ("wfe"); } +static __INLINE void __SEV() { __ASM volatile ("sev"); } +static __INLINE void __ISB() { __ASM volatile ("isb"); } +static __INLINE void __DSB() { __ASM volatile ("dsb"); } +static __INLINE void __DMB() { __ASM volatile ("dmb"); } +static __INLINE void __CLREX() { __ASM volatile ("clrex"); } + + +/** + * @brief Return the Process Stack Pointer + * + * @param none + * @return uint32_t ProcessStackPointer + * + * Return the actual process stack pointer + */ +extern uint32_t __get_PSP(void); + +/** + * @brief Set the Process Stack Pointer + * + * @param uint32_t Process Stack Pointer + * @return none + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +extern void __set_PSP(uint32_t topOfProcStack); + +/** + * @brief Return the Main Stack Pointer + * + * @param none + * @return uint32_t Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +extern uint32_t __get_MSP(void); + +/** + * @brief Set the Main Stack Pointer + * + * @param uint32_t Main Stack Pointer + * @return none + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +extern void __set_MSP(uint32_t topOfMainStack); + +/** + * @brief Return the Base Priority value + * + * @param none + * @return uint32_t BasePriority + * + * Return the content of the base priority register + */ +extern uint32_t __get_BASEPRI(void); + +/** + * @brief Set the Base Priority value + * + * @param uint32_t BasePriority + * @return none + * + * Set the base priority register + */ +extern void __set_BASEPRI(uint32_t basePri); + +/** + * @brief Return the Priority Mask value + * + * @param none + * @return uint32_t PriMask + * + * Return the state of the priority mask bit from the priority mask + * register + */ +extern uint32_t __get_PRIMASK(void); + +/** + * @brief Set the Priority Mask value + * + * @param uint32_t PriMask + * @return none + * + * Set the priority mask bit in the priority mask register + */ +extern void __set_PRIMASK(uint32_t priMask); + +/** + * @brief Return the Fault Mask value + * + * @param none + * @return uint32_t FaultMask + * + * Return the content of the fault mask register + */ +extern uint32_t __get_FAULTMASK(void); + +/** + * @brief Set the Fault Mask value + * + * @param uint32_t faultMask value + * @return none + * + * Set the fault mask register + */ +extern void __set_FAULTMASK(uint32_t faultMask); + +/** + * @brief Return the Control Register value +* +* @param none +* @return uint32_t Control value + * + * Return the content of the control register + */ +extern uint32_t __get_CONTROL(void); + +/** + * @brief Set the Control Register value + * + * @param uint32_t Control value + * @return none + * + * Set the control register + */ +extern void __set_CONTROL(uint32_t control); + +/** + * @brief Reverse byte order in integer value + * + * @param uint32_t value to reverse + * @return uint32_t reversed value + * + * Reverse byte order in integer value + */ +extern uint32_t __REV(uint32_t value); + +/** + * @brief Reverse byte order in unsigned short value + * + * @param uint16_t value to reverse + * @return uint32_t reversed value + * + * Reverse byte order in unsigned short value + */ +extern uint32_t __REV16(uint16_t value); + +/* + * Reverse byte order in signed short value with sign extension to integer + * + * @param int16_t value to reverse + * @return int32_t reversed value + * + * @brief Reverse byte order in signed short value with sign extension to integer + */ +extern int32_t __REVSH(int16_t value); + +/** + * @brief Reverse bit order of value + * + * @param uint32_t value to reverse + * @return uint32_t reversed value + * + * Reverse bit order of value + */ +extern uint32_t __RBIT(uint32_t value); + +/** + * @brief LDR Exclusive + * + * @param uint8_t* address + * @return uint8_t value of (*address) + * + * Exclusive LDR command + */ +extern uint8_t __LDREXB(uint8_t *addr); + +/** + * @brief LDR Exclusive + * + * @param uint16_t* address + * @return uint16_t value of (*address) + * + * Exclusive LDR command + */ +extern uint16_t __LDREXH(uint16_t *addr); + +/** + * @brief LDR Exclusive + * + * @param uint32_t* address + * @return uint32_t value of (*address) + * + * Exclusive LDR command + */ +extern uint32_t __LDREXW(uint32_t *addr); + +/** + * @brief STR Exclusive + * + * @param uint8_t *address + * @param uint8_t value to store + * @return uint32_t successful / failed + * + * Exclusive STR command + */ +extern uint32_t __STREXB(uint8_t value, uint8_t *addr); + +/** + * @brief STR Exclusive + * + * @param uint16_t *address + * @param uint16_t value to store + * @return uint32_t successful / failed + * + * Exclusive STR command + */ +extern uint32_t __STREXH(uint16_t value, uint16_t *addr); + +/** + * @brief STR Exclusive + * + * @param uint32_t *address + * @param uint32_t value to store + * @return uint32_t successful / failed + * + * Exclusive STR command + */ +extern uint32_t __STREXW(uint32_t value, uint32_t *addr); + + +#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ +/* TASKING carm specific functions */ + +/* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all instrinsics, + * Including the CMSIS ones. + */ + +#endif + + + +/* ########################## NVIC functions #################################### */ + + +/** + * @brief Set the Priority Grouping in NVIC Interrupt Controller + * + * @param uint32_t priority_grouping is priority grouping field + * @return none + * + * Set the priority grouping field using the required unlock sequence. + * The parameter priority_grouping is assigned to the field + * SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. + * In case of a conflict between priority grouping and available + * priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + */ +static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((0xFFFFU << 16) | (0x0F << 8)); /* clear bits to change */ + reg_value = ((reg_value | NVIC_AIRCR_VECTKEY | (PriorityGroupTmp << 8))); /* Insert write key and priorty group */ + SCB->AIRCR = reg_value; +} + +/** + * @brief Get the Priority Grouping from NVIC Interrupt Controller + * + * @param none + * @return uint32_t priority grouping field + * + * Get the priority grouping from NVIC Interrupt Controller. + * priority grouping is SCB->AIRCR [10:8] PRIGROUP field. + */ +static __INLINE uint32_t NVIC_GetPriorityGrouping(void) +{ + return ((SCB->AIRCR >> 8) & 0x07); /* read priority grouping field */ +} + +/** + * @brief Enable Interrupt in NVIC Interrupt Controller + * + * @param IRQn_Type IRQn specifies the interrupt number + * @return none + * + * Enable a device specific interupt in the NVIC interrupt controller. + * The interrupt number cannot be a negative value. + */ +static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ +} + +/** + * @brief Disable the interrupt line for external interrupt specified + * + * @param IRQn_Type IRQn is the positive number of the external interrupt + * @return none + * + * Disable a device specific interupt in the NVIC interrupt controller. + * The interrupt number cannot be a negative value. + */ +static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ +} + +/** + * @brief Read the interrupt pending bit for a device specific interrupt source + * + * @param IRQn_Type IRQn is the number of the device specifc interrupt + * @return uint32_t 1 if pending interrupt else 0 + * + * Read the pending register in NVIC and return 1 if its status is pending, + * otherwise it returns 0 + */ +static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */ +} + +/** + * @brief Set the pending bit for an external interrupt + * + * @param IRQn_Type IRQn is the Number of the interrupt + * @return none + * + * Set the pending bit for the specified interrupt. + * The interrupt number cannot be a negative value. + */ +static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ +} + +/** + * @brief Clear the pending bit for an external interrupt + * + * @param IRQn_Type IRQn is the Number of the interrupt + * @return none + * + * Clear the pending bit for the specified interrupt. + * The interrupt number cannot be a negative value. + */ +static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ +} + +/** + * @brief Read the active bit for an external interrupt + * + * @param IRQn_Type IRQn is the Number of the interrupt + * @return uint32_t 1 if active else 0 + * + * Read the active register in NVIC and returns 1 if its status is active, + * otherwise it returns 0. + */ +static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) +{ + return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */ +} + +/** + * @brief Set the priority for an interrupt + * + * @param IRQn_Type IRQn is the Number of the interrupt + * @param priority is the priority for the interrupt + * @return none + * + * Set the priority for the specified interrupt. The interrupt + * number can be positive to specify an external (device specific) + * interrupt, or negative to specify an internal (core) interrupt. \n + * + * Note: The priority cannot be set for every core interrupt. + */ +static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if(IRQn < 0) { + SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ + else { + NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ +} + +/** + * @brief Read the priority for an interrupt + * + * @param IRQn_Type IRQn is the Number of the interrupt + * @return uint32_t priority is the priority for the interrupt + * + * Read the priority for the specified interrupt. The interrupt + * number can be positive to specify an external (device specific) + * interrupt, or negative to specify an internal (core) interrupt. + * + * The returned priority value is automatically aligned to the implemented + * priority bits of the microcontroller. + * + * Note: The priority cannot be set for every core interrupt. + */ +static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) +{ + + if(IRQn < 0) { + return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ + else { + return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ +} + + +/** + * @brief Encode the priority for an interrupt + * + * @param uint32_t PriorityGroup is the used priority group + * @param uint32_t PreemptPriority is the preemptive priority value (starting from 0) + * @param uint32_t SubPriority is the sub priority value (starting from 0) + * @return uint32_t the priority for the interrupt + * + * Encode the priority for an interrupt with the given priority group, + * preemptive priority value and sub priority value. + * In case of a conflict between priority grouping and available + * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. + * + * The returned priority value can be used for NVIC_SetPriority(...) function + */ +static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; + SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; + + return ( + ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) | + ((SubPriority & ((1 << (SubPriorityBits )) - 1))) + ); +} + + +/** + * @brief Decode the priority of an interrupt + * + * @param uint32_t Priority the priority for the interrupt + * @param uint32_t PrioGroup is the used priority group + * @param uint32_t* pPreemptPrio is the preemptive priority value (starting from 0) + * @param uint32_t* pSubPrio is the sub priority value (starting from 0) + * @return none + * + * Decode an interrupt priority value with the given priority group to + * preemptive priority value and sub priority value. + * In case of a conflict between priority grouping and available + * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. + * + * The priority value can be retrieved with NVIC_GetPriority(...) function + */ +static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; + SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; + + *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1); + *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1); +} + + + +/* ################################## SysTick function ############################################ */ + +#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) + +/* SysTick constants */ +#define SYSTICK_ENABLE 0 /* Config-Bit to start or stop the SysTick Timer */ +#define SYSTICK_TICKINT 1 /* Config-Bit to enable or disable the SysTick interrupt */ +#define SYSTICK_CLKSOURCE 2 /* Clocksource has the offset 2 in SysTick Control and Status Register */ +#define SYSTICK_MAXCOUNT ((1<<24) -1) /* SysTick MaxCount */ + +/** + * @brief Initialize and start the SysTick counter and its interrupt. + * + * @param uint32_t ticks is the number of ticks between two interrupts + * @return none + * + * Initialise the system tick timer and its interrupt and start the + * system tick timer / counter in free running mode to generate + * periodical interrupts. + */ +static __INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if (ticks > SYSTICK_MAXCOUNT) return (1); /* Reload value impossible */ + + SysTick->LOAD = (ticks & SYSTICK_MAXCOUNT) - 1; /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ + SysTick->VAL = (0x00); /* Load the SysTick Counter Value */ + SysTick->CTRL = (1 << SYSTICK_CLKSOURCE) | (1<AIRCR = (NVIC_AIRCR_VECTKEY | (SCB->AIRCR & (0x700)) | (1<DEMCR & CoreDebug_DEMCR_TRCENA) && + (ITM->TCR & ITM_TCR_ITMENA) && + (ITM->TER & (1UL << 0)) ) + { + while (ITM->PORT[0].u32 == 0); + ITM->PORT[0].u8 = (uint8_t) ch; + } + return (ch); +} + +#ifdef __cplusplus +} +#endif + +#endif /* __CM3_CORE_H__ */ + +/*lint -restore */ diff --git a/new_cmsis/LPC17xx.h b/new_cmsis/boards/lpc1768/board.h similarity index 96% rename from new_cmsis/LPC17xx.h rename to new_cmsis/boards/lpc1768/board.h index 0c783aa..afc0c9a 100644 --- a/new_cmsis/LPC17xx.h +++ b/new_cmsis/boards/lpc1768/board.h @@ -1,938 +1,938 @@ -/****************************************************************************** - * @file: LPC17xx.h - * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File for - * NXP LPC17xx Device Series - * @version: V1.1 - * @date: 14th May 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2008 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-M3 - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - -#ifndef __LPC17xx_H__ -#define __LPC17xx_H__ - -/* - * ========================================================================== - * ---------- Interrupt Number Definition ----------------------------------- - * ========================================================================== - */ - -typedef enum IRQn -{ -/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ - BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ - SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ - -/****** LPC17xx Specific Interrupt Numbers *******************************************************/ - WDT_IRQn = 0, /*!< Watchdog Timer Interrupt */ - TIMER0_IRQn = 1, /*!< Timer0 Interrupt */ - TIMER1_IRQn = 2, /*!< Timer1 Interrupt */ - TIMER2_IRQn = 3, /*!< Timer2 Interrupt */ - TIMER3_IRQn = 4, /*!< Timer3 Interrupt */ - UART0_IRQn = 5, /*!< UART0 Interrupt */ - UART1_IRQn = 6, /*!< UART1 Interrupt */ - UART2_IRQn = 7, /*!< UART2 Interrupt */ - UART3_IRQn = 8, /*!< UART3 Interrupt */ - PWM1_IRQn = 9, /*!< PWM1 Interrupt */ - I2C0_IRQn = 10, /*!< I2C0 Interrupt */ - I2C1_IRQn = 11, /*!< I2C1 Interrupt */ - I2C2_IRQn = 12, /*!< I2C2 Interrupt */ - SPI_IRQn = 13, /*!< SPI Interrupt */ - SSP0_IRQn = 14, /*!< SSP0 Interrupt */ - SSP1_IRQn = 15, /*!< SSP1 Interrupt */ - PLL0_IRQn = 16, /*!< PLL0 Lock (Main PLL) Interrupt */ - RTC_IRQn = 17, /*!< Real Time Clock Interrupt */ - EINT0_IRQn = 18, /*!< External Interrupt 0 Interrupt */ - EINT1_IRQn = 19, /*!< External Interrupt 1 Interrupt */ - EINT2_IRQn = 20, /*!< External Interrupt 2 Interrupt */ - EINT3_IRQn = 21, /*!< External Interrupt 3 Interrupt */ - ADC_IRQn = 22, /*!< A/D Converter Interrupt */ - BOD_IRQn = 23, /*!< Brown-Out Detect Interrupt */ - USB_IRQn = 24, /*!< USB Interrupt */ - CAN_IRQn = 25, /*!< CAN Interrupt */ - DMA_IRQn = 26, /*!< General Purpose DMA Interrupt */ - I2S_IRQn = 27, /*!< I2S Interrupt */ - ENET_IRQn = 28, /*!< Ethernet Interrupt */ - RIT_IRQn = 29, /*!< Repetitive Interrupt Timer Interrupt */ - MCPWM_IRQn = 30, /*!< Motor Control PWM Interrupt */ - QEI_IRQn = 31, /*!< Quadrature Encoder Interface Interrupt */ - PLL1_IRQn = 32, /*!< PLL1 Lock (USB PLL) Interrupt */ -} IRQn_Type; - - -/* - * ========================================================================== - * ----------- Processor and Core Peripheral Section ------------------------ - * ========================================================================== - */ - -/* Configuration of the Cortex-M3 Processor and Core Peripherals */ -#define __MPU_PRESENT 1 /*!< MPU present or not */ -#define __NVIC_PRIO_BITS 5 /*!< Number of Bits used for Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ - - -#include "core_cm3.h" /* Cortex-M3 processor and core peripherals */ -#include "system_LPC17xx.h" /* System Header */ - - - -/** - * Initialize the system clock - * - * @param none - * @return none - * - * @brief Setup the microcontroller system. - * Initialize the System and update the SystemFrequency variable. - */ -extern void SystemInit (void); - - -/******************************************************************************/ -/* Device Specific Peripheral registers structures */ -/******************************************************************************/ - -#pragma anon_unions - -/*------------- System Control (SC) ------------------------------------------*/ -typedef struct -{ - __IO uint32_t FLASHCFG; /* Flash Accelerator Module */ - uint32_t RESERVED0[31]; - __IO uint32_t PLL0CON; /* Clocking and Power Control */ - __IO uint32_t PLL0CFG; - __I uint32_t PLL0STAT; - __O uint32_t PLL0FEED; - uint32_t RESERVED1[4]; - __IO uint32_t PLL1CON; - __IO uint32_t PLL1CFG; - __I uint32_t PLL1STAT; - __O uint32_t PLL1FEED; - uint32_t RESERVED2[4]; - __IO uint32_t PCON; - __IO uint32_t PCONP; - uint32_t RESERVED3[15]; - __IO uint32_t CCLKCFG; - __IO uint32_t USBCLKCFG; - __IO uint32_t CLKSRCSEL; - uint32_t RESERVED4[12]; - __IO uint32_t EXTINT; /* External Interrupts */ - uint32_t RESERVED5; - __IO uint32_t EXTMODE; - __IO uint32_t EXTPOLAR; - uint32_t RESERVED6[12]; - __IO uint32_t RSID; /* Reset */ - uint32_t RESERVED7[7]; - __IO uint32_t SCS; /* Syscon Miscellaneous Registers */ - __IO uint32_t IRCTRIM; /* Clock Dividers */ - __IO uint32_t PCLKSEL0; - __IO uint32_t PCLKSEL1; - uint32_t RESERVED8[4]; - __IO uint32_t USBIntSt; /* USB Device/OTG Interrupt Register */ - uint32_t RESERVED9; - __IO uint32_t CLKOUTCFG; /* Clock Output Configuration */ - } SC_TypeDef; - -/*------------- Pin Connect Block (PINCON) -----------------------------------*/ -typedef struct -{ - __IO uint32_t PINSEL0; - __IO uint32_t PINSEL1; - __IO uint32_t PINSEL2; - __IO uint32_t PINSEL3; - __IO uint32_t PINSEL4; - __IO uint32_t PINSEL5; - __IO uint32_t PINSEL6; - __IO uint32_t PINSEL7; - __IO uint32_t PINSEL8; - __IO uint32_t PINSEL9; - __IO uint32_t PINSEL10; - uint32_t RESERVED0[5]; - __IO uint32_t PINMODE0; - __IO uint32_t PINMODE1; - __IO uint32_t PINMODE2; - __IO uint32_t PINMODE3; - __IO uint32_t PINMODE4; - __IO uint32_t PINMODE5; - __IO uint32_t PINMODE6; - __IO uint32_t PINMODE7; - __IO uint32_t PINMODE8; - __IO uint32_t PINMODE9; - __IO uint32_t PINMODE_OD0; - __IO uint32_t PINMODE_OD1; - __IO uint32_t PINMODE_OD2; - __IO uint32_t PINMODE_OD3; - __IO uint32_t PINMODE_OD4; -} PINCON_TypeDef; - -/*------------- General Purpose Input/Output (GPIO) --------------------------*/ -typedef struct -{ - __IO uint32_t FIODIR; - uint32_t RESERVED0[3]; - __IO uint32_t FIOMASK; - __IO uint32_t FIOPIN; - __IO uint32_t FIOSET; - __O uint32_t FIOCLR; -} GPIO_TypeDef; - -typedef struct -{ - __I uint32_t IntStatus; - __I uint32_t IO0IntStatR; - __I uint32_t IO0IntStatF; - __O uint32_t IO0IntClr; - __IO uint32_t IO0IntEnR; - __IO uint32_t IO0IntEnF; - uint32_t RESERVED0[3]; - __I uint32_t IO2IntStatR; - __I uint32_t IO2IntStatF; - __O uint32_t IO2IntClr; - __IO uint32_t IO2IntEnR; - __IO uint32_t IO2IntEnF; -} GPIOINT_TypeDef; - -/*------------- Timer (TIM) --------------------------------------------------*/ -typedef struct -{ - __IO uint32_t IR; - __IO uint32_t TCR; - __IO uint32_t TC; - __IO uint32_t PR; - __IO uint32_t PC; - __IO uint32_t MCR; - __IO uint32_t MR0; - __IO uint32_t MR1; - __IO uint32_t MR2; - __IO uint32_t MR3; - __IO uint32_t CCR; - __I uint32_t CR0; - __I uint32_t CR1; - uint32_t RESERVED0[2]; - __IO uint32_t EMR; - uint32_t RESERVED1[24]; - __IO uint32_t CTCR; -} TIM_TypeDef; - -/*------------- Pulse-Width Modulation (PWM) ---------------------------------*/ -typedef struct -{ - __IO uint32_t IR; - __IO uint32_t TCR; - __IO uint32_t TC; - __IO uint32_t PR; - __IO uint32_t PC; - __IO uint32_t MCR; - __IO uint32_t MR0; - __IO uint32_t MR1; - __IO uint32_t MR2; - __IO uint32_t MR3; - __IO uint32_t CCR; - __I uint32_t CR0; - __I uint32_t CR1; - __I uint32_t CR2; - __I uint32_t CR3; - __IO uint32_t MR4; - __IO uint32_t MR5; - __IO uint32_t MR6; - __IO uint32_t PCR; - __IO uint32_t LER; - uint32_t RESERVED0[7]; - __IO uint32_t CTCR; -} PWM_TypeDef; - -/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/ -typedef struct -{ - union { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[7]; - __IO uint8_t LSR; - uint8_t RESERVED2[7]; - __IO uint8_t SCR; - uint8_t RESERVED3[3]; - __IO uint32_t ACR; - __IO uint8_t ICR; - uint8_t RESERVED4[3]; - __IO uint8_t FDR; - uint8_t RESERVED5[7]; - __IO uint8_t TER; - uint8_t RESERVED6[27]; - __IO uint8_t RS485CTRL; - uint8_t RESERVED7[3]; - __IO uint8_t ADRMATCH; -} UART_TypeDef; - -typedef struct -{ - union { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[3]; - __IO uint8_t MCR; - uint8_t RESERVED2[3]; - __IO uint8_t LSR; - uint8_t RESERVED3[3]; - __IO uint8_t MSR; - uint8_t RESERVED4[3]; - __IO uint8_t SCR; - uint8_t RESERVED5[3]; - __IO uint32_t ACR; - uint32_t RESERVED6; - __IO uint32_t FDR; - uint32_t RESERVED7; - __IO uint8_t TER; - uint8_t RESERVED8[27]; - __IO uint8_t RS485CTRL; - uint8_t RESERVED9[3]; - __IO uint8_t ADRMATCH; - uint8_t RESERVED10[3]; - __IO uint8_t RS485DLY; -} UART1_TypeDef; - -/*------------- Serial Peripheral Interface (SPI) ----------------------------*/ -typedef struct -{ - __IO uint32_t SPCR; - __I uint32_t SPSR; - __IO uint32_t SPDR; - __IO uint32_t SPCCR; - uint32_t RESERVED0[3]; - __IO uint32_t SPINT; -} SPI_TypeDef; - -/*------------- Synchronous Serial Communication (SSP) -----------------------*/ -typedef struct -{ - __IO uint32_t CR0; - __IO uint32_t CR1; - __IO uint32_t DR; - __I uint32_t SR; - __IO uint32_t CPSR; - __IO uint32_t IMSC; - __IO uint32_t RIS; - __IO uint32_t MIS; - __IO uint32_t ICR; - __IO uint32_t DMACR; -} SSP_TypeDef; - -/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/ -typedef struct -{ - __IO uint32_t I2CONSET; - __I uint32_t I2STAT; - __IO uint32_t I2DAT; - __IO uint32_t I2ADR0; - __IO uint32_t I2SCLH; - __IO uint32_t I2SCLL; - __O uint32_t I2CONCLR; - __IO uint32_t MMCTRL; - __IO uint32_t I2ADR1; - __IO uint32_t I2ADR2; - __IO uint32_t I2ADR3; - __I uint32_t I2DATA_BUFFER; - __IO uint32_t I2MASK0; - __IO uint32_t I2MASK1; - __IO uint32_t I2MASK2; - __IO uint32_t I2MASK3; -} I2C_TypeDef; - -/*------------- Inter IC Sound (I2S) -----------------------------------------*/ -typedef struct -{ - __IO uint32_t I2SDAO; - __I uint32_t I2SDAI; - __O uint32_t I2STXFIFO; - __I uint32_t I2SRXFIFO; - __I uint32_t I2SSTATE; - __IO uint32_t I2SDMA1; - __IO uint32_t I2SDMA2; - __IO uint32_t I2SIRQ; - __IO uint32_t I2STXRATE; - __IO uint32_t I2SRXRATE; - __IO uint32_t I2STXBITRATE; - __IO uint32_t I2SRXBITRATE; - __IO uint32_t I2STXMODE; - __IO uint32_t I2SRXMODE; -} I2S_TypeDef; - -/*------------- Repetitive Interrupt Timer (RIT) -----------------------------*/ -typedef struct -{ - __IO uint32_t RICOMPVAL; - __IO uint32_t RIMASK; - __IO uint8_t RICTRL; - uint8_t RESERVED0[3]; - __IO uint32_t RICOUNTER; -} RIT_TypeDef; - -/*------------- Real-Time Clock (RTC) ----------------------------------------*/ -typedef struct -{ - __IO uint8_t ILR; - uint8_t RESERVED0[3]; - __IO uint8_t CCR; - uint8_t RESERVED1[3]; - __IO uint8_t CIIR; - uint8_t RESERVED2[3]; - __IO uint8_t AMR; - uint8_t RESERVED3[3]; - __I uint32_t CTIME0; - __I uint32_t CTIME1; - __I uint32_t CTIME2; - __IO uint8_t SEC; - uint8_t RESERVED4[3]; - __IO uint8_t MIN; - uint8_t RESERVED5[3]; - __IO uint8_t HOUR; - uint8_t RESERVED6[3]; - __IO uint8_t DOM; - uint8_t RESERVED7[3]; - __IO uint8_t DOW; - uint8_t RESERVED8[3]; - __IO uint16_t DOY; - uint16_t RESERVED9; - __IO uint8_t MONTH; - uint8_t RESERVED10[3]; - __IO uint16_t YEAR; - uint16_t RESERVED11; - __IO uint32_t CALIBRATION; - __IO uint32_t GPREG0; - __IO uint32_t GPREG1; - __IO uint32_t GPREG2; - __IO uint32_t GPREG3; - __IO uint32_t GPREG4; - __IO uint8_t WAKEUPDIS; - uint8_t RESERVED12[3]; - __IO uint8_t PWRCTRL; - uint8_t RESERVED13[3]; - __IO uint8_t ALSEC; - uint8_t RESERVED14[3]; - __IO uint8_t ALMIN; - uint8_t RESERVED15[3]; - __IO uint8_t ALHOUR; - uint8_t RESERVED16[3]; - __IO uint8_t ALDOM; - uint8_t RESERVED17[3]; - __IO uint8_t ALDOW; - uint8_t RESERVED18[3]; - __IO uint16_t ALDOY; - uint16_t RESERVED19; - __IO uint8_t ALMON; - uint8_t RESERVED20[3]; - __IO uint16_t ALYEAR; - uint16_t RESERVED21; -} RTC_TypeDef; - -/*------------- Watchdog Timer (WDT) -----------------------------------------*/ -typedef struct -{ - __IO uint8_t WDMOD; - uint8_t RESERVED0[3]; - __IO uint32_t WDTC; - __O uint8_t WDFEED; - uint8_t RESERVED1[3]; - __I uint32_t WDTV; - __IO uint32_t WDCLKSEL; -} WDT_TypeDef; - -/*------------- Analog-to-Digital Converter (ADC) ----------------------------*/ -typedef struct -{ - __IO uint32_t ADCR; - __IO uint32_t ADGDR; - uint32_t RESERVED0; - __IO uint32_t ADINTEN; - __I uint32_t ADDR0; - __I uint32_t ADDR1; - __I uint32_t ADDR2; - __I uint32_t ADDR3; - __I uint32_t ADDR4; - __I uint32_t ADDR5; - __I uint32_t ADDR6; - __I uint32_t ADDR7; - __I uint32_t ADSTAT; - __IO uint32_t ADTRM; -} ADC_TypeDef; - -/*------------- Digital-to-Analog Converter (DAC) ----------------------------*/ -typedef struct -{ - __IO uint32_t DACR; - __IO uint32_t DACCTRL; - __IO uint16_t DACCNTVAL; -} DAC_TypeDef; - -/*------------- Motor Control Pulse-Width Modulation (MCPWM) -----------------*/ -typedef struct -{ - __I uint32_t MCCON; - __O uint32_t MCCON_SET; - __O uint32_t MCCON_CLR; - __I uint32_t MCCAPCON; - __O uint32_t MCCAPCON_SET; - __O uint32_t MCCAPCON_CLR; - __IO uint32_t MCTIM0; - __IO uint32_t MCTIM1; - __IO uint32_t MCTIM2; - __IO uint32_t MCPER0; - __IO uint32_t MCPER1; - __IO uint32_t MCPER2; - __IO uint32_t MCPW0; - __IO uint32_t MCPW1; - __IO uint32_t MCPW2; - __IO uint32_t MCDEADTIME; - __IO uint32_t MCCCP; - __IO uint32_t MCCR0; - __IO uint32_t MCCR1; - __IO uint32_t MCCR2; - __I uint32_t MCINTEN; - __O uint32_t MCINTEN_SET; - __O uint32_t MCINTEN_CLR; - __I uint32_t MCCNTCON; - __O uint32_t MCCNTCON_SET; - __O uint32_t MCCNTCON_CLR; - __I uint32_t MCINTFLAG; - __O uint32_t MCINTFLAG_SET; - __O uint32_t MCINTFLAG_CLR; - __O uint32_t MCCAP_CLR; -} MCPWM_TypeDef; - -/*------------- Quadrature Encoder Interface (QEI) ---------------------------*/ -typedef struct -{ - __O uint32_t QEICON; - __I uint32_t QEISTAT; - __IO uint32_t QEICONF; - __I uint32_t QEIPOS; - __IO uint32_t QEIMAXPOS; - __IO uint32_t CMPOS0; - __IO uint32_t CMPOS1; - __IO uint32_t CMPOS2; - __I uint32_t INXCNT; - __IO uint32_t INXCMP; - __IO uint32_t QEILOAD; - __I uint32_t QEITIME; - __I uint32_t QEIVEL; - __I uint32_t QEICAP; - __IO uint32_t VELCOMP; - __IO uint32_t FILTER; - uint32_t RESERVED0[998]; - __O uint32_t QEIIEC; - __O uint32_t QEIIES; - __I uint32_t QEIINTSTAT; - __I uint32_t QEIIE; - __O uint32_t QEICLR; - __O uint32_t QEISET; -} QEI_TypeDef; - -/*------------- Controller Area Network (CAN) --------------------------------*/ -typedef struct -{ - __IO uint32_t mask[512]; /* ID Masks */ -} CANAF_RAM_TypeDef; - -typedef struct /* Acceptance Filter Registers */ -{ - __IO uint32_t AFMR; - __IO uint32_t SFF_sa; - __IO uint32_t SFF_GRP_sa; - __IO uint32_t EFF_sa; - __IO uint32_t EFF_GRP_sa; - __IO uint32_t ENDofTable; - __I uint32_t LUTerrAd; - __I uint32_t LUTerr; -} CANAF_TypeDef; - -typedef struct /* Central Registers */ -{ - __I uint32_t CANTxSR; - __I uint32_t CANRxSR; - __I uint32_t CANMSR; -} CANCR_TypeDef; - -typedef struct /* Controller Registers */ -{ - __IO uint32_t MOD; - __O uint32_t CMR; - __IO uint32_t GSR; - __I uint32_t ICR; - __IO uint32_t IER; - __IO uint32_t BTR; - __IO uint32_t EWL; - __I uint32_t SR; - __IO uint32_t RFS; - __IO uint32_t RID; - __IO uint32_t RDA; - __IO uint32_t RDB; - __IO uint32_t TFI1; - __IO uint32_t TID1; - __IO uint32_t TDA1; - __IO uint32_t TDB1; - __IO uint32_t TFI2; - __IO uint32_t TID2; - __IO uint32_t TDA2; - __IO uint32_t TDB2; - __IO uint32_t TFI3; - __IO uint32_t TID3; - __IO uint32_t TDA3; - __IO uint32_t TDB3; -} CAN_TypeDef; - -/*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/ -typedef struct /* Common Registers */ -{ - __I uint32_t DMACIntStat; - __I uint32_t DMACIntTCStat; - __O uint32_t DMACIntTCClear; - __I uint32_t DMACIntErrStat; - __O uint32_t DMACIntErrClr; - __I uint32_t DMACRawIntTCStat; - __I uint32_t DMACRawIntErrStat; - __I uint32_t DMACEnbldChns; - __IO uint32_t DMACSoftBReq; - __IO uint32_t DMACSoftSReq; - __IO uint32_t DMACSoftLBReq; - __IO uint32_t DMACSoftLSReq; - __IO uint32_t DMACConfig; - __IO uint32_t DMACSync; -} GPDMA_TypeDef; - -typedef struct /* Channel Registers */ -{ - __IO uint32_t DMACCSrcAddr; - __IO uint32_t DMACCDestAddr; - __IO uint32_t DMACCLLI; - __IO uint32_t DMACCControl; - __IO uint32_t DMACCConfig; -} GPDMACH_TypeDef; - -/*------------- Universal Serial Bus (USB) -----------------------------------*/ -typedef struct -{ - __I uint32_t HcRevision; /* USB Host Registers */ - __IO uint32_t HcControl; - __IO uint32_t HcCommandStatus; - __IO uint32_t HcInterruptStatus; - __IO uint32_t HcInterruptEnable; - __IO uint32_t HcInterruptDisable; - __IO uint32_t HcHCCA; - __I uint32_t HcPeriodCurrentED; - __IO uint32_t HcControlHeadED; - __IO uint32_t HcControlCurrentED; - __IO uint32_t HcBulkHeadED; - __IO uint32_t HcBulkCurrentED; - __I uint32_t HcDoneHead; - __IO uint32_t HcFmInterval; - __I uint32_t HcFmRemaining; - __I uint32_t HcFmNumber; - __IO uint32_t HcPeriodicStart; - __IO uint32_t HcLSTreshold; - __IO uint32_t HcRhDescriptorA; - __IO uint32_t HcRhDescriptorB; - __IO uint32_t HcRhStatus; - __IO uint32_t HcRhPortStatus1; - __IO uint32_t HcRhPortStatus2; - uint32_t RESERVED0[40]; - __I uint32_t Module_ID; - - __I uint32_t OTGIntSt; /* USB On-The-Go Registers */ - __IO uint32_t OTGIntEn; - __O uint32_t OTGIntSet; - __O uint32_t OTGIntClr; - __IO uint32_t OTGStCtrl; - __IO uint32_t OTGTmr; - uint32_t RESERVED1[58]; - - __I uint32_t USBDevIntSt; /* USB Device Interrupt Registers */ - __IO uint32_t USBDevIntEn; - __O uint32_t USBDevIntClr; - __O uint32_t USBDevIntSet; - - __O uint32_t USBCmdCode; /* USB Device SIE Command Registers */ - __I uint32_t USBCmdData; - - __I uint32_t USBRxData; /* USB Device Transfer Registers */ - __O uint32_t USBTxData; - __I uint32_t USBRxPLen; - __O uint32_t USBTxPLen; - __IO uint32_t USBCtrl; - __O uint32_t USBDevIntPri; - - __I uint32_t USBEpIntSt; /* USB Device Endpoint Interrupt Regs */ - __IO uint32_t USBEpIntEn; - __O uint32_t USBEpIntClr; - __O uint32_t USBEpIntSet; - __O uint32_t USBEpIntPri; - - __IO uint32_t USBReEp; /* USB Device Endpoint Realization Reg*/ - __O uint32_t USBEpInd; - __IO uint32_t USBMaxPSize; - - __I uint32_t USBDMARSt; /* USB Device DMA Registers */ - __O uint32_t USBDMARClr; - __O uint32_t USBDMARSet; - uint32_t RESERVED2[9]; - __IO uint32_t USBUDCAH; - __I uint32_t USBEpDMASt; - __O uint32_t USBEpDMAEn; - __O uint32_t USBEpDMADis; - __I uint32_t USBDMAIntSt; - __IO uint32_t USBDMAIntEn; - uint32_t RESERVED3[2]; - __I uint32_t USBEoTIntSt; - __O uint32_t USBEoTIntClr; - __O uint32_t USBEoTIntSet; - __I uint32_t USBNDDRIntSt; - __O uint32_t USBNDDRIntClr; - __O uint32_t USBNDDRIntSet; - __I uint32_t USBSysErrIntSt; - __O uint32_t USBSysErrIntClr; - __O uint32_t USBSysErrIntSet; - uint32_t RESERVED4[15]; - - __I uint32_t I2C_RX; /* USB OTG I2C Registers */ - __O uint32_t I2C_WO; - __I uint32_t I2C_STS; - __IO uint32_t I2C_CTL; - __IO uint32_t I2C_CLKHI; - __O uint32_t I2C_CLKLO; - uint32_t RESERVED5[823]; - - union { - __IO uint32_t USBClkCtrl; /* USB Clock Control Registers */ - __IO uint32_t OTGClkCtrl; - }; - union { - __I uint32_t USBClkSt; - __I uint32_t OTGClkSt; - }; -} USB_TypeDef; - -/*------------- Ethernet Media Access Controller (EMAC) ----------------------*/ -typedef struct -{ - __IO uint32_t MAC1; /* MAC Registers */ - __IO uint32_t MAC2; - __IO uint32_t IPGT; - __IO uint32_t IPGR; - __IO uint32_t CLRT; - __IO uint32_t MAXF; - __IO uint32_t SUPP; - __IO uint32_t TEST; - __IO uint32_t MCFG; - __IO uint32_t MCMD; - __IO uint32_t MADR; - __O uint32_t MWTD; - __I uint32_t MRDD; - __I uint32_t MIND; - uint32_t RESERVED0[2]; - __IO uint32_t SA0; - __IO uint32_t SA1; - __IO uint32_t SA2; - uint32_t RESERVED1[45]; - __IO uint32_t Command; /* Control Registers */ - __I uint32_t Status; - __IO uint32_t RxDescriptor; - __IO uint32_t RxStatus; - __IO uint32_t RxDescriptorNumber; - __I uint32_t RxProduceIndex; - __IO uint32_t RxConsumeIndex; - __IO uint32_t TxDescriptor; - __IO uint32_t TxStatus; - __IO uint32_t TxDescriptorNumber; - __IO uint32_t TxProduceIndex; - __I uint32_t TxConsumeIndex; - uint32_t RESERVED2[10]; - __I uint32_t TSV0; - __I uint32_t TSV1; - __I uint32_t RSV; - uint32_t RESERVED3[3]; - __IO uint32_t FlowControlCounter; - __I uint32_t FlowControlStatus; - uint32_t RESERVED4[34]; - __IO uint32_t RxFilterCtrl; /* Rx Filter Registers */ - __IO uint32_t RxFilterWoLStatus; - __IO uint32_t RxFilterWoLClear; - uint32_t RESERVED5; - __IO uint32_t HashFilterL; - __IO uint32_t HashFilterH; - uint32_t RESERVED6[882]; - __I uint32_t IntStatus; /* Module Control Registers */ - __IO uint32_t IntEnable; - __O uint32_t IntClear; - __O uint32_t IntSet; - uint32_t RESERVED7; - __IO uint32_t PowerDown; - uint32_t RESERVED8; - __IO uint32_t Module_ID; -} EMAC_TypeDef; - -#pragma no_anon_unions - - -/******************************************************************************/ -/* Peripheral memory map */ -/******************************************************************************/ -/* Base addresses */ -#define FLASH_BASE (0x00000000UL) -#define RAM_BASE (0x10000000UL) -#define GPIO_BASE (0x2009C000UL) -#define APB0_BASE (0x40000000UL) -#define APB1_BASE (0x40080000UL) -#define AHB_BASE (0x50000000UL) -#define CM3_BASE (0xE0000000UL) - -/* APB0 peripherals */ -#define WDT_BASE (APB0_BASE + 0x00000) -#define TIM0_BASE (APB0_BASE + 0x04000) -#define TIM1_BASE (APB0_BASE + 0x08000) -#define UART0_BASE (APB0_BASE + 0x0C000) -#define UART1_BASE (APB0_BASE + 0x10000) -#define PWM1_BASE (APB0_BASE + 0x18000) -#define I2C0_BASE (APB0_BASE + 0x1C000) -#define SPI_BASE (APB0_BASE + 0x20000) -#define RTC_BASE (APB0_BASE + 0x24000) -#define GPIOINT_BASE (APB0_BASE + 0x28080) -#define PINCON_BASE (APB0_BASE + 0x2C000) -#define SSP1_BASE (APB0_BASE + 0x30000) -#define ADC_BASE (APB0_BASE + 0x34000) -#define CANAF_RAM_BASE (APB0_BASE + 0x38000) -#define CANAF_BASE (APB0_BASE + 0x3C000) -#define CANCR_BASE (APB0_BASE + 0x40000) -#define CAN1_BASE (APB0_BASE + 0x44000) -#define CAN2_BASE (APB0_BASE + 0x48000) -#define I2C1_BASE (APB0_BASE + 0x5C000) - -/* APB1 peripherals */ -#define SSP0_BASE (APB1_BASE + 0x08000) -#define DAC_BASE (APB1_BASE + 0x0C000) -#define TIM2_BASE (APB1_BASE + 0x10000) -#define TIM3_BASE (APB1_BASE + 0x14000) -#define UART2_BASE (APB1_BASE + 0x18000) -#define UART3_BASE (APB1_BASE + 0x1C000) -#define I2C2_BASE (APB1_BASE + 0x20000) -#define I2S_BASE (APB1_BASE + 0x28000) -#define RIT_BASE (APB1_BASE + 0x30000) -#define MCPWM_BASE (APB1_BASE + 0x38000) -#define QEI_BASE (APB1_BASE + 0x3C000) -#define SC_BASE (APB1_BASE + 0x7C000) - -/* AHB peripherals */ -#define EMAC_BASE (AHB_BASE + 0x00000) -#define GPDMA_BASE (AHB_BASE + 0x04000) -#define GPDMACH0_BASE (AHB_BASE + 0x04100) -#define GPDMACH1_BASE (AHB_BASE + 0x04120) -#define GPDMACH2_BASE (AHB_BASE + 0x04140) -#define GPDMACH3_BASE (AHB_BASE + 0x04160) -#define GPDMACH4_BASE (AHB_BASE + 0x04180) -#define GPDMACH5_BASE (AHB_BASE + 0x041A0) -#define GPDMACH6_BASE (AHB_BASE + 0x041C0) -#define GPDMACH7_BASE (AHB_BASE + 0x041E0) -#define USB_BASE (AHB_BASE + 0x0C000) - -/* GPIOs */ -#define GPIO0_BASE (GPIO_BASE + 0x00000) -#define GPIO1_BASE (GPIO_BASE + 0x00020) -#define GPIO2_BASE (GPIO_BASE + 0x00040) -#define GPIO3_BASE (GPIO_BASE + 0x00060) -#define GPIO4_BASE (GPIO_BASE + 0x00080) - - -/******************************************************************************/ -/* Peripheral declaration */ -/******************************************************************************/ -#define SC (( SC_TypeDef *) SC_BASE) -#define GPIO0 (( GPIO_TypeDef *) GPIO0_BASE) -#define GPIO1 (( GPIO_TypeDef *) GPIO1_BASE) -#define GPIO2 (( GPIO_TypeDef *) GPIO2_BASE) -#define GPIO3 (( GPIO_TypeDef *) GPIO3_BASE) -#define GPIO4 (( GPIO_TypeDef *) GPIO4_BASE) -#define WDT (( WDT_TypeDef *) WDT_BASE) -#define TIM0 (( TIM_TypeDef *) TIM0_BASE) -#define TIM1 (( TIM_TypeDef *) TIM1_BASE) -#define TIM2 (( TIM_TypeDef *) TIM2_BASE) -#define TIM3 (( TIM_TypeDef *) TIM3_BASE) -#define RIT (( RIT_TypeDef *) RIT_BASE) -#define UART0 (( UART_TypeDef *) UART0_BASE) -#define UART1 (( UART1_TypeDef *) UART1_BASE) -#define UART2 (( UART_TypeDef *) UART2_BASE) -#define UART3 (( UART_TypeDef *) UART3_BASE) -#define PWM1 (( PWM_TypeDef *) PWM1_BASE) -#define I2C0 (( I2C_TypeDef *) I2C0_BASE) -#define I2C1 (( I2C_TypeDef *) I2C1_BASE) -#define I2C2 (( I2C_TypeDef *) I2C2_BASE) -#define I2S (( I2S_TypeDef *) I2S_BASE) -#define SPI (( SPI_TypeDef *) SPI_BASE) -#define RTC (( RTC_TypeDef *) RTC_BASE) -#define GPIOINT (( GPIOINT_TypeDef *) GPIOINT_BASE) -#define PINCON (( PINCON_TypeDef *) PINCON_BASE) -#define SSP0 (( SSP_TypeDef *) SSP0_BASE) -#define SSP1 (( SSP_TypeDef *) SSP1_BASE) -#define ADC (( ADC_TypeDef *) ADC_BASE) -#define DAC (( DAC_TypeDef *) DAC_BASE) -#define CANAF_RAM ((CANAF_RAM_TypeDef *) CANAF_RAM_BASE) -#define CANAF (( CANAF_TypeDef *) CANAF_BASE) -#define CANCR (( CANCR_TypeDef *) CANCR_BASE) -#define CAN1 (( CAN_TypeDef *) CAN1_BASE) -#define CAN2 (( CAN_TypeDef *) CAN2_BASE) -#define MCPWM (( MCPWM_TypeDef *) MCPWM_BASE) -#define QEI (( QEI_TypeDef *) QEI_BASE) -#define EMAC (( EMAC_TypeDef *) EMAC_BASE) -#define GPDMA (( GPDMA_TypeDef *) GPDMA_BASE) -#define GPDMACH0 (( GPDMACH_TypeDef *) GPDMACH0_BASE) -#define GPDMACH1 (( GPDMACH_TypeDef *) GPDMACH1_BASE) -#define GPDMACH2 (( GPDMACH_TypeDef *) GPDMACH2_BASE) -#define GPDMACH3 (( GPDMACH_TypeDef *) GPDMACH3_BASE) -#define GPDMACH4 (( GPDMACH_TypeDef *) GPDMACH4_BASE) -#define GPDMACH5 (( GPDMACH_TypeDef *) GPDMACH5_BASE) -#define GPDMACH6 (( GPDMACH_TypeDef *) GPDMACH6_BASE) -#define GPDMACH7 (( GPDMACH_TypeDef *) GPDMACH7_BASE) -#define USB (( USB_TypeDef *) USB_BASE) - -#endif // __LPC17xx_H__ +/****************************************************************************** + * @file: LPC17xx.h + * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File for + * NXP LPC17xx Device Series + * @version: V1.1 + * @date: 14th May 2009 + *---------------------------------------------------------------------------- + * + * Copyright (C) 2008 ARM Limited. All rights reserved. + * + * ARM Limited (ARM) is supplying this software for use with Cortex-M3 + * processor based microcontrollers. This file can be freely distributed + * within development tools that are supporting such ARM based processors. + * + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + ******************************************************************************/ + + +#ifndef __LPC17xx_H__ +#define __LPC17xx_H__ + +/* + * ========================================================================== + * ---------- Interrupt Number Definition ----------------------------------- + * ========================================================================== + */ + +typedef enum IRQn +{ +/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ + NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ + MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ + BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ + SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ + SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ + +/****** LPC17xx Specific Interrupt Numbers *******************************************************/ + WDT_IRQn = 0, /*!< Watchdog Timer Interrupt */ + TIMER0_IRQn = 1, /*!< Timer0 Interrupt */ + TIMER1_IRQn = 2, /*!< Timer1 Interrupt */ + TIMER2_IRQn = 3, /*!< Timer2 Interrupt */ + TIMER3_IRQn = 4, /*!< Timer3 Interrupt */ + UART0_IRQn = 5, /*!< UART0 Interrupt */ + UART1_IRQn = 6, /*!< UART1 Interrupt */ + UART2_IRQn = 7, /*!< UART2 Interrupt */ + UART3_IRQn = 8, /*!< UART3 Interrupt */ + PWM1_IRQn = 9, /*!< PWM1 Interrupt */ + I2C0_IRQn = 10, /*!< I2C0 Interrupt */ + I2C1_IRQn = 11, /*!< I2C1 Interrupt */ + I2C2_IRQn = 12, /*!< I2C2 Interrupt */ + SPI_IRQn = 13, /*!< SPI Interrupt */ + SSP0_IRQn = 14, /*!< SSP0 Interrupt */ + SSP1_IRQn = 15, /*!< SSP1 Interrupt */ + PLL0_IRQn = 16, /*!< PLL0 Lock (Main PLL) Interrupt */ + RTC_IRQn = 17, /*!< Real Time Clock Interrupt */ + EINT0_IRQn = 18, /*!< External Interrupt 0 Interrupt */ + EINT1_IRQn = 19, /*!< External Interrupt 1 Interrupt */ + EINT2_IRQn = 20, /*!< External Interrupt 2 Interrupt */ + EINT3_IRQn = 21, /*!< External Interrupt 3 Interrupt */ + ADC_IRQn = 22, /*!< A/D Converter Interrupt */ + BOD_IRQn = 23, /*!< Brown-Out Detect Interrupt */ + USB_IRQn = 24, /*!< USB Interrupt */ + CAN_IRQn = 25, /*!< CAN Interrupt */ + DMA_IRQn = 26, /*!< General Purpose DMA Interrupt */ + I2S_IRQn = 27, /*!< I2S Interrupt */ + ENET_IRQn = 28, /*!< Ethernet Interrupt */ + RIT_IRQn = 29, /*!< Repetitive Interrupt Timer Interrupt */ + MCPWM_IRQn = 30, /*!< Motor Control PWM Interrupt */ + QEI_IRQn = 31, /*!< Quadrature Encoder Interface Interrupt */ + PLL1_IRQn = 32, /*!< PLL1 Lock (USB PLL) Interrupt */ +} IRQn_Type; + + +/* + * ========================================================================== + * ----------- Processor and Core Peripheral Section ------------------------ + * ========================================================================== + */ + +/* Configuration of the Cortex-M3 Processor and Core Peripherals */ +#define __MPU_PRESENT 1 /*!< MPU present or not */ +#define __NVIC_PRIO_BITS 5 /*!< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ + + +#include "../cortex_m3/core_cm3.h" /* Cortex-M3 processor and core peripherals */ +#include "system.h" /* System Header */ + + + +/** + * Initialize the system clock + * + * @param none + * @return none + * + * @brief Setup the microcontroller system. + * Initialize the System and update the SystemFrequency variable. + */ +extern void SystemInit (void); + + +/******************************************************************************/ +/* Device Specific Peripheral registers structures */ +/******************************************************************************/ + +#pragma anon_unions + +/*------------- System Control (SC) ------------------------------------------*/ +typedef struct +{ + __IO uint32_t FLASHCFG; /* Flash Accelerator Module */ + uint32_t RESERVED0[31]; + __IO uint32_t PLL0CON; /* Clocking and Power Control */ + __IO uint32_t PLL0CFG; + __I uint32_t PLL0STAT; + __O uint32_t PLL0FEED; + uint32_t RESERVED1[4]; + __IO uint32_t PLL1CON; + __IO uint32_t PLL1CFG; + __I uint32_t PLL1STAT; + __O uint32_t PLL1FEED; + uint32_t RESERVED2[4]; + __IO uint32_t PCON; + __IO uint32_t PCONP; + uint32_t RESERVED3[15]; + __IO uint32_t CCLKCFG; + __IO uint32_t USBCLKCFG; + __IO uint32_t CLKSRCSEL; + uint32_t RESERVED4[12]; + __IO uint32_t EXTINT; /* External Interrupts */ + uint32_t RESERVED5; + __IO uint32_t EXTMODE; + __IO uint32_t EXTPOLAR; + uint32_t RESERVED6[12]; + __IO uint32_t RSID; /* Reset */ + uint32_t RESERVED7[7]; + __IO uint32_t SCS; /* Syscon Miscellaneous Registers */ + __IO uint32_t IRCTRIM; /* Clock Dividers */ + __IO uint32_t PCLKSEL0; + __IO uint32_t PCLKSEL1; + uint32_t RESERVED8[4]; + __IO uint32_t USBIntSt; /* USB Device/OTG Interrupt Register */ + uint32_t RESERVED9; + __IO uint32_t CLKOUTCFG; /* Clock Output Configuration */ + } SC_TypeDef; + +/*------------- Pin Connect Block (PINCON) -----------------------------------*/ +typedef struct +{ + __IO uint32_t PINSEL0; + __IO uint32_t PINSEL1; + __IO uint32_t PINSEL2; + __IO uint32_t PINSEL3; + __IO uint32_t PINSEL4; + __IO uint32_t PINSEL5; + __IO uint32_t PINSEL6; + __IO uint32_t PINSEL7; + __IO uint32_t PINSEL8; + __IO uint32_t PINSEL9; + __IO uint32_t PINSEL10; + uint32_t RESERVED0[5]; + __IO uint32_t PINMODE0; + __IO uint32_t PINMODE1; + __IO uint32_t PINMODE2; + __IO uint32_t PINMODE3; + __IO uint32_t PINMODE4; + __IO uint32_t PINMODE5; + __IO uint32_t PINMODE6; + __IO uint32_t PINMODE7; + __IO uint32_t PINMODE8; + __IO uint32_t PINMODE9; + __IO uint32_t PINMODE_OD0; + __IO uint32_t PINMODE_OD1; + __IO uint32_t PINMODE_OD2; + __IO uint32_t PINMODE_OD3; + __IO uint32_t PINMODE_OD4; +} PINCON_TypeDef; + +/*------------- General Purpose Input/Output (GPIO) --------------------------*/ +typedef struct +{ + __IO uint32_t FIODIR; + uint32_t RESERVED0[3]; + __IO uint32_t FIOMASK; + __IO uint32_t FIOPIN; + __IO uint32_t FIOSET; + __O uint32_t FIOCLR; +} GPIO_TypeDef; + +typedef struct +{ + __I uint32_t IntStatus; + __I uint32_t IO0IntStatR; + __I uint32_t IO0IntStatF; + __O uint32_t IO0IntClr; + __IO uint32_t IO0IntEnR; + __IO uint32_t IO0IntEnF; + uint32_t RESERVED0[3]; + __I uint32_t IO2IntStatR; + __I uint32_t IO2IntStatF; + __O uint32_t IO2IntClr; + __IO uint32_t IO2IntEnR; + __IO uint32_t IO2IntEnF; +} GPIOINT_TypeDef; + +/*------------- Timer (TIM) --------------------------------------------------*/ +typedef struct +{ + __IO uint32_t IR; + __IO uint32_t TCR; + __IO uint32_t TC; + __IO uint32_t PR; + __IO uint32_t PC; + __IO uint32_t MCR; + __IO uint32_t MR0; + __IO uint32_t MR1; + __IO uint32_t MR2; + __IO uint32_t MR3; + __IO uint32_t CCR; + __I uint32_t CR0; + __I uint32_t CR1; + uint32_t RESERVED0[2]; + __IO uint32_t EMR; + uint32_t RESERVED1[24]; + __IO uint32_t CTCR; +} TIM_TypeDef; + +/*------------- Pulse-Width Modulation (PWM) ---------------------------------*/ +typedef struct +{ + __IO uint32_t IR; + __IO uint32_t TCR; + __IO uint32_t TC; + __IO uint32_t PR; + __IO uint32_t PC; + __IO uint32_t MCR; + __IO uint32_t MR0; + __IO uint32_t MR1; + __IO uint32_t MR2; + __IO uint32_t MR3; + __IO uint32_t CCR; + __I uint32_t CR0; + __I uint32_t CR1; + __I uint32_t CR2; + __I uint32_t CR3; + __IO uint32_t MR4; + __IO uint32_t MR5; + __IO uint32_t MR6; + __IO uint32_t PCR; + __IO uint32_t LER; + uint32_t RESERVED0[7]; + __IO uint32_t CTCR; +} PWM_TypeDef; + +/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/ +typedef struct +{ + union { + __I uint8_t RBR; + __O uint8_t THR; + __IO uint8_t DLL; + uint32_t RESERVED0; + }; + union { + __IO uint8_t DLM; + __IO uint32_t IER; + }; + union { + __I uint32_t IIR; + __O uint8_t FCR; + }; + __IO uint8_t LCR; + uint8_t RESERVED1[7]; + __IO uint8_t LSR; + uint8_t RESERVED2[7]; + __IO uint8_t SCR; + uint8_t RESERVED3[3]; + __IO uint32_t ACR; + __IO uint8_t ICR; + uint8_t RESERVED4[3]; + __IO uint8_t FDR; + uint8_t RESERVED5[7]; + __IO uint8_t TER; + uint8_t RESERVED6[27]; + __IO uint8_t RS485CTRL; + uint8_t RESERVED7[3]; + __IO uint8_t ADRMATCH; +} UART_TypeDef; + +typedef struct +{ + union { + __I uint8_t RBR; + __O uint8_t THR; + __IO uint8_t DLL; + uint32_t RESERVED0; + }; + union { + __IO uint8_t DLM; + __IO uint32_t IER; + }; + union { + __I uint32_t IIR; + __O uint8_t FCR; + }; + __IO uint8_t LCR; + uint8_t RESERVED1[3]; + __IO uint8_t MCR; + uint8_t RESERVED2[3]; + __IO uint8_t LSR; + uint8_t RESERVED3[3]; + __IO uint8_t MSR; + uint8_t RESERVED4[3]; + __IO uint8_t SCR; + uint8_t RESERVED5[3]; + __IO uint32_t ACR; + uint32_t RESERVED6; + __IO uint32_t FDR; + uint32_t RESERVED7; + __IO uint8_t TER; + uint8_t RESERVED8[27]; + __IO uint8_t RS485CTRL; + uint8_t RESERVED9[3]; + __IO uint8_t ADRMATCH; + uint8_t RESERVED10[3]; + __IO uint8_t RS485DLY; +} UART1_TypeDef; + +/*------------- Serial Peripheral Interface (SPI) ----------------------------*/ +typedef struct +{ + __IO uint32_t SPCR; + __I uint32_t SPSR; + __IO uint32_t SPDR; + __IO uint32_t SPCCR; + uint32_t RESERVED0[3]; + __IO uint32_t SPINT; +} SPI_TypeDef; + +/*------------- Synchronous Serial Communication (SSP) -----------------------*/ +typedef struct +{ + __IO uint32_t CR0; + __IO uint32_t CR1; + __IO uint32_t DR; + __I uint32_t SR; + __IO uint32_t CPSR; + __IO uint32_t IMSC; + __IO uint32_t RIS; + __IO uint32_t MIS; + __IO uint32_t ICR; + __IO uint32_t DMACR; +} SSP_TypeDef; + +/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/ +typedef struct +{ + __IO uint32_t I2CONSET; + __I uint32_t I2STAT; + __IO uint32_t I2DAT; + __IO uint32_t I2ADR0; + __IO uint32_t I2SCLH; + __IO uint32_t I2SCLL; + __O uint32_t I2CONCLR; + __IO uint32_t MMCTRL; + __IO uint32_t I2ADR1; + __IO uint32_t I2ADR2; + __IO uint32_t I2ADR3; + __I uint32_t I2DATA_BUFFER; + __IO uint32_t I2MASK0; + __IO uint32_t I2MASK1; + __IO uint32_t I2MASK2; + __IO uint32_t I2MASK3; +} I2C_TypeDef; + +/*------------- Inter IC Sound (I2S) -----------------------------------------*/ +typedef struct +{ + __IO uint32_t I2SDAO; + __I uint32_t I2SDAI; + __O uint32_t I2STXFIFO; + __I uint32_t I2SRXFIFO; + __I uint32_t I2SSTATE; + __IO uint32_t I2SDMA1; + __IO uint32_t I2SDMA2; + __IO uint32_t I2SIRQ; + __IO uint32_t I2STXRATE; + __IO uint32_t I2SRXRATE; + __IO uint32_t I2STXBITRATE; + __IO uint32_t I2SRXBITRATE; + __IO uint32_t I2STXMODE; + __IO uint32_t I2SRXMODE; +} I2S_TypeDef; + +/*------------- Repetitive Interrupt Timer (RIT) -----------------------------*/ +typedef struct +{ + __IO uint32_t RICOMPVAL; + __IO uint32_t RIMASK; + __IO uint8_t RICTRL; + uint8_t RESERVED0[3]; + __IO uint32_t RICOUNTER; +} RIT_TypeDef; + +/*------------- Real-Time Clock (RTC) ----------------------------------------*/ +typedef struct +{ + __IO uint8_t ILR; + uint8_t RESERVED0[3]; + __IO uint8_t CCR; + uint8_t RESERVED1[3]; + __IO uint8_t CIIR; + uint8_t RESERVED2[3]; + __IO uint8_t AMR; + uint8_t RESERVED3[3]; + __I uint32_t CTIME0; + __I uint32_t CTIME1; + __I uint32_t CTIME2; + __IO uint8_t SEC; + uint8_t RESERVED4[3]; + __IO uint8_t MIN; + uint8_t RESERVED5[3]; + __IO uint8_t HOUR; + uint8_t RESERVED6[3]; + __IO uint8_t DOM; + uint8_t RESERVED7[3]; + __IO uint8_t DOW; + uint8_t RESERVED8[3]; + __IO uint16_t DOY; + uint16_t RESERVED9; + __IO uint8_t MONTH; + uint8_t RESERVED10[3]; + __IO uint16_t YEAR; + uint16_t RESERVED11; + __IO uint32_t CALIBRATION; + __IO uint32_t GPREG0; + __IO uint32_t GPREG1; + __IO uint32_t GPREG2; + __IO uint32_t GPREG3; + __IO uint32_t GPREG4; + __IO uint8_t WAKEUPDIS; + uint8_t RESERVED12[3]; + __IO uint8_t PWRCTRL; + uint8_t RESERVED13[3]; + __IO uint8_t ALSEC; + uint8_t RESERVED14[3]; + __IO uint8_t ALMIN; + uint8_t RESERVED15[3]; + __IO uint8_t ALHOUR; + uint8_t RESERVED16[3]; + __IO uint8_t ALDOM; + uint8_t RESERVED17[3]; + __IO uint8_t ALDOW; + uint8_t RESERVED18[3]; + __IO uint16_t ALDOY; + uint16_t RESERVED19; + __IO uint8_t ALMON; + uint8_t RESERVED20[3]; + __IO uint16_t ALYEAR; + uint16_t RESERVED21; +} RTC_TypeDef; + +/*------------- Watchdog Timer (WDT) -----------------------------------------*/ +typedef struct +{ + __IO uint8_t WDMOD; + uint8_t RESERVED0[3]; + __IO uint32_t WDTC; + __O uint8_t WDFEED; + uint8_t RESERVED1[3]; + __I uint32_t WDTV; + __IO uint32_t WDCLKSEL; +} WDT_TypeDef; + +/*------------- Analog-to-Digital Converter (ADC) ----------------------------*/ +typedef struct +{ + __IO uint32_t ADCR; + __IO uint32_t ADGDR; + uint32_t RESERVED0; + __IO uint32_t ADINTEN; + __I uint32_t ADDR0; + __I uint32_t ADDR1; + __I uint32_t ADDR2; + __I uint32_t ADDR3; + __I uint32_t ADDR4; + __I uint32_t ADDR5; + __I uint32_t ADDR6; + __I uint32_t ADDR7; + __I uint32_t ADSTAT; + __IO uint32_t ADTRM; +} ADC_TypeDef; + +/*------------- Digital-to-Analog Converter (DAC) ----------------------------*/ +typedef struct +{ + __IO uint32_t DACR; + __IO uint32_t DACCTRL; + __IO uint16_t DACCNTVAL; +} DAC_TypeDef; + +/*------------- Motor Control Pulse-Width Modulation (MCPWM) -----------------*/ +typedef struct +{ + __I uint32_t MCCON; + __O uint32_t MCCON_SET; + __O uint32_t MCCON_CLR; + __I uint32_t MCCAPCON; + __O uint32_t MCCAPCON_SET; + __O uint32_t MCCAPCON_CLR; + __IO uint32_t MCTIM0; + __IO uint32_t MCTIM1; + __IO uint32_t MCTIM2; + __IO uint32_t MCPER0; + __IO uint32_t MCPER1; + __IO uint32_t MCPER2; + __IO uint32_t MCPW0; + __IO uint32_t MCPW1; + __IO uint32_t MCPW2; + __IO uint32_t MCDEADTIME; + __IO uint32_t MCCCP; + __IO uint32_t MCCR0; + __IO uint32_t MCCR1; + __IO uint32_t MCCR2; + __I uint32_t MCINTEN; + __O uint32_t MCINTEN_SET; + __O uint32_t MCINTEN_CLR; + __I uint32_t MCCNTCON; + __O uint32_t MCCNTCON_SET; + __O uint32_t MCCNTCON_CLR; + __I uint32_t MCINTFLAG; + __O uint32_t MCINTFLAG_SET; + __O uint32_t MCINTFLAG_CLR; + __O uint32_t MCCAP_CLR; +} MCPWM_TypeDef; + +/*------------- Quadrature Encoder Interface (QEI) ---------------------------*/ +typedef struct +{ + __O uint32_t QEICON; + __I uint32_t QEISTAT; + __IO uint32_t QEICONF; + __I uint32_t QEIPOS; + __IO uint32_t QEIMAXPOS; + __IO uint32_t CMPOS0; + __IO uint32_t CMPOS1; + __IO uint32_t CMPOS2; + __I uint32_t INXCNT; + __IO uint32_t INXCMP; + __IO uint32_t QEILOAD; + __I uint32_t QEITIME; + __I uint32_t QEIVEL; + __I uint32_t QEICAP; + __IO uint32_t VELCOMP; + __IO uint32_t FILTER; + uint32_t RESERVED0[998]; + __O uint32_t QEIIEC; + __O uint32_t QEIIES; + __I uint32_t QEIINTSTAT; + __I uint32_t QEIIE; + __O uint32_t QEICLR; + __O uint32_t QEISET; +} QEI_TypeDef; + +/*------------- Controller Area Network (CAN) --------------------------------*/ +typedef struct +{ + __IO uint32_t mask[512]; /* ID Masks */ +} CANAF_RAM_TypeDef; + +typedef struct /* Acceptance Filter Registers */ +{ + __IO uint32_t AFMR; + __IO uint32_t SFF_sa; + __IO uint32_t SFF_GRP_sa; + __IO uint32_t EFF_sa; + __IO uint32_t EFF_GRP_sa; + __IO uint32_t ENDofTable; + __I uint32_t LUTerrAd; + __I uint32_t LUTerr; +} CANAF_TypeDef; + +typedef struct /* Central Registers */ +{ + __I uint32_t CANTxSR; + __I uint32_t CANRxSR; + __I uint32_t CANMSR; +} CANCR_TypeDef; + +typedef struct /* Controller Registers */ +{ + __IO uint32_t MOD; + __O uint32_t CMR; + __IO uint32_t GSR; + __I uint32_t ICR; + __IO uint32_t IER; + __IO uint32_t BTR; + __IO uint32_t EWL; + __I uint32_t SR; + __IO uint32_t RFS; + __IO uint32_t RID; + __IO uint32_t RDA; + __IO uint32_t RDB; + __IO uint32_t TFI1; + __IO uint32_t TID1; + __IO uint32_t TDA1; + __IO uint32_t TDB1; + __IO uint32_t TFI2; + __IO uint32_t TID2; + __IO uint32_t TDA2; + __IO uint32_t TDB2; + __IO uint32_t TFI3; + __IO uint32_t TID3; + __IO uint32_t TDA3; + __IO uint32_t TDB3; +} CAN_TypeDef; + +/*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/ +typedef struct /* Common Registers */ +{ + __I uint32_t DMACIntStat; + __I uint32_t DMACIntTCStat; + __O uint32_t DMACIntTCClear; + __I uint32_t DMACIntErrStat; + __O uint32_t DMACIntErrClr; + __I uint32_t DMACRawIntTCStat; + __I uint32_t DMACRawIntErrStat; + __I uint32_t DMACEnbldChns; + __IO uint32_t DMACSoftBReq; + __IO uint32_t DMACSoftSReq; + __IO uint32_t DMACSoftLBReq; + __IO uint32_t DMACSoftLSReq; + __IO uint32_t DMACConfig; + __IO uint32_t DMACSync; +} GPDMA_TypeDef; + +typedef struct /* Channel Registers */ +{ + __IO uint32_t DMACCSrcAddr; + __IO uint32_t DMACCDestAddr; + __IO uint32_t DMACCLLI; + __IO uint32_t DMACCControl; + __IO uint32_t DMACCConfig; +} GPDMACH_TypeDef; + +/*------------- Universal Serial Bus (USB) -----------------------------------*/ +typedef struct +{ + __I uint32_t HcRevision; /* USB Host Registers */ + __IO uint32_t HcControl; + __IO uint32_t HcCommandStatus; + __IO uint32_t HcInterruptStatus; + __IO uint32_t HcInterruptEnable; + __IO uint32_t HcInterruptDisable; + __IO uint32_t HcHCCA; + __I uint32_t HcPeriodCurrentED; + __IO uint32_t HcControlHeadED; + __IO uint32_t HcControlCurrentED; + __IO uint32_t HcBulkHeadED; + __IO uint32_t HcBulkCurrentED; + __I uint32_t HcDoneHead; + __IO uint32_t HcFmInterval; + __I uint32_t HcFmRemaining; + __I uint32_t HcFmNumber; + __IO uint32_t HcPeriodicStart; + __IO uint32_t HcLSTreshold; + __IO uint32_t HcRhDescriptorA; + __IO uint32_t HcRhDescriptorB; + __IO uint32_t HcRhStatus; + __IO uint32_t HcRhPortStatus1; + __IO uint32_t HcRhPortStatus2; + uint32_t RESERVED0[40]; + __I uint32_t Module_ID; + + __I uint32_t OTGIntSt; /* USB On-The-Go Registers */ + __IO uint32_t OTGIntEn; + __O uint32_t OTGIntSet; + __O uint32_t OTGIntClr; + __IO uint32_t OTGStCtrl; + __IO uint32_t OTGTmr; + uint32_t RESERVED1[58]; + + __I uint32_t USBDevIntSt; /* USB Device Interrupt Registers */ + __IO uint32_t USBDevIntEn; + __O uint32_t USBDevIntClr; + __O uint32_t USBDevIntSet; + + __O uint32_t USBCmdCode; /* USB Device SIE Command Registers */ + __I uint32_t USBCmdData; + + __I uint32_t USBRxData; /* USB Device Transfer Registers */ + __O uint32_t USBTxData; + __I uint32_t USBRxPLen; + __O uint32_t USBTxPLen; + __IO uint32_t USBCtrl; + __O uint32_t USBDevIntPri; + + __I uint32_t USBEpIntSt; /* USB Device Endpoint Interrupt Regs */ + __IO uint32_t USBEpIntEn; + __O uint32_t USBEpIntClr; + __O uint32_t USBEpIntSet; + __O uint32_t USBEpIntPri; + + __IO uint32_t USBReEp; /* USB Device Endpoint Realization Reg*/ + __O uint32_t USBEpInd; + __IO uint32_t USBMaxPSize; + + __I uint32_t USBDMARSt; /* USB Device DMA Registers */ + __O uint32_t USBDMARClr; + __O uint32_t USBDMARSet; + uint32_t RESERVED2[9]; + __IO uint32_t USBUDCAH; + __I uint32_t USBEpDMASt; + __O uint32_t USBEpDMAEn; + __O uint32_t USBEpDMADis; + __I uint32_t USBDMAIntSt; + __IO uint32_t USBDMAIntEn; + uint32_t RESERVED3[2]; + __I uint32_t USBEoTIntSt; + __O uint32_t USBEoTIntClr; + __O uint32_t USBEoTIntSet; + __I uint32_t USBNDDRIntSt; + __O uint32_t USBNDDRIntClr; + __O uint32_t USBNDDRIntSet; + __I uint32_t USBSysErrIntSt; + __O uint32_t USBSysErrIntClr; + __O uint32_t USBSysErrIntSet; + uint32_t RESERVED4[15]; + + __I uint32_t I2C_RX; /* USB OTG I2C Registers */ + __O uint32_t I2C_WO; + __I uint32_t I2C_STS; + __IO uint32_t I2C_CTL; + __IO uint32_t I2C_CLKHI; + __O uint32_t I2C_CLKLO; + uint32_t RESERVED5[823]; + + union { + __IO uint32_t USBClkCtrl; /* USB Clock Control Registers */ + __IO uint32_t OTGClkCtrl; + }; + union { + __I uint32_t USBClkSt; + __I uint32_t OTGClkSt; + }; +} USB_TypeDef; + +/*------------- Ethernet Media Access Controller (EMAC) ----------------------*/ +typedef struct +{ + __IO uint32_t MAC1; /* MAC Registers */ + __IO uint32_t MAC2; + __IO uint32_t IPGT; + __IO uint32_t IPGR; + __IO uint32_t CLRT; + __IO uint32_t MAXF; + __IO uint32_t SUPP; + __IO uint32_t TEST; + __IO uint32_t MCFG; + __IO uint32_t MCMD; + __IO uint32_t MADR; + __O uint32_t MWTD; + __I uint32_t MRDD; + __I uint32_t MIND; + uint32_t RESERVED0[2]; + __IO uint32_t SA0; + __IO uint32_t SA1; + __IO uint32_t SA2; + uint32_t RESERVED1[45]; + __IO uint32_t Command; /* Control Registers */ + __I uint32_t Status; + __IO uint32_t RxDescriptor; + __IO uint32_t RxStatus; + __IO uint32_t RxDescriptorNumber; + __I uint32_t RxProduceIndex; + __IO uint32_t RxConsumeIndex; + __IO uint32_t TxDescriptor; + __IO uint32_t TxStatus; + __IO uint32_t TxDescriptorNumber; + __IO uint32_t TxProduceIndex; + __I uint32_t TxConsumeIndex; + uint32_t RESERVED2[10]; + __I uint32_t TSV0; + __I uint32_t TSV1; + __I uint32_t RSV; + uint32_t RESERVED3[3]; + __IO uint32_t FlowControlCounter; + __I uint32_t FlowControlStatus; + uint32_t RESERVED4[34]; + __IO uint32_t RxFilterCtrl; /* Rx Filter Registers */ + __IO uint32_t RxFilterWoLStatus; + __IO uint32_t RxFilterWoLClear; + uint32_t RESERVED5; + __IO uint32_t HashFilterL; + __IO uint32_t HashFilterH; + uint32_t RESERVED6[882]; + __I uint32_t IntStatus; /* Module Control Registers */ + __IO uint32_t IntEnable; + __O uint32_t IntClear; + __O uint32_t IntSet; + uint32_t RESERVED7; + __IO uint32_t PowerDown; + uint32_t RESERVED8; + __IO uint32_t Module_ID; +} EMAC_TypeDef; + +#pragma no_anon_unions + + +/******************************************************************************/ +/* Peripheral memory map */ +/******************************************************************************/ +/* Base addresses */ +#define FLASH_BASE (0x00000000UL) +#define RAM_BASE (0x10000000UL) +#define GPIO_BASE (0x2009C000UL) +#define APB0_BASE (0x40000000UL) +#define APB1_BASE (0x40080000UL) +#define AHB_BASE (0x50000000UL) +#define CM3_BASE (0xE0000000UL) + +/* APB0 peripherals */ +#define WDT_BASE (APB0_BASE + 0x00000) +#define TIM0_BASE (APB0_BASE + 0x04000) +#define TIM1_BASE (APB0_BASE + 0x08000) +#define UART0_BASE (APB0_BASE + 0x0C000) +#define UART1_BASE (APB0_BASE + 0x10000) +#define PWM1_BASE (APB0_BASE + 0x18000) +#define I2C0_BASE (APB0_BASE + 0x1C000) +#define SPI_BASE (APB0_BASE + 0x20000) +#define RTC_BASE (APB0_BASE + 0x24000) +#define GPIOINT_BASE (APB0_BASE + 0x28080) +#define PINCON_BASE (APB0_BASE + 0x2C000) +#define SSP1_BASE (APB0_BASE + 0x30000) +#define ADC_BASE (APB0_BASE + 0x34000) +#define CANAF_RAM_BASE (APB0_BASE + 0x38000) +#define CANAF_BASE (APB0_BASE + 0x3C000) +#define CANCR_BASE (APB0_BASE + 0x40000) +#define CAN1_BASE (APB0_BASE + 0x44000) +#define CAN2_BASE (APB0_BASE + 0x48000) +#define I2C1_BASE (APB0_BASE + 0x5C000) + +/* APB1 peripherals */ +#define SSP0_BASE (APB1_BASE + 0x08000) +#define DAC_BASE (APB1_BASE + 0x0C000) +#define TIM2_BASE (APB1_BASE + 0x10000) +#define TIM3_BASE (APB1_BASE + 0x14000) +#define UART2_BASE (APB1_BASE + 0x18000) +#define UART3_BASE (APB1_BASE + 0x1C000) +#define I2C2_BASE (APB1_BASE + 0x20000) +#define I2S_BASE (APB1_BASE + 0x28000) +#define RIT_BASE (APB1_BASE + 0x30000) +#define MCPWM_BASE (APB1_BASE + 0x38000) +#define QEI_BASE (APB1_BASE + 0x3C000) +#define SC_BASE (APB1_BASE + 0x7C000) + +/* AHB peripherals */ +#define EMAC_BASE (AHB_BASE + 0x00000) +#define GPDMA_BASE (AHB_BASE + 0x04000) +#define GPDMACH0_BASE (AHB_BASE + 0x04100) +#define GPDMACH1_BASE (AHB_BASE + 0x04120) +#define GPDMACH2_BASE (AHB_BASE + 0x04140) +#define GPDMACH3_BASE (AHB_BASE + 0x04160) +#define GPDMACH4_BASE (AHB_BASE + 0x04180) +#define GPDMACH5_BASE (AHB_BASE + 0x041A0) +#define GPDMACH6_BASE (AHB_BASE + 0x041C0) +#define GPDMACH7_BASE (AHB_BASE + 0x041E0) +#define USB_BASE (AHB_BASE + 0x0C000) + +/* GPIOs */ +#define GPIO0_BASE (GPIO_BASE + 0x00000) +#define GPIO1_BASE (GPIO_BASE + 0x00020) +#define GPIO2_BASE (GPIO_BASE + 0x00040) +#define GPIO3_BASE (GPIO_BASE + 0x00060) +#define GPIO4_BASE (GPIO_BASE + 0x00080) + + +/******************************************************************************/ +/* Peripheral declaration */ +/******************************************************************************/ +#define SC (( SC_TypeDef *) SC_BASE) +#define GPIO0 (( GPIO_TypeDef *) GPIO0_BASE) +#define GPIO1 (( GPIO_TypeDef *) GPIO1_BASE) +#define GPIO2 (( GPIO_TypeDef *) GPIO2_BASE) +#define GPIO3 (( GPIO_TypeDef *) GPIO3_BASE) +#define GPIO4 (( GPIO_TypeDef *) GPIO4_BASE) +#define WDT (( WDT_TypeDef *) WDT_BASE) +#define TIM0 (( TIM_TypeDef *) TIM0_BASE) +#define TIM1 (( TIM_TypeDef *) TIM1_BASE) +#define TIM2 (( TIM_TypeDef *) TIM2_BASE) +#define TIM3 (( TIM_TypeDef *) TIM3_BASE) +#define RIT (( RIT_TypeDef *) RIT_BASE) +#define UART0 (( UART_TypeDef *) UART0_BASE) +#define UART1 (( UART1_TypeDef *) UART1_BASE) +#define UART2 (( UART_TypeDef *) UART2_BASE) +#define UART3 (( UART_TypeDef *) UART3_BASE) +#define PWM1 (( PWM_TypeDef *) PWM1_BASE) +#define I2C0 (( I2C_TypeDef *) I2C0_BASE) +#define I2C1 (( I2C_TypeDef *) I2C1_BASE) +#define I2C2 (( I2C_TypeDef *) I2C2_BASE) +#define I2S (( I2S_TypeDef *) I2S_BASE) +#define SPI (( SPI_TypeDef *) SPI_BASE) +#define RTC (( RTC_TypeDef *) RTC_BASE) +#define GPIOINT (( GPIOINT_TypeDef *) GPIOINT_BASE) +#define PINCON (( PINCON_TypeDef *) PINCON_BASE) +#define SSP0 (( SSP_TypeDef *) SSP0_BASE) +#define SSP1 (( SSP_TypeDef *) SSP1_BASE) +#define ADC (( ADC_TypeDef *) ADC_BASE) +#define DAC (( DAC_TypeDef *) DAC_BASE) +#define CANAF_RAM ((CANAF_RAM_TypeDef *) CANAF_RAM_BASE) +#define CANAF (( CANAF_TypeDef *) CANAF_BASE) +#define CANCR (( CANCR_TypeDef *) CANCR_BASE) +#define CAN1 (( CAN_TypeDef *) CAN1_BASE) +#define CAN2 (( CAN_TypeDef *) CAN2_BASE) +#define MCPWM (( MCPWM_TypeDef *) MCPWM_BASE) +#define QEI (( QEI_TypeDef *) QEI_BASE) +#define EMAC (( EMAC_TypeDef *) EMAC_BASE) +#define GPDMA (( GPDMA_TypeDef *) GPDMA_BASE) +#define GPDMACH0 (( GPDMACH_TypeDef *) GPDMACH0_BASE) +#define GPDMACH1 (( GPDMACH_TypeDef *) GPDMACH1_BASE) +#define GPDMACH2 (( GPDMACH_TypeDef *) GPDMACH2_BASE) +#define GPDMACH3 (( GPDMACH_TypeDef *) GPDMACH3_BASE) +#define GPDMACH4 (( GPDMACH_TypeDef *) GPDMACH4_BASE) +#define GPDMACH5 (( GPDMACH_TypeDef *) GPDMACH5_BASE) +#define GPDMACH6 (( GPDMACH_TypeDef *) GPDMACH6_BASE) +#define GPDMACH7 (( GPDMACH_TypeDef *) GPDMACH7_BASE) +#define USB (( USB_TypeDef *) USB_BASE) + +#endif // __LPC17xx_H__ diff --git a/new_cmsis/LPC1768-flash.ld b/new_cmsis/boards/lpc1768/flash.ld similarity index 98% rename from new_cmsis/LPC1768-flash.ld rename to new_cmsis/boards/lpc1768/flash.ld index cebf954..16e6a20 100644 --- a/new_cmsis/LPC1768-flash.ld +++ b/new_cmsis/boards/lpc1768/flash.ld @@ -1,7 +1,7 @@ /* * This is the NXP LPC1768 linker file for code running from flash. * - * TODO: + * TODO: * - handle the exotic input sections (e.g. glue and veneer, C++ sections) * - add additional Ethernet and USB RAM memory regions (2x16k) * - add boot ROM memory regions @@ -45,6 +45,6 @@ SECTIONS { . = ALIGN(4); _ebss = .; } > ram - + _sstack = ORIGIN(ram) + LENGTH(ram); } diff --git a/new_cmsis/startup.c b/new_cmsis/boards/lpc1768/startup.c similarity index 50% rename from new_cmsis/startup.c rename to new_cmsis/boards/lpc1768/startup.c index 3830903..66eab26 100644 --- a/new_cmsis/startup.c +++ b/new_cmsis/boards/lpc1768/startup.c @@ -1,316 +1,281 @@ -//***************************************************************************** -// -// startup_gcc.c - Startup code for use with GNU tools. -// -// Copyright (c) 2009 Luminary Micro, Inc. All rights reserved. -// Software License Agreement -// -// Luminary Micro, Inc. (LMI) is supplying this software for use solely and -// exclusively on LMI's microcontroller products. -// -// The software is owned by LMI and/or its suppliers, and is protected under -// applicable copyright laws. All rights are reserved. You may not combine -// this software with "viral" open-source software in order to form a larger -// program. Any use in violation of the foregoing restrictions may subject -// the user to criminal sanctions under applicable laws, as well as to civil -// liability for the breach of the terms and conditions of this license. -// -// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED -// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. -// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR -// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. -// -// This is part of revision 32 of the Stellaris CMSIS Package. -// -//***************************************************************************** - -#define WEAK __attribute__ ((weak)) - -//***************************************************************************** -// -// Forward declaration of the default fault handlers. -// -//***************************************************************************** -void WEAK Reset_Handler(void); -static void Default_Handler(void); -void WEAK NMI_Handler(void); -void WEAK HardFault_Handler(void); -void WEAK MemManage_Handler(void); -void WEAK BusFault_Handler(void); -void WEAK UsageFault_Handler(void); -void WEAK MemManage_Handler(void); -void WEAK SVC_Handler(void); -void WEAK DebugMon_Handler(void); -void WEAK PendSV_Handler(void); -void WEAK SysTick_Handler(void); -void WEAK GPIOPortA_IRQHandler(void); -void WEAK GPIOPortB_IRQHandler(void); -void WEAK GPIOPortC_IRQHandler(void); -void WEAK GPIOPortD_IRQHandler(void); -void WEAK GPIOPortE_IRQHandler(void); -void WEAK UART0_IRQHandler(void); -void WEAK UART1_IRQHandler(void); -void WEAK SSI0_IRQHandler(void); -void WEAK I2C0_IRQHandler(void); -void WEAK PWMFault_IRQHandler(void); -void WEAK PWMGen0_IRQHandler(void); -void WEAK PWMGen1_IRQHandler(void); -void WEAK PWMGen2_IRQHandler(void); -void WEAK QEI0_IRQHandler(void); -void WEAK ADCSeq0_IRQHandler(void); -void WEAK ADCSeq1_IRQHandler(void); -void WEAK ADCSeq2_IRQHandler(void); -void WEAK ADCSeq3_IRQHandler(void); -void WEAK Watchdog_IRQHandler(void); -void WEAK Timer0A_IRQHandler(void); -void WEAK Timer0B_IRQHandler(void); -void WEAK Timer1A_IRQHandler(void); -void WEAK Timer1B_IRQHandler(void); -void WEAK Timer2A_IRQHandler(void); -void WEAK Timer2B_IRQHandler(void); -void WEAK Comp0_IRQHandler(void); -void WEAK Comp1_IRQHandler(void); -void WEAK Comp2_IRQHandler(void); -void WEAK SysCtrl_IRQHandler(void); -void WEAK FlashCtrl_IRQHandler(void); -void WEAK GPIOPortF_IRQHandler(void); -void WEAK GPIOPortG_IRQHandler(void); -void WEAK GPIOPortH_IRQHandler(void); -void WEAK UART2_IRQHandler(void); -void WEAK SSI1_IRQHandler(void); -void WEAK Timer3A_IRQHandler(void); -void WEAK Timer3B_IRQHandler(void); -void WEAK I2C1_IRQHandler(void); -void WEAK QEI1_IRQHandler(void); -void WEAK CAN0_IRQHandler(void); -void WEAK CAN1_IRQHandler(void); -void WEAK CAN2_IRQHandler(void); -void WEAK Ethernet_IRQHandler(void); -void WEAK Hibernate_IRQHandler(void); - -//***************************************************************************** -// -// The entry point for the application. -// -//***************************************************************************** -extern int main(void); - -//***************************************************************************** -// -// Reserve space for the system stack. -// -//***************************************************************************** -static unsigned long pulStack[64]; - -//***************************************************************************** -// -// The vector table. Note that the proper constructs must be placed on this to -// ensure that it ends up at physical address 0x0000.0000. -// -//***************************************************************************** -__attribute__ ((section(".isr_vector"))) -void (* const g_pfnVectors[])(void) = -{ - (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), - // The initial stack pointer - Reset_Handler, // The reset handler - NMI_Handler, // The NMI handler - HardFault_Handler, // The hard fault handler - MemManage_Handler, // The MPU fault handler - BusFault_Handler, // The bus fault handler - UsageFault_Handler, // The usage fault handler - 0xeffff74e, // Reserved - 0, // Reserved - 0, // Reserved - 0, // Reserved - SVC_Handler, // SVCall handler - DebugMon_Handler, // Debug monitor handler - 0, // Reserved - PendSV_Handler, // The PendSV handler - SysTick_Handler, // The SysTick handler - - // - // External Interrupts - // - GPIOPortA_IRQHandler, // GPIO Port A - GPIOPortB_IRQHandler, // GPIO Port B - GPIOPortC_IRQHandler, // GPIO Port C - GPIOPortD_IRQHandler, // GPIO Port D - GPIOPortE_IRQHandler, // GPIO Port E - UART0_IRQHandler, // UART0 Rx and Tx - UART1_IRQHandler, // UART1 Rx and Tx - SSI0_IRQHandler, // SSI0 Rx and Tx - I2C0_IRQHandler, // I2C0 Master and Slave - PWMFault_IRQHandler, // PWM Fault - PWMGen0_IRQHandler, // PWM Generator 0 - PWMGen1_IRQHandler, // PWM Generator 1 - PWMGen2_IRQHandler, // PWM Generator 2 - QEI0_IRQHandler, // Quadrature Encoder 0 - ADCSeq0_IRQHandler, // ADC Sequence 0 - ADCSeq1_IRQHandler, // ADC Sequence 1 - ADCSeq2_IRQHandler, // ADC Sequence 2 - ADCSeq3_IRQHandler, // ADC Sequence 3 - Watchdog_IRQHandler, // Watchdog timer - Timer0A_IRQHandler, // Timer 0 subtimer A - Timer0B_IRQHandler, // Timer 0 subtimer B - Timer1A_IRQHandler, // Timer 1 subtimer A - Timer1B_IRQHandler, // Timer 1 subtimer B - Timer2A_IRQHandler, // Timer 2 subtimer A - Timer2B_IRQHandler, // Timer 2 subtimer B - Comp0_IRQHandler, // Analog Comparator 0 - Comp1_IRQHandler, // Analog Comparator 1 - Comp2_IRQHandler, // Analog Comparator 2 - SysCtrl_IRQHandler, // System Control (PLL, OSC, BO) - FlashCtrl_IRQHandler, // FLASH Control - GPIOPortF_IRQHandler, // GPIO Port F - GPIOPortG_IRQHandler, // GPIO Port G - GPIOPortH_IRQHandler, // GPIO Port H - UART2_IRQHandler, // UART2 Rx and Tx - SSI1_IRQHandler, // SSI1 Rx and Tx - Timer3A_IRQHandler, // Timer 3 subtimer A - Timer3B_IRQHandler, // Timer 3 subtimer B - I2C1_IRQHandler, // I2C1 Master and Slave - QEI1_IRQHandler, // Quadrature Encoder 1 - CAN0_IRQHandler, // CAN0 - CAN1_IRQHandler, // CAN1 - CAN2_IRQHandler, // CAN2 - Ethernet_IRQHandler, // Ethernet - Hibernate_IRQHandler // Hibernate -}; - -//***************************************************************************** -// -// The following are constructs created by the linker, indicating where the -// the "data" and "bss" segments reside in memory. The initializers for the -// for the "data" segment resides immediately following the "text" segment. -// -//***************************************************************************** -extern unsigned long _etext; -extern unsigned long _sdata; -extern unsigned long _edata; -extern unsigned long _sbss; -extern unsigned long _ebss; - -//***************************************************************************** -// -// This is the code that gets called when the processor first starts execution -// following a reset event. Only the absolutely necessary set is performed, -// after which the application supplied entry() routine is called. Any fancy -// actions (such as making decisions based on the reset cause register, and -// resetting the bits in that register) are left solely in the hands of the -// application. -// -//***************************************************************************** -void -Reset_Handler(void) -{ - unsigned long *pulSrc, *pulDest; - - // - // Copy the data segment initializers from flash to SRAM. - // - pulSrc = &_etext; - for(pulDest = &_sdata; pulDest < &_edata; ) - { - *pulDest++ = *pulSrc++; - } - - // - // Zero fill the bss segment. This is done with inline assembly since this - // will clear the value of pulDest if it is not kept in a register. - // - __asm(" ldr r0, =_sbss\n" - " ldr r1, =_ebss\n" - " mov r2, #0\n" - " .thumb_func\n" - "zero_loop:\n" - " cmp r0, r1\n" - " it lt\n" - " strlt r2, [r0], #4\n" - " blt zero_loop"); - - // - // Call the application's entry point. - // - main(); -} - -//***************************************************************************** -// -// Provide weak aliases for each Exception handler to the Default_Handler. -// As they are weak aliases, any function with the same name will override -// this definition. -// -//***************************************************************************** -#pragma weak NMI_Handler = Default_Handler -#pragma weak HardFault_Handler = Default_Handler -#pragma weak MemManage_Handler = Default_Handler -#pragma weak BusFault_Handler = Default_Handler -#pragma weak UsageFault_Handler = Default_Handler -#pragma weak SVC_Handler = Default_Handler -#pragma weak DebugMon_Handler = Default_Handler -#pragma weak PendSV_Handler = Default_Handler -#pragma weak SysTick_Handler = Default_Handler -#pragma weak GPIOPortA_IRQHandler = Default_Handler -#pragma weak GPIOPortB_IRQHandler = Default_Handler -#pragma weak GPIOPortC_IRQHandler = Default_Handler -#pragma weak GPIOPortD_IRQHandler = Default_Handler -#pragma weak GPIOPortE_IRQHandler = Default_Handler -#pragma weak UART0_IRQHandler = Default_Handler -#pragma weak UART1_IRQHandler = Default_Handler -#pragma weak SSI0_IRQHandler = Default_Handler -#pragma weak I2C0_IRQHandler = Default_Handler -#pragma weak PWMFault_IRQHandler = Default_Handler -#pragma weak PWMGen0_IRQHandler = Default_Handler -#pragma weak PWMGen1_IRQHandler = Default_Handler -#pragma weak PWMGen2_IRQHandler = Default_Handler -#pragma weak QEI0_IRQHandler = Default_Handler -#pragma weak ADCSeq0_IRQHandler = Default_Handler -#pragma weak ADCSeq1_IRQHandler = Default_Handler -#pragma weak ADCSeq2_IRQHandler = Default_Handler -#pragma weak ADCSeq3_IRQHandler = Default_Handler -#pragma weak Watchdog_IRQHandler = Default_Handler -#pragma weak Timer0A_IRQHandler = Default_Handler -#pragma weak Timer0B_IRQHandler = Default_Handler -#pragma weak Timer1A_IRQHandler = Default_Handler -#pragma weak Timer1B_IRQHandler = Default_Handler -#pragma weak Timer2A_IRQHandler = Default_Handler -#pragma weak Timer2B_IRQHandler = Default_Handler -#pragma weak Comp0_IRQHandler = Default_Handler -#pragma weak Comp1_IRQHandler = Default_Handler -#pragma weak Comp2_IRQHandler = Default_Handler -#pragma weak SysCtrl_IRQHandler = Default_Handler -#pragma weak FlashCtrl_IRQHandler = Default_Handler -#pragma weak GPIOPortF_IRQHandler = Default_Handler -#pragma weak GPIOPortG_IRQHandler = Default_Handler -#pragma weak GPIOPortH_IRQHandler = Default_Handler -#pragma weak UART2_IRQHandler = Default_Handler -#pragma weak SSI1_IRQHandler = Default_Handler -#pragma weak Timer3A_IRQHandler = Default_Handler -#pragma weak Timer3B_IRQHandler = Default_Handler -#pragma weak I2C1_IRQHandler = Default_Handler -#pragma weak QEI1_IRQHandler = Default_Handler -#pragma weak CAN0_IRQHandler = Default_Handler -#pragma weak CAN1_IRQHandler = Default_Handler -#pragma weak CAN2_IRQHandler = Default_Handler -#pragma weak Ethernet_IRQHandler = Default_Handler -#pragma weak Hibernate_IRQHandler = Default_Handler - -//***************************************************************************** -// -// This is the code that gets called when the processor receives an unexpected -// interrupt. This simply enters an infinite loop, preserving the system state -// for examination by a debugger. -// -//***************************************************************************** -static void -Default_Handler(void) -{ - // - // Go into an infinite loop. - // - while(1) - { - } -} +//***************************************************************************** +// +// startup_gcc.c - Startup code for use with GNU tools. +// +// Copyright (c) 2009 Luminary Micro, Inc. All rights reserved. +// Software License Agreement +// +// Luminary Micro, Inc. (LMI) is supplying this software for use solely and +// exclusively on LMI's microcontroller products. +// +// The software is owned by LMI and/or its suppliers, and is protected under +// applicable copyright laws. All rights are reserved. You may not combine +// this software with "viral" open-source software in order to form a larger +// program. Any use in violation of the foregoing restrictions may subject +// the user to criminal sanctions under applicable laws, as well as to civil +// liability for the breach of the terms and conditions of this license. +// +// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED +// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF +// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. +// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR +// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 32 of the Stellaris CMSIS Package. +// +//***************************************************************************** + +#define WEAK __attribute__ ((weak)) + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +void WEAK Reset_Handler(void); +static void Default_Handler(void); +void WEAK NMI_Handler(void); +void WEAK HardFault_Handler(void); +void WEAK MemManage_Handler(void); +void WEAK BusFault_Handler(void); +void WEAK UsageFault_Handler(void); +void WEAK MemManage_Handler(void); +void WEAK SVC_Handler(void); +void WEAK DebugMon_Handler(void); +void WEAK PendSV_Handler(void); +void WEAK SysTick_Handler(void); + +void WEAK WDT_IRQHandler(void); +void WEAK TIMER0_IRQHandler(void); +void WEAK TIMER1_IRQHandler(void); +void WEAK TIMER2_IRQHandler(void); +void WEAK TIMER3_IRQHandler(void); +void WEAK UART0_IRQHandler(void); +void WEAK UART1_IRQHandler(void); +void WEAK UART2_IRQHandler(void); +void WEAK UART3_IRQHandler(void); +void WEAK PWM1_IRQHandler(void); +void WEAK I2C0_IRQHandler(void); +void WEAK I2C1_IRQHandler(void); +void WEAK I2C2_IRQHandler(void); +void WEAK SPI_IRQHandler(void); +void WEAK SSP0_IRQHandler(void); +void WEAK SSP1_IRQHandler(void); +void WEAK PLL0_IRQHandler(void); +void WEAK RTC_IRQHandler(void); +void WEAK EINT0_IRQHandler(void); +void WEAK EINT1_IRQHandler(void); +void WEAK EINT2_IRQHandler(void); +void WEAK EINT3_IRQHandler(void); +void WEAK ADC_IRQHandler(void); +void WEAK BOD_IRQHandler(void); +void WEAK USB_IRQHandler(void); +void WEAK CAN_IRQHandler(void); +void WEAK DMA_IRQHandler(void); +void WEAK I2S_IRQHandler(void); +void WEAK ENET_IRQHandler(void); +void WEAK RIT_IRQHandler(void); +void WEAK MCPWM_IRQHandler(void); +void WEAK QEI_IRQHandler(void); +void WEAK PLL1_IRQHandler(void); +void WEAK USBActivity_IRQHandler(void); +void WEAK CANActivity_IRQHandler(void); + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern int main(void); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +static unsigned long pulStack[64]; + +//***************************************************************************** +// +// The vector table. Note that the proper constructs must be placed on this to +// ensure that it ends up at physical address 0x0000.0000. +// +//***************************************************************************** +__attribute__ ((section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), + // The initial stack pointer + Reset_Handler, // The reset handler + NMI_Handler, // The NMI handler + HardFault_Handler, // The hard fault handler + MemManage_Handler, // The MPU fault handler + BusFault_Handler, // The bus fault handler + UsageFault_Handler, // The usage fault handler + 0xeffffcbf, // Interrupt CRC + 0, // Reserved + 0, // Reserved + 0, // Reserved + SVC_Handler, // SVCall handler + DebugMon_Handler, // Debug monitor handler + 0, // Reserved + PendSV_Handler, // The PendSV handler + SysTick_Handler, // The SysTick handler + + // + // External Interrupts + // + WDT_IRQHandler, /* 16: Watchdog Timer */ + TIMER0_IRQHandler, /* 17: Timer0 */ + TIMER1_IRQHandler, /* 18: Timer1 */ + TIMER2_IRQHandler, /* 19: Timer2 */ + TIMER3_IRQHandler, /* 20: Timer3 */ + UART0_IRQHandler, /* 21: UART0 */ + UART1_IRQHandler, /* 22: UART1 */ + UART2_IRQHandler, /* 23: UART2 */ + UART3_IRQHandler, /* 24: UART3 */ + PWM1_IRQHandler, /* 25: PWM1 */ + I2C0_IRQHandler, /* 26: I2C0 */ + I2C1_IRQHandler, /* 27: I2C1 */ + I2C2_IRQHandler, /* 28: I2C2 */ + SPI_IRQHandler, /* 29: SPI */ + SSP0_IRQHandler, /* 30: SSP0 */ + SSP1_IRQHandler, /* 31: SSP1 */ + PLL0_IRQHandler, /* 32: PLL0 Lock (Main PLL) */ + RTC_IRQHandler, /* 33: Real Time Clock */ + EINT0_IRQHandler, /* 34: External Interrupt 0 */ + EINT1_IRQHandler, /* 35: External Interrupt 1 */ + EINT2_IRQHandler, /* 36: External Interrupt 2 */ + EINT3_IRQHandler, /* 37: External Interrupt 3 */ + ADC_IRQHandler, /* 38: A/D Converter */ + BOD_IRQHandler, /* 39: Brown-Out Detect */ + USB_IRQHandler, /* 40: USB */ + CAN_IRQHandler, /* 41: CAN */ + DMA_IRQHandler, /* 42: General Purpose DMA */ + I2S_IRQHandler, /* 43: I2S */ + ENET_IRQHandler, /* 44: Ethernet */ + RIT_IRQHandler, /* 45: Repetitive Interrupt Timer */ + MCPWM_IRQHandler, /* 46: Motor Control PWM */ + QEI_IRQHandler, /* 47: Quadrature Encoder Interface */ + PLL1_IRQHandler, /* 48: PLL1 Lock (USB PLL) */ + USBActivity_IRQHandler, /* 49: USB Activity interrupt to wakeup */ + CANActivity_IRQHandler /* 50: CAN Activity interrupt to wakeup */ +}; + +//***************************************************************************** +// +// The following are constructs created by the linker, indicating where the +// the "data" and "bss" segments reside in memory. The initializers for the +// for the "data" segment resides immediately following the "text" segment. +// +//***************************************************************************** +extern unsigned long _etext; +extern unsigned long _sdata; +extern unsigned long _edata; +extern unsigned long _sbss; +extern unsigned long _ebss; + +//***************************************************************************** +// +// This is the code that gets called when the processor first starts execution +// following a reset event. Only the absolutely necessary set is performed, +// after which the application supplied entry() routine is called. Any fancy +// actions (such as making decisions based on the reset cause register, and +// resetting the bits in that register) are left solely in the hands of the +// application. +// +//***************************************************************************** +void +Reset_Handler(void) +{ + unsigned long *pulSrc, *pulDest; + + // + // Copy the data segment initializers from flash to SRAM. + // + pulSrc = &_etext; + for(pulDest = &_sdata; pulDest < &_edata; ) + { + *pulDest++ = *pulSrc++; + } + + // + // Zero fill the bss segment. This is done with inline assembly since this + // will clear the value of pulDest if it is not kept in a register. + // + __asm(" ldr r0, =_sbss\n" + " ldr r1, =_ebss\n" + " mov r2, #0\n" + " .thumb_func\n" + "zero_loop:\n" + " cmp r0, r1\n" + " it lt\n" + " strlt r2, [r0], #4\n" + " blt zero_loop"); + + // + // Call the application's entry point. + // + main(); +} + +//***************************************************************************** +// +// Provide weak aliases for each Exception handler to the Default_Handler. +// As they are weak aliases, any function with the same name will override +// this definition. +// +//***************************************************************************** +#pragma weak WDT_IRQHandler = Default_Handler +#pragma weak TIMER0_IRQHandler = Default_Handler +#pragma weak TIMER1_IRQHandler = Default_Handler +#pragma weak TIMER2_IRQHandler = Default_Handler +#pragma weak TIMER3_IRQHandler = Default_Handler +#pragma weak UART0_IRQHandler = Default_Handler +#pragma weak UART1_IRQHandler = Default_Handler +#pragma weak UART2_IRQHandler = Default_Handler +#pragma weak UART3_IRQHandler = Default_Handler +#pragma weak PWM1_IRQHandler = Default_Handler +#pragma weak I2C0_IRQHandler = Default_Handler +#pragma weak I2C1_IRQHandler = Default_Handler +#pragma weak I2C2_IRQHandler = Default_Handler +#pragma weak SPI_IRQHandler = Default_Handler +#pragma weak SSP0_IRQHandler = Default_Handler +#pragma weak SSP1_IRQHandler = Default_Handler +#pragma weak PLL0_IRQHandler = Default_Handler +#pragma weak RTC_IRQHandler = Default_Handler +#pragma weak EINT0_IRQHandler = Default_Handler +#pragma weak EINT1_IRQHandler = Default_Handler +#pragma weak EINT2_IRQHandler = Default_Handler +#pragma weak EINT3_IRQHandler = Default_Handler +#pragma weak ADC_IRQHandler = Default_Handler +#pragma weak BOD_IRQHandler = Default_Handler +#pragma weak USB_IRQHandler = Default_Handler +#pragma weak CAN_IRQHandler = Default_Handler +#pragma weak DMA_IRQHandler = Default_Handler +#pragma weak I2S_IRQHandler = Default_Handler +#pragma weak ENET_IRQHandler = Default_Handler +#pragma weak RIT_IRQHandler = Default_Handler +#pragma weak MCPWM_IRQHandler = Default_Handler +#pragma weak QEI_IRQHandler = Default_Handler +#pragma weak PPL1_IRQHandler = Default_Handler +#pragma weak USBActivity_IRQHandler = Default_Handler +#pragma weak CANActivity_IRQHandler = Default_Handler + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +Default_Handler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} diff --git a/new_cmsis/system_LPC17xx.c b/new_cmsis/boards/lpc1768/system.c similarity index 96% rename from new_cmsis/system_LPC17xx.c rename to new_cmsis/boards/lpc1768/system.c index 4a9d562..5848b2f 100644 --- a/new_cmsis/system_LPC17xx.c +++ b/new_cmsis/boards/lpc1768/system.c @@ -1,495 +1,498 @@ -/****************************************************************************** - * @file: system_LPC17xx.c - * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Source File - * for the NXP LPC17xx Device Series - * @version: V1.1 - * @date: 18th May 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2008 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-M3 - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - -#include -#include "LPC17xx.h" - -/* -//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ -*/ - -/*--------------------- Clock Configuration ---------------------------------- -// -// Clock Configuration -// System Controls and Status Register (SCS) -// OSCRANGE: Main Oscillator Range Select -// <0=> 1 MHz to 20 MHz -// <1=> 15 MHz to 24 MHz -// OSCEN: Main Oscillator Enable -// -// -// -// Clock Source Select Register (CLKSRCSEL) -// CLKSRC: PLL Clock Source Selection -// <0=> Internal RC oscillator -// <1=> Main oscillator -// <2=> RTC oscillator -// -// -// PLL0 Configuration (Main PLL) -// PLL0 Configuration Register (PLL0CFG) -// F_cco0 = (2 * M * F_in) / N -// F_in must be in the range of 32 kHz to 50 MHz -// F_cco0 must be in the range of 275 MHz to 550 MHz -// MSEL: PLL Multiplier Selection -// <6-32768><#-1> -// M Value -// NSEL: PLL Divider Selection -// <1-256><#-1> -// N Value -// -// -// -// PLL1 Configuration (USB PLL) -// PLL1 Configuration Register (PLL1CFG) -// F_usb = M * F_osc or F_usb = F_cco1 / (2 * P) -// F_cco1 = F_osc * M * 2 * P -// F_cco1 must be in the range of 156 MHz to 320 MHz -// MSEL: PLL Multiplier Selection -// <1-32><#-1> -// M Value (for USB maximum value is 4) -// PSEL: PLL Divider Selection -// <0=> 1 -// <1=> 2 -// <2=> 4 -// <3=> 8 -// P Value -// -// -// -// CPU Clock Configuration Register (CCLKCFG) -// CCLKSEL: Divide Value for CPU Clock from PLL0 -// <2-256:2><#-1> -// -// -// USB Clock Configuration Register (USBCLKCFG) -// USBSEL: Divide Value for USB Clock from PLL1 -// <0-15> -// Divide is USBSEL + 1 -// -// -// Peripheral Clock Selection Register 0 (PCLKSEL0) -// PCLK_WDT: Peripheral Clock Selection for WDT -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_TIMER0: Peripheral Clock Selection for TIMER0 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_TIMER1: Peripheral Clock Selection for TIMER1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_UART0: Peripheral Clock Selection for UART0 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_UART1: Peripheral Clock Selection for UART1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_PWM1: Peripheral Clock Selection for PWM1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_I2C0: Peripheral Clock Selection for I2C0 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_SPI: Peripheral Clock Selection for SPI -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_SSP1: Peripheral Clock Selection for SSP1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_DAC: Peripheral Clock Selection for DAC -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_ADC: Peripheral Clock Selection for ADC -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_CAN1: Peripheral Clock Selection for CAN1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 6 -// PCLK_CAN2: Peripheral Clock Selection for CAN2 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 6 -// PCLK_ACF: Peripheral Clock Selection for ACF -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 6 -// -// -// Peripheral Clock Selection Register 1 (PCLKSEL1) -// PCLK_QEI: Peripheral Clock Selection for the Quadrature Encoder Interface -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_GPIO: Peripheral Clock Selection for GPIOs -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_PCB: Peripheral Clock Selection for the Pin Connect Block -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_I2C1: Peripheral Clock Selection for I2C1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_SSP0: Peripheral Clock Selection for SSP0 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_TIMER2: Peripheral Clock Selection for TIMER2 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_TIMER3: Peripheral Clock Selection for TIMER3 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_UART2: Peripheral Clock Selection for UART2 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_UART3: Peripheral Clock Selection for UART3 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_I2C2: Peripheral Clock Selection for I2C2 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_I2S: Peripheral Clock Selection for I2S -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_RIT: Peripheral Clock Selection for the Repetitive Interrupt Timer -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_SYSCON: Peripheral Clock Selection for the System Control Block -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_MC: Peripheral Clock Selection for the Motor Control PWM -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// -// -// Power Control for Peripherals Register (PCONP) -// PCTIM0: Timer/Counter 0 power/clock enable -// PCTIM1: Timer/Counter 1 power/clock enable -// PCUART0: UART 0 power/clock enable -// PCUART1: UART 1 power/clock enable -// PCPWM1: PWM 1 power/clock enable -// PCI2C0: I2C interface 0 power/clock enable -// PCSPI: SPI interface power/clock enable -// PCRTC: RTC power/clock enable -// PCSSP1: SSP interface 1 power/clock enable -// PCAD: A/D converter power/clock enable -// PCCAN1: CAN controller 1 power/clock enable -// PCCAN2: CAN controller 2 power/clock enable -// PCGPIO: GPIOs power/clock enable -// PCRIT: Repetitive interrupt timer power/clock enable -// PCMC: Motor control PWM power/clock enable -// PCQEI: Quadrature encoder interface power/clock enable -// PCI2C1: I2C interface 1 power/clock enable -// PCSSP0: SSP interface 0 power/clock enable -// PCTIM2: Timer 2 power/clock enable -// PCTIM3: Timer 3 power/clock enable -// PCUART2: UART 2 power/clock enable -// PCUART3: UART 3 power/clock enable -// PCI2C2: I2C interface 2 power/clock enable -// PCI2S: I2S interface power/clock enable -// PCGPDMA: GP DMA function power/clock enable -// PCENET: Ethernet block power/clock enable -// PCUSB: USB interface power/clock enable -// -// -// Clock Output Configuration Register (CLKOUTCFG) -// CLKOUTSEL: Selects clock source for CLKOUT -// <0=> CPU clock -// <1=> Main oscillator -// <2=> Internal RC oscillator -// <3=> USB clock -// <4=> RTC oscillator -// CLKOUTDIV: Selects clock divider for CLKOUT -// <1-16><#-1> -// CLKOUT_EN: CLKOUT enable control -// -// -// -*/ -#define CLOCK_SETUP 1 -#define SCS_Val 0x00000020 -#define CLKSRCSEL_Val 0x00000001 -#define PLL0_SETUP 1 -#define PLL0CFG_Val 0x0000000B -#define PLL1_SETUP 0 -#define PLL1CFG_Val 0x00000000 -#define CCLKCFG_Val 0x00000003 -#define USBCLKCFG_Val 0x00000000 -#define PCLKSEL0_Val 0x00000000 -#define PCLKSEL1_Val 0x00000000 -#define PCONP_Val 0x042887DE -#define CLKOUTCFG_Val 0x00000000 - - -/*--------------------- Flash Accelerator Configuration ---------------------- -// -// Flash Accelerator Configuration -// FETCHCFG: Fetch Configuration -// <0=> Instruction fetches from flash are not buffered -// <1=> One buffer is used for all instruction fetch buffering -// <2=> All buffers may be used for instruction fetch buffering -// <3=> Reserved (do not use this setting) -// DATACFG: Data Configuration -// <0=> Data accesses from flash are not buffered -// <1=> One buffer is used for all data access buffering -// <2=> All buffers may be used for data access buffering -// <3=> Reserved (do not use this setting) -// ACCEL: Acceleration Enable -// PREFEN: Prefetch Enable -// PREFOVR: Prefetch Override -// FLASHTIM: Flash Access Time -// <0=> 1 CPU clock (for CPU clock up to 20 MHz) -// <1=> 2 CPU clocks (for CPU clock up to 40 MHz) -// <2=> 3 CPU clocks (for CPU clock up to 60 MHz) -// <3=> 4 CPU clocks (for CPU clock up to 80 MHz) -// <4=> 5 CPU clocks (for CPU clock up to 100 MHz) -// <5=> 6 CPU clocks (for any CPU clock) -// -*/ -#define FLASH_SETUP 1 -#define FLASHCFG_Val 0x0000303A - -/* -//-------- <<< end of configuration section >>> ------------------------------ -*/ - -/*---------------------------------------------------------------------------- - Check the register settings - *----------------------------------------------------------------------------*/ -#define CHECK_RANGE(val, min, max) ((val < min) || (val > max)) -#define CHECK_RSVD(val, mask) (val & mask) - -/* Clock Configuration -------------------------------------------------------*/ -#if (CHECK_RSVD((SCS_Val), ~0x00000030)) - #error "SCS: Invalid values of reserved bits!" -#endif - -#if (CHECK_RANGE((CLKSRCSEL_Val), 0, 2)) - #error "CLKSRCSEL: Value out of range!" -#endif - -#if (CHECK_RSVD((PLL0CFG_Val), ~0x00FF7FFF)) - #error "PLL0CFG: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((PLL1CFG_Val), ~0x0000007F)) - #error "PLL1CFG: Invalid values of reserved bits!" -#endif - -#if ((CCLKCFG_Val != 0) && (((CCLKCFG_Val - 1) % 2))) - #error "CCLKCFG: CCLKSEL field does not contain only odd values or 0!" -#endif - -#if (CHECK_RSVD((USBCLKCFG_Val), ~0x0000000F)) - #error "USBCLKCFG: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((PCLKSEL0_Val), 0x000C0C00)) - #error "PCLKSEL0: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((PCLKSEL1_Val), 0x03000300)) - #error "PCLKSEL1: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((PCONP_Val), 0x10100821)) - #error "PCONP: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((CLKOUTCFG_Val), ~0x000001FF)) - #error "CLKOUTCFG: Invalid values of reserved bits!" -#endif - -/* Flash Accelerator Configuration -------------------------------------------*/ -#if (CHECK_RSVD((FLASHCFG_Val), ~0x0000F07F)) - #error "FLASHCFG: Invalid values of reserved bits!" -#endif - - -/*---------------------------------------------------------------------------- - DEFINES - *----------------------------------------------------------------------------*/ - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (12000000UL) /* Oscillator frequency */ -#define OSC_CLK ( XTAL) /* Main oscillator frequency */ -#define RTC_CLK ( 32000UL) /* RTC oscillator frequency */ -#define IRC_OSC ( 4000000UL) /* Internal RC oscillator frequency */ - - -/*---------------------------------------------------------------------------- - Clock Variable definitions - *----------------------------------------------------------------------------*/ -uint32_t SystemFrequency = IRC_OSC; /*!< System Clock Frequency (Core Clock) */ - - -/** - * Initialize the system - * - * @param none - * @return none - * - * @brief Setup the microcontroller system. - * Initialize the System and update the SystemFrequency variable. - */ -void SystemInit (void) -{ -#if (CLOCK_SETUP) /* Clock Setup */ - SC->SCS = SCS_Val; - if (SCS_Val & (1 << 5)) { /* If Main Oscillator is enabled */ - while ((SC->SCS & (1 << 6)) == 0); /* Wait for Oscillator to be ready */ - } - - SC->CCLKCFG = CCLKCFG_Val; /* Setup Clock Divider */ - -#if (PLL0_SETUP) - SC->CLKSRCSEL = CLKSRCSEL_Val; /* Select Clock Source for PLL0 */ - SC->PLL0CFG = PLL0CFG_Val; - SC->PLL0CON = 0x01; /* PLL0 Enable */ - SC->PLL0FEED = 0xAA; - SC->PLL0FEED = 0x55; - while (!(SC->PLL0STAT & (1 << 26))); /* Wait for PLOCK0 */ - - SC->PLL0CON = 0x03; /* PLL0 Enable & Connect */ - SC->PLL0FEED = 0xAA; - SC->PLL0FEED = 0x55; -#endif - -#if (PLL1_SETUP) - SC->PLL1CFG = PLL1CFG_Val; - SC->PLL1CON = 0x01; /* PLL1 Enable */ - SC->PLL1FEED = 0xAA; - SC->PLL1FEED = 0x55; - while (!(SC->PLL1STAT & (1 << 10))); /* Wait for PLOCK1 */ - - SC->PLL1CON = 0x03; /* PLL1 Enable & Connect */ - SC->PLL1FEED = 0xAA; - SC->PLL1FEED = 0x55; -#else - SC->USBCLKCFG = USBCLKCFG_Val; /* Setup USB Clock Divider */ -#endif - - SC->PCLKSEL0 = PCLKSEL0_Val; /* Peripheral Clock Selection */ - SC->PCLKSEL1 = PCLKSEL1_Val; - - SC->PCONP = PCONP_Val; /* Power Control for Peripherals */ - - SC->CLKOUTCFG = CLKOUTCFG_Val; /* Clock Output Configuration */ -#endif - - /* Determine clock frequency according to clock register values */ - if (((SC->PLL0STAT >> 24) & 3) == 3) {/* If PLL0 enabled and connected */ - switch (SC->CLKSRCSEL & 0x03) { - case 0: /* Internal RC oscillator => PLL0 */ - case 3: /* Reserved, default to Internal RC */ - SystemFrequency = (IRC_OSC * - (((2 * ((SC->PLL0STAT & 0x7FFF) + 1))) / - (((SC->PLL0STAT >> 16) & 0xFF) + 1)) / - ((SC->CCLKCFG & 0xFF)+ 1)); - break; - case 1: /* Main oscillator => PLL0 */ - SystemFrequency = (OSC_CLK * - (((2 * ((SC->PLL0STAT & 0x7FFF) + 1))) / - (((SC->PLL0STAT >> 16) & 0xFF) + 1)) / - ((SC->CCLKCFG & 0xFF)+ 1)); - break; - case 2: /* RTC oscillator => PLL0 */ - SystemFrequency = (RTC_CLK * - (((2 * ((SC->PLL0STAT & 0x7FFF) + 1))) / - (((SC->PLL0STAT >> 16) & 0xFF) + 1)) / - ((SC->CCLKCFG & 0xFF)+ 1)); - break; - } - } else { - switch (SC->CLKSRCSEL & 0x03) { - case 0: /* Internal RC oscillator => PLL0 */ - case 3: /* Reserved, default to Internal RC */ - SystemFrequency = IRC_OSC / ((SC->CCLKCFG & 0xFF)+ 1); - break; - case 1: /* Main oscillator => PLL0 */ - SystemFrequency = OSC_CLK / ((SC->CCLKCFG & 0xFF)+ 1); - break; - case 2: /* RTC oscillator => PLL0 */ - SystemFrequency = RTC_CLK / ((SC->CCLKCFG & 0xFF)+ 1); - break; - } - } - -#if (FLASH_SETUP == 1) /* Flash Accelerator Setup */ - SC->FLASHCFG = FLASHCFG_Val; -#endif -} +/****************************************************************************** + * @file: system_LPC17xx.c + * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Source File + * for the NXP LPC17xx Device Series + * @version: V1.1 + * @date: 18th May 2009 + *---------------------------------------------------------------------------- + * + * Copyright (C) 2008 ARM Limited. All rights reserved. + * + * ARM Limited (ARM) is supplying this software for use with Cortex-M3 + * processor based microcontrollers. This file can be freely distributed + * within development tools that are supporting such ARM based processors. + * + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + ******************************************************************************/ + + +#include +#include + +/* +//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +*/ + +/*--------------------- Clock Configuration ---------------------------------- +// +// Clock Configuration +// System Controls and Status Register (SCS) +// OSCRANGE: Main Oscillator Range Select +// <0=> 1 MHz to 20 MHz +// <1=> 15 MHz to 24 MHz +// OSCEN: Main Oscillator Enable +// +// +// +// Clock Source Select Register (CLKSRCSEL) +// CLKSRC: PLL Clock Source Selection +// <0=> Internal RC oscillator +// <1=> Main oscillator +// <2=> RTC oscillator +// +// +// PLL0 Configuration (Main PLL) +// PLL0 Configuration Register (PLL0CFG) +// F_cco0 = (2 * M * F_in) / N +// F_in must be in the range of 32 kHz to 50 MHz +// F_cco0 must be in the range of 275 MHz to 550 MHz +// MSEL: PLL Multiplier Selection +// <6-32768><#-1> +// M Value +// NSEL: PLL Divider Selection +// <1-256><#-1> +// N Value +// +// +// +// PLL1 Configuration (USB PLL) +// PLL1 Configuration Register (PLL1CFG) +// F_usb = M * F_osc or F_usb = F_cco1 / (2 * P) +// F_cco1 = F_osc * M * 2 * P +// F_cco1 must be in the range of 156 MHz to 320 MHz +// MSEL: PLL Multiplier Selection +// <1-32><#-1> +// M Value (for USB maximum value is 4) +// PSEL: PLL Divider Selection +// <0=> 1 +// <1=> 2 +// <2=> 4 +// <3=> 8 +// P Value +// +// +// +// CPU Clock Configuration Register (CCLKCFG) +// CCLKSEL: Divide Value for CPU Clock from PLL0 +// <2-256:2><#-1> +// +// +// USB Clock Configuration Register (USBCLKCFG) +// USBSEL: Divide Value for USB Clock from PLL1 +// <0-15> +// Divide is USBSEL + 1 +// +// +// Peripheral Clock Selection Register 0 (PCLKSEL0) +// PCLK_WDT: Peripheral Clock Selection for WDT +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_TIMER0: Peripheral Clock Selection for TIMER0 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_TIMER1: Peripheral Clock Selection for TIMER1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_UART0: Peripheral Clock Selection for UART0 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_UART1: Peripheral Clock Selection for UART1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_PWM1: Peripheral Clock Selection for PWM1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_I2C0: Peripheral Clock Selection for I2C0 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_SPI: Peripheral Clock Selection for SPI +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_SSP1: Peripheral Clock Selection for SSP1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_DAC: Peripheral Clock Selection for DAC +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_ADC: Peripheral Clock Selection for ADC +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_CAN1: Peripheral Clock Selection for CAN1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 6 +// PCLK_CAN2: Peripheral Clock Selection for CAN2 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 6 +// PCLK_ACF: Peripheral Clock Selection for ACF +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 6 +// +// +// Peripheral Clock Selection Register 1 (PCLKSEL1) +// PCLK_QEI: Peripheral Clock Selection for the Quadrature Encoder Interface +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_GPIO: Peripheral Clock Selection for GPIOs +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_PCB: Peripheral Clock Selection for the Pin Connect Block +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_I2C1: Peripheral Clock Selection for I2C1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_SSP0: Peripheral Clock Selection for SSP0 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_TIMER2: Peripheral Clock Selection for TIMER2 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_TIMER3: Peripheral Clock Selection for TIMER3 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_UART2: Peripheral Clock Selection for UART2 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_UART3: Peripheral Clock Selection for UART3 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_I2C2: Peripheral Clock Selection for I2C2 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_I2S: Peripheral Clock Selection for I2S +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_RIT: Peripheral Clock Selection for the Repetitive Interrupt Timer +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_SYSCON: Peripheral Clock Selection for the System Control Block +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// PCLK_MC: Peripheral Clock Selection for the Motor Control PWM +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Hclk / 8 +// +// +// Power Control for Peripherals Register (PCONP) +// PCTIM0: Timer/Counter 0 power/clock enable +// PCTIM1: Timer/Counter 1 power/clock enable +// PCUART0: UART 0 power/clock enable +// PCUART1: UART 1 power/clock enable +// PCPWM1: PWM 1 power/clock enable +// PCI2C0: I2C interface 0 power/clock enable +// PCSPI: SPI interface power/clock enable +// PCRTC: RTC power/clock enable +// PCSSP1: SSP interface 1 power/clock enable +// PCAD: A/D converter power/clock enable +// PCCAN1: CAN controller 1 power/clock enable +// PCCAN2: CAN controller 2 power/clock enable +// PCGPIO: GPIOs power/clock enable +// PCRIT: Repetitive interrupt timer power/clock enable +// PCMC: Motor control PWM power/clock enable +// PCQEI: Quadrature encoder interface power/clock enable +// PCI2C1: I2C interface 1 power/clock enable +// PCSSP0: SSP interface 0 power/clock enable +// PCTIM2: Timer 2 power/clock enable +// PCTIM3: Timer 3 power/clock enable +// PCUART2: UART 2 power/clock enable +// PCUART3: UART 3 power/clock enable +// PCI2C2: I2C interface 2 power/clock enable +// PCI2S: I2S interface power/clock enable +// PCGPDMA: GP DMA function power/clock enable +// PCENET: Ethernet block power/clock enable +// PCUSB: USB interface power/clock enable +// +// +// 0x842887DE = +// 1000 0100 0010 1000 1000 0111 1101 1110 +// +// Clock Output Configuration Register (CLKOUTCFG) +// CLKOUTSEL: Selects clock source for CLKOUT +// <0=> CPU clock +// <1=> Main oscillator +// <2=> Internal RC oscillator +// <3=> USB clock +// <4=> RTC oscillator +// CLKOUTDIV: Selects clock divider for CLKOUT +// <1-16><#-1> +// CLKOUT_EN: CLKOUT enable control +// +// +// +*/ +#define CLOCK_SETUP 1 +#define SCS_Val 0x00000020 +#define CLKSRCSEL_Val 0x00000001 +#define PLL0_SETUP 1 +#define PLL0CFG_Val 0x0000000B +#define PLL1_SETUP 1 +#define PLL1CFG_Val 0x00000023 +#define CCLKCFG_Val 0x00000003 +#define USBCLKCFG_Val 0x00000000 +#define PCLKSEL0_Val 0x00000000 +#define PCLKSEL1_Val 0x00000000 +#define PCONP_Val 0x842887DE +#define CLKOUTCFG_Val 0x00000000 + + +/*--------------------- Flash Accelerator Configuration ---------------------- +// +// Flash Accelerator Configuration +// FETCHCFG: Fetch Configuration +// <0=> Instruction fetches from flash are not buffered +// <1=> One buffer is used for all instruction fetch buffering +// <2=> All buffers may be used for instruction fetch buffering +// <3=> Reserved (do not use this setting) +// DATACFG: Data Configuration +// <0=> Data accesses from flash are not buffered +// <1=> One buffer is used for all data access buffering +// <2=> All buffers may be used for data access buffering +// <3=> Reserved (do not use this setting) +// ACCEL: Acceleration Enable +// PREFEN: Prefetch Enable +// PREFOVR: Prefetch Override +// FLASHTIM: Flash Access Time +// <0=> 1 CPU clock (for CPU clock up to 20 MHz) +// <1=> 2 CPU clocks (for CPU clock up to 40 MHz) +// <2=> 3 CPU clocks (for CPU clock up to 60 MHz) +// <3=> 4 CPU clocks (for CPU clock up to 80 MHz) +// <4=> 5 CPU clocks (for CPU clock up to 100 MHz) +// <5=> 6 CPU clocks (for any CPU clock) +// +*/ +#define FLASH_SETUP 1 +#define FLASHCFG_Val 0x0000303A + +/* +//-------- <<< end of configuration section >>> ------------------------------ +*/ + +/*---------------------------------------------------------------------------- + Check the register settings + *----------------------------------------------------------------------------*/ +#define CHECK_RANGE(val, min, max) ((val < min) || (val > max)) +#define CHECK_RSVD(val, mask) (val & mask) + +/* Clock Configuration -------------------------------------------------------*/ +#if (CHECK_RSVD((SCS_Val), ~0x00000030)) + #error "SCS: Invalid values of reserved bits!" +#endif + +#if (CHECK_RANGE((CLKSRCSEL_Val), 0, 2)) + #error "CLKSRCSEL: Value out of range!" +#endif + +#if (CHECK_RSVD((PLL0CFG_Val), ~0x00FF7FFF)) + #error "PLL0CFG: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((PLL1CFG_Val), ~0x0000007F)) + #error "PLL1CFG: Invalid values of reserved bits!" +#endif + +#if ((CCLKCFG_Val != 0) && (((CCLKCFG_Val - 1) % 2))) + #error "CCLKCFG: CCLKSEL field does not contain only odd values or 0!" +#endif + +#if (CHECK_RSVD((USBCLKCFG_Val), ~0x0000000F)) + #error "USBCLKCFG: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((PCLKSEL0_Val), 0x000C0C00)) + #error "PCLKSEL0: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((PCLKSEL1_Val), 0x03000300)) + #error "PCLKSEL1: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((PCONP_Val), 0x10100821)) + #error "PCONP: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((CLKOUTCFG_Val), ~0x000001FF)) + #error "CLKOUTCFG: Invalid values of reserved bits!" +#endif + +/* Flash Accelerator Configuration -------------------------------------------*/ +#if (CHECK_RSVD((FLASHCFG_Val), ~0x0000F07F)) + #error "FLASHCFG: Invalid values of reserved bits!" +#endif + + +/*---------------------------------------------------------------------------- + DEFINES + *----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (12000000UL) /* Oscillator frequency */ +#define OSC_CLK ( XTAL) /* Main oscillator frequency */ +#define RTC_CLK ( 32000UL) /* RTC oscillator frequency */ +#define IRC_OSC ( 4000000UL) /* Internal RC oscillator frequency */ + + +/*---------------------------------------------------------------------------- + Clock Variable definitions + *----------------------------------------------------------------------------*/ +uint32_t SystemFrequency = IRC_OSC; /*!< System Clock Frequency (Core Clock) */ + + +/** + * Initialize the system + * + * @param none + * @return none + * + * @brief Setup the microcontroller system. + * Initialize the System and update the SystemFrequency variable. + */ +void SystemInit (void) +{ +#if (CLOCK_SETUP) /* Clock Setup */ + SC->SCS = SCS_Val; + if (SCS_Val & (1 << 5)) { /* If Main Oscillator is enabled */ + while ((SC->SCS & (1 << 6)) == 0); /* Wait for Oscillator to be ready */ + } + + SC->CCLKCFG = CCLKCFG_Val; /* Setup Clock Divider */ + +#if (PLL0_SETUP) + SC->CLKSRCSEL = CLKSRCSEL_Val; /* Select Clock Source for PLL0 */ + SC->PLL0CFG = PLL0CFG_Val; + SC->PLL0CON = 0x01; /* PLL0 Enable */ + SC->PLL0FEED = 0xAA; + SC->PLL0FEED = 0x55; + while (!(SC->PLL0STAT & (1 << 26))); /* Wait for PLOCK0 */ + + SC->PLL0CON = 0x03; /* PLL0 Enable & Connect */ + SC->PLL0FEED = 0xAA; + SC->PLL0FEED = 0x55; +#endif + +#if (PLL1_SETUP) + SC->PLL1CFG = PLL1CFG_Val; + SC->PLL1CON = 0x01; /* PLL1 Enable */ + SC->PLL1FEED = 0xAA; + SC->PLL1FEED = 0x55; + while (!(SC->PLL1STAT & (1 << 10))); /* Wait for PLOCK1 */ + + SC->PLL1CON = 0x03; /* PLL1 Enable & Connect */ + SC->PLL1FEED = 0xAA; + SC->PLL1FEED = 0x55; +#else + SC->USBCLKCFG = USBCLKCFG_Val; /* Setup USB Clock Divider */ +#endif + + SC->PCLKSEL0 = PCLKSEL0_Val; /* Peripheral Clock Selection */ + SC->PCLKSEL1 = PCLKSEL1_Val; + + SC->PCONP = PCONP_Val; /* Power Control for Peripherals */ + + SC->CLKOUTCFG = CLKOUTCFG_Val; /* Clock Output Configuration */ +#endif + + /* Determine clock frequency according to clock register values */ + if (((SC->PLL0STAT >> 24) & 3) == 3) {/* If PLL0 enabled and connected */ + switch (SC->CLKSRCSEL & 0x03) { + case 0: /* Internal RC oscillator => PLL0 */ + case 3: /* Reserved, default to Internal RC */ + SystemFrequency = (IRC_OSC * + (((2 * ((SC->PLL0STAT & 0x7FFF) + 1))) / + (((SC->PLL0STAT >> 16) & 0xFF) + 1)) / + ((SC->CCLKCFG & 0xFF)+ 1)); + break; + case 1: /* Main oscillator => PLL0 */ + SystemFrequency = (OSC_CLK * + (((2 * ((SC->PLL0STAT & 0x7FFF) + 1))) / + (((SC->PLL0STAT >> 16) & 0xFF) + 1)) / + ((SC->CCLKCFG & 0xFF)+ 1)); + break; + case 2: /* RTC oscillator => PLL0 */ + SystemFrequency = (RTC_CLK * + (((2 * ((SC->PLL0STAT & 0x7FFF) + 1))) / + (((SC->PLL0STAT >> 16) & 0xFF) + 1)) / + ((SC->CCLKCFG & 0xFF)+ 1)); + break; + } + } else { + switch (SC->CLKSRCSEL & 0x03) { + case 0: /* Internal RC oscillator => PLL0 */ + case 3: /* Reserved, default to Internal RC */ + SystemFrequency = IRC_OSC / ((SC->CCLKCFG & 0xFF)+ 1); + break; + case 1: /* Main oscillator => PLL0 */ + SystemFrequency = OSC_CLK / ((SC->CCLKCFG & 0xFF)+ 1); + break; + case 2: /* RTC oscillator => PLL0 */ + SystemFrequency = RTC_CLK / ((SC->CCLKCFG & 0xFF)+ 1); + break; + } + } + +#if (FLASH_SETUP == 1) /* Flash Accelerator Setup */ + SC->FLASHCFG = FLASHCFG_Val; +#endif +} diff --git a/new_cmsis/system_LPC17xx.h b/new_cmsis/boards/lpc1768/system.h similarity index 92% rename from new_cmsis/system_LPC17xx.h rename to new_cmsis/boards/lpc1768/system.h index a5c9727..bbb075e 100644 --- a/new_cmsis/system_LPC17xx.h +++ b/new_cmsis/boards/lpc1768/system.h @@ -1,40 +1,40 @@ -/****************************************************************************** - * @file: system_LPC17xx.h - * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Header File - * for the NXP LPC17xx Device Series - * @version: V1.0 - * @date: 25. Nov. 2008 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2008 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-M3 - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - -#ifndef __SYSTEM_LPC17xx_H -#define __SYSTEM_LPC17xx_H - -extern uint32_t SystemFrequency; /*!< System Clock Frequency (Core Clock) */ - - -/** - * Initialize the system - * - * @param none - * @return none - * - * @brief Setup the microcontroller system. - * Initialize the System and update the SystemFrequency variable. - */ -extern void SystemInit (void); -#endif +/****************************************************************************** + * @file: system_LPC17xx.h + * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Header File + * for the NXP LPC17xx Device Series + * @version: V1.0 + * @date: 25. Nov. 2008 + *---------------------------------------------------------------------------- + * + * Copyright (C) 2008 ARM Limited. All rights reserved. + * + * ARM Limited (ARM) is supplying this software for use with Cortex-M3 + * processor based microcontrollers. This file can be freely distributed + * within development tools that are supporting such ARM based processors. + * + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + ******************************************************************************/ + + +#ifndef __SYSTEM_LPC17xx_H +#define __SYSTEM_LPC17xx_H + +extern uint32_t SystemFrequency; /*!< System Clock Frequency (Core Clock) */ + + +/** + * Initialize the system + * + * @param none + * @return none + * + * @brief Setup the microcontroller system. + * Initialize the System and update the SystemFrequency variable. + */ +extern void SystemInit (void); +#endif diff --git a/new_cmsis/led.h b/new_cmsis/led.h new file mode 100644 index 0000000..ef0be5d --- /dev/null +++ b/new_cmsis/led.h @@ -0,0 +1,43 @@ +#ifndef LED_H +#define LED_H + +#include + +extern uint32_t msTicks; /* counts 1ms timeTicks */ + +/*------------------------------------------------------------------------------ + delays number of tick Systicks (happens every 1 ms) + *------------------------------------------------------------------------------*/ +__inline static void Delay (uint32_t dlyTicks) { + uint32_t curTicks; + + curTicks = msTicks; + while ((msTicks - curTicks) < dlyTicks); +} + +/*------------------------------------------------------------------------------ + configer LED pins + *------------------------------------------------------------------------------*/ +__inline static void LED_Config(void) { + + GPIO1->FIODIR = (1<<29)|(1<<18); /* LEDs on PORT1 18 & 29 are Output */ +} + +/*------------------------------------------------------------------------------ + Switch on LEDs + *------------------------------------------------------------------------------*/ +__inline static void LED_On (uint32_t led) { + + GPIO1->FIOPIN |= (led); /* Turn On LED */ +} + + +/*------------------------------------------------------------------------------ + Switch off LEDs + *------------------------------------------------------------------------------*/ +__inline static void LED_Off (uint32_t led) { + + GPIO1->FIOPIN &= ~(led); /* Turn Off LED */ +} + +#endif diff --git a/new_cmsis/main.c b/new_cmsis/main.c index 3daf11b..d89416b 100644 --- a/new_cmsis/main.c +++ b/new_cmsis/main.c @@ -1,93 +1,110 @@ -/****************************************************************************** - * @file: main.c - * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Source File - * Blink a LED using CM3 SysTick - * @version: V1.0 - * @date: 22. May 2009 - *---------------------------------------------------------------------------- - * - * Copyright (C) 2008 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-M3 - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -#include "LPC17xx.h" - - -uint32_t msTicks; /* counts 1ms timeTicks */ -/*---------------------------------------------------------------------------- - SysTick_Handler - *----------------------------------------------------------------------------*/ -void SysTick_Handler(void) { - msTicks++; /* increment counter necessary in Delay() */ -} - -/*------------------------------------------------------------------------------ - delays number of tick Systicks (happens every 1 ms) - *------------------------------------------------------------------------------*/ -__inline static void Delay (uint32_t dlyTicks) { - uint32_t curTicks; - - curTicks = msTicks; - while ((msTicks - curTicks) < dlyTicks); -} - -/*------------------------------------------------------------------------------ - configer LED pins - *------------------------------------------------------------------------------*/ -__inline static void LED_Config(void) { - - GPIO1->FIODIR = (1<<29)|(1<<18); /* LEDs on PORT1 18 & 29 are Output */ -} - -/*------------------------------------------------------------------------------ - Switch on LEDs - *------------------------------------------------------------------------------*/ -__inline static void LED_On (uint32_t led) { - - GPIO1->FIOPIN |= (led); /* Turn On LED */ -} - - -/*------------------------------------------------------------------------------ - Switch off LEDs - *------------------------------------------------------------------------------*/ -__inline static void LED_Off (uint32_t led) { - - GPIO1->FIOPIN &= ~(led); /* Turn Off LED */ -} - -/*---------------------------------------------------------------------------- - MAIN function - *----------------------------------------------------------------------------*/ -int main (void) { - - SystemInit(); /* setup clocks */ - if (SysTick_Config(SystemFrequency / 1000)) { /* Setup SysTick Timer for 1 msec interrupts */ - while (1); /* Capture error */ - } - - LED_Config(); - - while(1) { - LED_On ((1<<29)); /* Turn on the LED. */ - LED_On ((1<<18)); /* Turn on the LED. */ - Delay (100); /* delay 100 Msec */ - LED_Off ((1<<29)); /* Turn on the LED. */ - Delay (100); /* delay 100 Msec */ - LED_Off ((1<<18)); /* Turn on the LED. */ - LED_On ((1<<29)); /* Turn on the LED. */ - Delay (100); /* delay 100 Msec */ - } - -} - +/****************************************************************************** + * @file: main.c + * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Source File + * Blink a LED using CM3 SysTick + * @version: V1.0 + * @date: 22. May 2009 + *---------------------------------------------------------------------------- + * + * Copyright (C) 2008 ARM Limited. All rights reserved. + * + * ARM Limited (ARM) is supplying this software for use with Cortex-M3 + * processor based microcontrollers. This file can be freely distributed + * within development tools that are supporting such ARM based processors. + * + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + ******************************************************************************/ + +#include +#include "usb.h" + +uint32_t msTicks; /* counts 1ms timeTicks */ +/*---------------------------------------------------------------------------- + SysTick_Handler + *----------------------------------------------------------------------------*/ +void SysTick_Handler(void) { + msTicks++; /* increment counter necessary in Delay() */ +} + +/*------------------------------------------------------------------------------ + delays number of tick Systicks (happens every 1 ms) + *------------------------------------------------------------------------------*/ +__inline static void Delay (uint32_t dlyTicks) { + uint32_t curTicks; + + curTicks = msTicks; + while ((msTicks - curTicks) < dlyTicks); +} + +/*------------------------------------------------------------------------------ + configer LED pins + *------------------------------------------------------------------------------*/ +__inline static void LED_Config(void) { + + GPIO1->FIODIR = (1<<29)|(1<<18); /* LEDs on PORT1 18 & 29 are Output */ +} + +/*------------------------------------------------------------------------------ + Switch on LEDs + *------------------------------------------------------------------------------*/ +__inline static void LED_On (uint32_t led) { + + GPIO1->FIOPIN |= (led); /* Turn On LED */ +} + + +/*------------------------------------------------------------------------------ + Switch off LEDs + *------------------------------------------------------------------------------*/ +__inline static void LED_Off (uint32_t led) { + + GPIO1->FIOPIN &= ~(led); /* Turn Off LED */ +} + +void lightshow() { + while (1) { + LED_On ((1<<29)); /* Turn on the LED. */ + LED_On ((1<<18)); /* Turn on the LED. */ + Delay (100); /* delay 100 Msec */ + LED_Off ((1<<29)); /* Turn on the LED. */ + Delay (100); /* delay 100 Msec */ + LED_Off ((1<<18)); /* Turn on the LED. */ + LED_On ((1<<29)); /* Turn on the LED. */ + Delay (100); /* delay 100 Msec */ + } +} + +/*---------------------------------------------------------------------------- + MAIN function + *----------------------------------------------------------------------------*/ +int main (void) { + + SystemInit(); /* setup clocks */ + + if (SysTick_Config(SystemFrequency / 1000)) { /* Setup SysTick Timer for 1 msec interrupts */ + while (1); /* Capture error */ + } + + LED_Config(); + + VCOM_Init(); // VCOM Initialization + + USB_Init(); // USB Initialization + + USB_Connect(TRUE); // USB Connect + //lightshow(); + + while (!USB_Configuration) ; // wait until USB is configured + + while (1) { // Loop forever + VCOM_Serial2Usb(); // read serial port and initiate USB event + VCOM_CheckSerialState(); + VCOM_Usb2Serial(); + } // end while +} + diff --git a/new_cmsis/usb.h b/new_cmsis/usb.h new file mode 100644 index 0000000..def2203 --- /dev/null +++ b/new_cmsis/usb.h @@ -0,0 +1,9 @@ +#include "usb/usb.h" +#include "usb/cfg.h" +#include "usb/hw.h" +#include "usb/core.h" +#include "usb/cdc.h" +#include "usb/cdcuser.h" +#include "usb/serial.h" +#include "usb/vcom.h" + diff --git a/new_cmsis/usb/LPC1768-flash.ld b/new_cmsis/usb/LPC1768-flash.ld deleted file mode 100644 index cebf954..0000000 --- a/new_cmsis/usb/LPC1768-flash.ld +++ /dev/null @@ -1,50 +0,0 @@ -/* - * This is the NXP LPC1768 linker file for code running from flash. - * - * TODO: - * - handle the exotic input sections (e.g. glue and veneer, C++ sections) - * - add additional Ethernet and USB RAM memory regions (2x16k) - * - add boot ROM memory regions - * - * See also: http://bitbucket.org/jpc/lpc1768/ - * - * Copyright (c) 2010 LoEE - Jakub Piotr Cłapa - * This program is released under the new BSD license. - */ -OUTPUT_FORMAT("elf32-littlearm") -OUTPUT_ARCH(arm) - -ENTRY(Reset_Handler) - -MEMORY { - flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K - ram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K -} - -SECTIONS { - . = 0; - - .text : { - _stext = .; - KEEP(*(.isr_vector)) - *(.text*) - *(.rodata*) - . = ALIGN(4); - _etext = .; - } > flash - - .data : { - _sdata = .; - *(.data*) - _edata = .; - } > ram AT > flash - - .bss : { - _sbss = .; - *(.bss*) - . = ALIGN(4); - _ebss = .; - } > ram - - _sstack = ORIGIN(ram) + LENGTH(ram); -} diff --git a/new_cmsis/usb/Makefile b/new_cmsis/usb/Makefile deleted file mode 100644 index 5c55c09..0000000 --- a/new_cmsis/usb/Makefile +++ /dev/null @@ -1,26 +0,0 @@ -PROJECT=usbdemo -PLATFORM ?= arm-none-eabi -LDFLAGS=--gc-sections -g -T LPC1768-flash.ld -CFLAGS=-W -Wall --std=gnu99 -fgnu89-inline -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections -I. -g -#CFLAGS+=-Os - -# objects are separated by space -OBJECTS=serial.o usbcore.o usbdesc.o usbhw.o usbuser.o vcomdemo.o startup.o cdcuser.o ../system_LPC17xx.o - - -all: $(PROJECT).elf - -$(PROJECT).elf: $(OBJECTS) - $(PLATFORM)-ld -Map $(PROJECT).map $(LDFLAGS) $(OBJECTS) -o $@ - -%.o: %.c - $(PLATFORM)-gcc -MM $< -MF $(patsubst %.o,%.d,$@) -MP - $(PLATFORM)-gcc $(CFLAGS) -c $< -o $@ - -.PHONY: clean gdb - -clean: - rm -f $(PROJECT).elf $(OBJECTS) $(OBJECTS:.o=.d) $(PROJECT).map - -gdb: - $(PLATFORM)-gdb $(PROJECT).elf diff --git a/new_cmsis/usb/cdc.h b/new_cmsis/usb/cdc.h index 720517a..7bb2abf 100755 --- a/new_cmsis/usb/cdc.h +++ b/new_cmsis/usb/cdc.h @@ -1,283 +1,283 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: CDC.h - * Purpose: USB Communication Device Class Definitions - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC family microcontroller devices only. Nothing - * else gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -#ifndef __CDC_H -#define __CDC_H -#include "lpc_types.h" - -#if defined ( __GNUC__ ) -#define __packed __attribute__((__packed__)) -#endif -/*---------------------------------------------------------------------------- - * Definitions based on usbcdc11.pdf (www.usb.org) - *---------------------------------------------------------------------------*/ -// Communication device class specification version 1.10 -#define CDC_V1_10 0x0110 - -// Communication interface class code -// (usbcdc11.pdf, 4.2, Table 15) -#define CDC_COMMUNICATION_INTERFACE_CLASS 0x02 - -// Communication interface class subclass codes -// (usbcdc11.pdf, 4.3, Table 16) -#define CDC_DIRECT_LINE_CONTROL_MODEL 0x01 -#define CDC_ABSTRACT_CONTROL_MODEL 0x02 -#define CDC_TELEPHONE_CONTROL_MODEL 0x03 -#define CDC_MULTI_CHANNEL_CONTROL_MODEL 0x04 -#define CDC_CAPI_CONTROL_MODEL 0x05 -#define CDC_ETHERNET_NETWORKING_CONTROL_MODEL 0x06 -#define CDC_ATM_NETWORKING_CONTROL_MODEL 0x07 - -// Communication interface class control protocol codes -// (usbcdc11.pdf, 4.4, Table 17) -#define CDC_PROTOCOL_COMMON_AT_COMMANDS 0x01 - -// Data interface class code -// (usbcdc11.pdf, 4.5, Table 18) -#define CDC_DATA_INTERFACE_CLASS 0x0A - -// Data interface class protocol codes -// (usbcdc11.pdf, 4.7, Table 19) -#define CDC_PROTOCOL_ISDN_BRI 0x30 -#define CDC_PROTOCOL_HDLC 0x31 -#define CDC_PROTOCOL_TRANSPARENT 0x32 -#define CDC_PROTOCOL_Q921_MANAGEMENT 0x50 -#define CDC_PROTOCOL_Q921_DATA_LINK 0x51 -#define CDC_PROTOCOL_Q921_MULTIPLEXOR 0x52 -#define CDC_PROTOCOL_V42 0x90 -#define CDC_PROTOCOL_EURO_ISDN 0x91 -#define CDC_PROTOCOL_V24_RATE_ADAPTATION 0x92 -#define CDC_PROTOCOL_CAPI 0x93 -#define CDC_PROTOCOL_HOST_BASED_DRIVER 0xFD -#define CDC_PROTOCOL_DESCRIBED_IN_PUFD 0xFE - -// Type values for bDescriptorType field of functional descriptors -// (usbcdc11.pdf, 5.2.3, Table 24) -#define CDC_CS_INTERFACE 0x24 -#define CDC_CS_ENDPOINT 0x25 - -// Type values for bDescriptorSubtype field of functional descriptors -// (usbcdc11.pdf, 5.2.3, Table 25) -#define CDC_HEADER 0x00 -#define CDC_CALL_MANAGEMENT 0x01 -#define CDC_ABSTRACT_CONTROL_MANAGEMENT 0x02 -#define CDC_DIRECT_LINE_MANAGEMENT 0x03 -#define CDC_TELEPHONE_RINGER 0x04 -#define CDC_REPORTING_CAPABILITIES 0x05 -#define CDC_UNION 0x06 -#define CDC_COUNTRY_SELECTION 0x07 -#define CDC_TELEPHONE_OPERATIONAL_MODES 0x08 -#define CDC_USB_TERMINAL 0x09 -#define CDC_NETWORK_CHANNEL 0x0A -#define CDC_PROTOCOL_UNIT 0x0B -#define CDC_EXTENSION_UNIT 0x0C -#define CDC_MULTI_CHANNEL_MANAGEMENT 0x0D -#define CDC_CAPI_CONTROL_MANAGEMENT 0x0E -#define CDC_ETHERNET_NETWORKING 0x0F -#define CDC_ATM_NETWORKING 0x10 - -// CDC class-specific request codes -// (usbcdc11.pdf, 6.2, Table 46) -// see Table 45 for info about the specific requests. -#define CDC_SEND_ENCAPSULATED_COMMAND 0x00 -#define CDC_GET_ENCAPSULATED_RESPONSE 0x01 -#define CDC_SET_COMM_FEATURE 0x02 -#define CDC_GET_COMM_FEATURE 0x03 -#define CDC_CLEAR_COMM_FEATURE 0x04 -#define CDC_SET_AUX_LINE_STATE 0x10 -#define CDC_SET_HOOK_STATE 0x11 -#define CDC_PULSE_SETUP 0x12 -#define CDC_SEND_PULSE 0x13 -#define CDC_SET_PULSE_TIME 0x14 -#define CDC_RING_AUX_JACK 0x15 -#define CDC_SET_LINE_CODING 0x20 -#define CDC_GET_LINE_CODING 0x21 -#define CDC_SET_CONTROL_LINE_STATE 0x22 -#define CDC_SEND_BREAK 0x23 -#define CDC_SET_RINGER_PARMS 0x30 -#define CDC_GET_RINGER_PARMS 0x31 -#define CDC_SET_OPERATION_PARMS 0x32 -#define CDC_GET_OPERATION_PARMS 0x33 -#define CDC_SET_LINE_PARMS 0x34 -#define CDC_GET_LINE_PARMS 0x35 -#define CDC_DIAL_DIGITS 0x36 -#define CDC_SET_UNIT_PARAMETER 0x37 -#define CDC_GET_UNIT_PARAMETER 0x38 -#define CDC_CLEAR_UNIT_PARAMETER 0x39 -#define CDC_GET_PROFILE 0x3A -#define CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40 -#define CDC_SET_ETHERNET_PMP_FILTER 0x41 -#define CDC_GET_ETHERNET_PMP_FILTER 0x42 -#define CDC_SET_ETHERNET_PACKET_FILTER 0x43 -#define CDC_GET_ETHERNET_STATISTIC 0x44 -#define CDC_SET_ATM_DATA_FORMAT 0x50 -#define CDC_GET_ATM_DEVICE_STATISTICS 0x51 -#define CDC_SET_ATM_DEFAULT_VC 0x52 -#define CDC_GET_ATM_VC_STATISTICS 0x53 - -// Communication feature selector codes -// (usbcdc11.pdf, 6.2.2..6.2.4, Table 47) -#define CDC_ABSTRACT_STATE 0x01 -#define CDC_COUNTRY_SETTING 0x02 - -// Feature Status returned for ABSTRACT_STATE Selector -// (usbcdc11.pdf, 6.2.3, Table 48) -#define CDC_IDLE_SETTING (1 << 0) -#define CDC_DATA_MULTPLEXED_STATE (1 << 1) - - -// Control signal bitmap values for the SetControlLineState request -// (usbcdc11.pdf, 6.2.14, Table 51) -#define CDC_DTE_PRESENT (1 << 0) -#define CDC_ACTIVATE_CARRIER (1 << 1) - -// CDC class-specific notification codes -// (usbcdc11.pdf, 6.3, Table 68) -// see Table 67 for Info about class-specific notifications -#define CDC_NOTIFICATION_NETWORK_CONNECTION 0x00 -#define CDC_RESPONSE_AVAILABLE 0x01 -#define CDC_AUX_JACK_HOOK_STATE 0x08 -#define CDC_RING_DETECT 0x09 -#define CDC_NOTIFICATION_SERIAL_STATE 0x20 -#define CDC_CALL_STATE_CHANGE 0x28 -#define CDC_LINE_STATE_CHANGE 0x29 -#define CDC_CONNECTION_SPEED_CHANGE 0x2A - -// UART state bitmap values (Serial state notification). -// (usbcdc11.pdf, 6.3.5, Table 69) -#define CDC_SERIAL_STATE_OVERRUN (1 << 6) // receive data overrun error has occurred -#define CDC_SERIAL_STATE_PARITY (1 << 5) // parity error has occurred -#define CDC_SERIAL_STATE_FRAMING (1 << 4) // framing error has occurred -#define CDC_SERIAL_STATE_RING (1 << 3) // state of ring signal detection -#define CDC_SERIAL_STATE_BREAK (1 << 2) // state of break detection -#define CDC_SERIAL_STATE_TX_CARRIER (1 << 1) // state of transmission carrier -#define CDC_SERIAL_STATE_RX_CARRIER (1 << 0) // state of receiver carrier - - -/*---------------------------------------------------------------------------- - * Structures based on usbcdc11.pdf (www.usb.org) - *---------------------------------------------------------------------------*/ - -// Header functional descriptor -// (usbcdc11.pdf, 5.2.3.1) -// This header must precede any list of class-specific descriptors. - -#if defined ( __CC_ARM ) -typedef __packed struct _CDC_HEADER_DESCRIPTOR{ -#elif defined ( __GNUC__ ) -typedef struct __packed _CDC_HEADER_DESCRIPTOR{ -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _CDC_HEADER_DESCRIPTOR { -#endif - uint8_t bFunctionLength; // size of this descriptor in bytes - uint8_t bDescriptorType; // CS_INTERFACE descriptor type - uint8_t bDescriptorSubtype; // Header functional descriptor subtype - uint16_t bcdCDC; // USB CDC specification release version -} CDC_HEADER_DESCRIPTOR; - -//Call management functional descriptor -// (usbcdc11.pdf, 5.2.3.2) -// Describes the processing of calls for the communication class interface. -#if defined ( __CC_ARM ) -typedef __packed struct _CDC_CALL_MANAGEMENT_DESCRIPTOR{ -#elif defined ( __GNUC__ ) -typedef struct __packed _CDC_CALL_MANAGEMENT_DESCRIPTOR{ -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _CDC_CALL_MANAGEMENT_DESCRIPTOR { -#endif - uint8_t bFunctionLength; // size of this descriptor in bytes - uint8_t bDescriptorType; // CS_INTERFACE descriptor type - uint8_t bDescriptorSubtype; // call management functional descriptor subtype - uint8_t bmCapabilities; // capabilities that this configuration supports - uint8_t bDataInterface; // interface number of the data class interface used for call management (optional) -} CDC_CALL_MANAGEMENT_DESCRIPTOR; - -// Abstract control management functional descriptor -// (usbcdc11.pdf, 5.2.3.3) -// Describes the command supported by the communication interface class with the Abstract Control Model subclass code. -#if defined ( __CC_ARM ) -typedef __packed struct _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR{ -#elif defined ( __GNUC__ ) -typedef struct __packed _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR{ -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR { -#endif - uint8_t bFunctionLength; // size of this descriptor in bytes - uint8_t bDescriptorType; // CS_INTERFACE descriptor type - uint8_t bDescriptorSubtype; // abstract control management functional descriptor subtype - uint8_t bmCapabilities; // capabilities supported by this configuration -} CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR; - -// Union functional descriptors -// (usbcdc11.pdf, 5.2.3.8) -// Describes the relationship between a group of interfaces that can be considered to form a functional unit. -#if defined ( __CC_ARM ) -typedef __packed struct _CDC_UNION_DESCRIPTOR{ -#elif defined ( __GNUC__ ) -typedef struct __packed _CDC_UNION_DESCRIPTOR{ -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _CDC_UNION_DESCRIPTOR { -#endif - uint8_t bFunctionLength; // size of this descriptor in bytes - uint8_t bDescriptorType; // CS_INTERFACE descriptor type - uint8_t bDescriptorSubtype; // union functional descriptor subtype - uint8_t bMasterInterface; // interface number designated as master -} CDC_UNION_DESCRIPTOR; - -// Union functional descriptors with one slave interface -// (usbcdc11.pdf, 5.2.3.8) -#if defined ( __CC_ARM ) -typedef __packed struct _CDC_UNION_1SLAVE_DESCRIPTOR{ -#elif defined ( __GNUC__ ) -typedef struct __packed _CDC_UNION_1SLAVE_DESCRIPTOR{ -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _CDC_UNION_1SLAVE_DESCRIPTOR { -#endif - CDC_UNION_DESCRIPTOR sUnion; // Union functional descriptor - uint8_t bSlaveInterfaces[1]; // Slave interface 0 -} CDC_UNION_1SLAVE_DESCRIPTOR; - -// Line coding structure -// Format of the data returned when a GetLineCoding request is received -// (usbcdc11.pdf, 6.2.13) -#if defined ( __CC_ARM ) -typedef __packed struct _CDC_LINE_CODING{ -#elif defined ( __GNUC__ ) -typedef struct __packed _CDC_LINE_CODING{ -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _CDC_LINE_CODING { -#endif - uint32_t dwDTERate; // Data terminal rate in bits per second - uint8_t bCharFormat; // Number of stop bits - uint8_t bParityType; // Parity bit type - uint8_t bDataBits; // Number of data bits -} CDC_LINE_CODING; - -// Notification header -// Data sent on the notification endpoint must follow this header. -// see USB_SETUP_PACKET in file usb.h -typedef USB_SETUP_PACKET CDC_NOTIFICATION_HEADER; - -#endif /* __CDC_H */ - +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: CDC.h + * Purpose: USB Communication Device Class Definitions + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC family microcontroller devices only. Nothing + * else gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#ifndef __CDC_H +#define __CDC_H +#include "lpc_types.h" + +#if defined ( __GNUC__ ) +#define __packed __attribute__((__packed__)) +#endif +/*---------------------------------------------------------------------------- + * Definitions based on usbcdc11.pdf (www.usb.org) + *---------------------------------------------------------------------------*/ +// Communication device class specification version 1.10 +#define CDC_V1_10 0x0110 + +// Communication interface class code +// (usbcdc11.pdf, 4.2, Table 15) +#define CDC_COMMUNICATION_INTERFACE_CLASS 0x02 + +// Communication interface class subclass codes +// (usbcdc11.pdf, 4.3, Table 16) +#define CDC_DIRECT_LINE_CONTROL_MODEL 0x01 +#define CDC_ABSTRACT_CONTROL_MODEL 0x02 +#define CDC_TELEPHONE_CONTROL_MODEL 0x03 +#define CDC_MULTI_CHANNEL_CONTROL_MODEL 0x04 +#define CDC_CAPI_CONTROL_MODEL 0x05 +#define CDC_ETHERNET_NETWORKING_CONTROL_MODEL 0x06 +#define CDC_ATM_NETWORKING_CONTROL_MODEL 0x07 + +// Communication interface class control protocol codes +// (usbcdc11.pdf, 4.4, Table 17) +#define CDC_PROTOCOL_COMMON_AT_COMMANDS 0x01 + +// Data interface class code +// (usbcdc11.pdf, 4.5, Table 18) +#define CDC_DATA_INTERFACE_CLASS 0x0A + +// Data interface class protocol codes +// (usbcdc11.pdf, 4.7, Table 19) +#define CDC_PROTOCOL_ISDN_BRI 0x30 +#define CDC_PROTOCOL_HDLC 0x31 +#define CDC_PROTOCOL_TRANSPARENT 0x32 +#define CDC_PROTOCOL_Q921_MANAGEMENT 0x50 +#define CDC_PROTOCOL_Q921_DATA_LINK 0x51 +#define CDC_PROTOCOL_Q921_MULTIPLEXOR 0x52 +#define CDC_PROTOCOL_V42 0x90 +#define CDC_PROTOCOL_EURO_ISDN 0x91 +#define CDC_PROTOCOL_V24_RATE_ADAPTATION 0x92 +#define CDC_PROTOCOL_CAPI 0x93 +#define CDC_PROTOCOL_HOST_BASED_DRIVER 0xFD +#define CDC_PROTOCOL_DESCRIBED_IN_PUFD 0xFE + +// Type values for bDescriptorType field of functional descriptors +// (usbcdc11.pdf, 5.2.3, Table 24) +#define CDC_CS_INTERFACE 0x24 +#define CDC_CS_ENDPOINT 0x25 + +// Type values for bDescriptorSubtype field of functional descriptors +// (usbcdc11.pdf, 5.2.3, Table 25) +#define CDC_HEADER 0x00 +#define CDC_CALL_MANAGEMENT 0x01 +#define CDC_ABSTRACT_CONTROL_MANAGEMENT 0x02 +#define CDC_DIRECT_LINE_MANAGEMENT 0x03 +#define CDC_TELEPHONE_RINGER 0x04 +#define CDC_REPORTING_CAPABILITIES 0x05 +#define CDC_UNION 0x06 +#define CDC_COUNTRY_SELECTION 0x07 +#define CDC_TELEPHONE_OPERATIONAL_MODES 0x08 +#define CDC_USB_TERMINAL 0x09 +#define CDC_NETWORK_CHANNEL 0x0A +#define CDC_PROTOCOL_UNIT 0x0B +#define CDC_EXTENSION_UNIT 0x0C +#define CDC_MULTI_CHANNEL_MANAGEMENT 0x0D +#define CDC_CAPI_CONTROL_MANAGEMENT 0x0E +#define CDC_ETHERNET_NETWORKING 0x0F +#define CDC_ATM_NETWORKING 0x10 + +// CDC class-specific request codes +// (usbcdc11.pdf, 6.2, Table 46) +// see Table 45 for info about the specific requests. +#define CDC_SEND_ENCAPSULATED_COMMAND 0x00 +#define CDC_GET_ENCAPSULATED_RESPONSE 0x01 +#define CDC_SET_COMM_FEATURE 0x02 +#define CDC_GET_COMM_FEATURE 0x03 +#define CDC_CLEAR_COMM_FEATURE 0x04 +#define CDC_SET_AUX_LINE_STATE 0x10 +#define CDC_SET_HOOK_STATE 0x11 +#define CDC_PULSE_SETUP 0x12 +#define CDC_SEND_PULSE 0x13 +#define CDC_SET_PULSE_TIME 0x14 +#define CDC_RING_AUX_JACK 0x15 +#define CDC_SET_LINE_CODING 0x20 +#define CDC_GET_LINE_CODING 0x21 +#define CDC_SET_CONTROL_LINE_STATE 0x22 +#define CDC_SEND_BREAK 0x23 +#define CDC_SET_RINGER_PARMS 0x30 +#define CDC_GET_RINGER_PARMS 0x31 +#define CDC_SET_OPERATION_PARMS 0x32 +#define CDC_GET_OPERATION_PARMS 0x33 +#define CDC_SET_LINE_PARMS 0x34 +#define CDC_GET_LINE_PARMS 0x35 +#define CDC_DIAL_DIGITS 0x36 +#define CDC_SET_UNIT_PARAMETER 0x37 +#define CDC_GET_UNIT_PARAMETER 0x38 +#define CDC_CLEAR_UNIT_PARAMETER 0x39 +#define CDC_GET_PROFILE 0x3A +#define CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40 +#define CDC_SET_ETHERNET_PMP_FILTER 0x41 +#define CDC_GET_ETHERNET_PMP_FILTER 0x42 +#define CDC_SET_ETHERNET_PACKET_FILTER 0x43 +#define CDC_GET_ETHERNET_STATISTIC 0x44 +#define CDC_SET_ATM_DATA_FORMAT 0x50 +#define CDC_GET_ATM_DEVICE_STATISTICS 0x51 +#define CDC_SET_ATM_DEFAULT_VC 0x52 +#define CDC_GET_ATM_VC_STATISTICS 0x53 + +// Communication feature selector codes +// (usbcdc11.pdf, 6.2.2..6.2.4, Table 47) +#define CDC_ABSTRACT_STATE 0x01 +#define CDC_COUNTRY_SETTING 0x02 + +// Feature Status returned for ABSTRACT_STATE Selector +// (usbcdc11.pdf, 6.2.3, Table 48) +#define CDC_IDLE_SETTING (1 << 0) +#define CDC_DATA_MULTPLEXED_STATE (1 << 1) + + +// Control signal bitmap values for the SetControlLineState request +// (usbcdc11.pdf, 6.2.14, Table 51) +#define CDC_DTE_PRESENT (1 << 0) +#define CDC_ACTIVATE_CARRIER (1 << 1) + +// CDC class-specific notification codes +// (usbcdc11.pdf, 6.3, Table 68) +// see Table 67 for Info about class-specific notifications +#define CDC_NOTIFICATION_NETWORK_CONNECTION 0x00 +#define CDC_RESPONSE_AVAILABLE 0x01 +#define CDC_AUX_JACK_HOOK_STATE 0x08 +#define CDC_RING_DETECT 0x09 +#define CDC_NOTIFICATION_SERIAL_STATE 0x20 +#define CDC_CALL_STATE_CHANGE 0x28 +#define CDC_LINE_STATE_CHANGE 0x29 +#define CDC_CONNECTION_SPEED_CHANGE 0x2A + +// UART state bitmap values (Serial state notification). +// (usbcdc11.pdf, 6.3.5, Table 69) +#define CDC_SERIAL_STATE_OVERRUN (1 << 6) // receive data overrun error has occurred +#define CDC_SERIAL_STATE_PARITY (1 << 5) // parity error has occurred +#define CDC_SERIAL_STATE_FRAMING (1 << 4) // framing error has occurred +#define CDC_SERIAL_STATE_RING (1 << 3) // state of ring signal detection +#define CDC_SERIAL_STATE_BREAK (1 << 2) // state of break detection +#define CDC_SERIAL_STATE_TX_CARRIER (1 << 1) // state of transmission carrier +#define CDC_SERIAL_STATE_RX_CARRIER (1 << 0) // state of receiver carrier + + +/*---------------------------------------------------------------------------- + * Structures based on usbcdc11.pdf (www.usb.org) + *---------------------------------------------------------------------------*/ + +// Header functional descriptor +// (usbcdc11.pdf, 5.2.3.1) +// This header must precede any list of class-specific descriptors. + +#if defined ( __CC_ARM ) +typedef __packed struct _CDC_HEADER_DESCRIPTOR{ +#elif defined ( __GNUC__ ) +typedef struct __packed _CDC_HEADER_DESCRIPTOR{ +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _CDC_HEADER_DESCRIPTOR { +#endif + uint8_t bFunctionLength; // size of this descriptor in bytes + uint8_t bDescriptorType; // CS_INTERFACE descriptor type + uint8_t bDescriptorSubtype; // Header functional descriptor subtype + uint16_t bcdCDC; // USB CDC specification release version +} CDC_HEADER_DESCRIPTOR; + +//Call management functional descriptor +// (usbcdc11.pdf, 5.2.3.2) +// Describes the processing of calls for the communication class interface. +#if defined ( __CC_ARM ) +typedef __packed struct _CDC_CALL_MANAGEMENT_DESCRIPTOR{ +#elif defined ( __GNUC__ ) +typedef struct __packed _CDC_CALL_MANAGEMENT_DESCRIPTOR{ +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _CDC_CALL_MANAGEMENT_DESCRIPTOR { +#endif + uint8_t bFunctionLength; // size of this descriptor in bytes + uint8_t bDescriptorType; // CS_INTERFACE descriptor type + uint8_t bDescriptorSubtype; // call management functional descriptor subtype + uint8_t bmCapabilities; // capabilities that this configuration supports + uint8_t bDataInterface; // interface number of the data class interface used for call management (optional) +} CDC_CALL_MANAGEMENT_DESCRIPTOR; + +// Abstract control management functional descriptor +// (usbcdc11.pdf, 5.2.3.3) +// Describes the command supported by the communication interface class with the Abstract Control Model subclass code. +#if defined ( __CC_ARM ) +typedef __packed struct _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR{ +#elif defined ( __GNUC__ ) +typedef struct __packed _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR{ +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR { +#endif + uint8_t bFunctionLength; // size of this descriptor in bytes + uint8_t bDescriptorType; // CS_INTERFACE descriptor type + uint8_t bDescriptorSubtype; // abstract control management functional descriptor subtype + uint8_t bmCapabilities; // capabilities supported by this configuration +} CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR; + +// Union functional descriptors +// (usbcdc11.pdf, 5.2.3.8) +// Describes the relationship between a group of interfaces that can be considered to form a functional unit. +#if defined ( __CC_ARM ) +typedef __packed struct _CDC_UNION_DESCRIPTOR{ +#elif defined ( __GNUC__ ) +typedef struct __packed _CDC_UNION_DESCRIPTOR{ +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _CDC_UNION_DESCRIPTOR { +#endif + uint8_t bFunctionLength; // size of this descriptor in bytes + uint8_t bDescriptorType; // CS_INTERFACE descriptor type + uint8_t bDescriptorSubtype; // union functional descriptor subtype + uint8_t bMasterInterface; // interface number designated as master +} CDC_UNION_DESCRIPTOR; + +// Union functional descriptors with one slave interface +// (usbcdc11.pdf, 5.2.3.8) +#if defined ( __CC_ARM ) +typedef __packed struct _CDC_UNION_1SLAVE_DESCRIPTOR{ +#elif defined ( __GNUC__ ) +typedef struct __packed _CDC_UNION_1SLAVE_DESCRIPTOR{ +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _CDC_UNION_1SLAVE_DESCRIPTOR { +#endif + CDC_UNION_DESCRIPTOR sUnion; // Union functional descriptor + uint8_t bSlaveInterfaces[1]; // Slave interface 0 +} CDC_UNION_1SLAVE_DESCRIPTOR; + +// Line coding structure +// Format of the data returned when a GetLineCoding request is received +// (usbcdc11.pdf, 6.2.13) +#if defined ( __CC_ARM ) +typedef __packed struct _CDC_LINE_CODING{ +#elif defined ( __GNUC__ ) +typedef struct __packed _CDC_LINE_CODING{ +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _CDC_LINE_CODING { +#endif + uint32_t dwDTERate; // Data terminal rate in bits per second + uint8_t bCharFormat; // Number of stop bits + uint8_t bParityType; // Parity bit type + uint8_t bDataBits; // Number of data bits +} CDC_LINE_CODING; + +// Notification header +// Data sent on the notification endpoint must follow this header. +// see USB_SETUP_PACKET in file usb.h +typedef USB_SETUP_PACKET CDC_NOTIFICATION_HEADER; + +#endif /* __CDC_H */ + diff --git a/new_cmsis/usb/cdcuser.c b/new_cmsis/usb/cdcuser.c index 3b4f52f..afbf3cd 100755 --- a/new_cmsis/usb/cdcuser.c +++ b/new_cmsis/usb/cdcuser.c @@ -1,379 +1,379 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: cdcuser.c - * Purpose: USB Communication Device Class User module - * Version: V1.10 - *---------------------------------------------------------------------------- -* This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC microcontroller devices only. Nothing else - * gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -#include "lpc_types.h" - -#include "usb.h" -#include "usbhw.h" -#include "usbcfg.h" -#include "usbcore.h" -#include "cdc.h" -#include "cdcuser.h" -#include "serial.h" - - -unsigned char BulkBufIn [USB_CDC_BUFSIZE]; // Buffer to store USB IN packet -unsigned char BulkBufOut [USB_CDC_BUFSIZE]; // Buffer to store USB OUT packet -unsigned char NotificationBuf [10]; - -CDC_LINE_CODING CDC_LineCoding = {9600, 0, 0, 8}; -unsigned short CDC_SerialState = 0x0000; -unsigned short CDC_DepInEmpty = 1; // Data IN EP is empty - -/*---------------------------------------------------------------------------- - We need a buffer for incomming data on USB port because USB receives - much faster than UART transmits - *---------------------------------------------------------------------------*/ -/* Buffer masks */ -#define CDC_BUF_SIZE (64) // Output buffer in bytes (power 2) - // large enough for file transfer -#define CDC_BUF_MASK (CDC_BUF_SIZE-1ul) - -/* Buffer read / write macros */ -#define CDC_BUF_RESET(cdcBuf) (cdcBuf.rdIdx = cdcBuf.wrIdx = 0) -#define CDC_BUF_WR(cdcBuf, dataIn) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.wrIdx++] = (dataIn)) -#define CDC_BUF_RD(cdcBuf) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.rdIdx++]) -#define CDC_BUF_EMPTY(cdcBuf) (cdcBuf.rdIdx == cdcBuf.wrIdx) -#define CDC_BUF_FULL(cdcBuf) (cdcBuf.rdIdx == cdcBuf.wrIdx+1) -#define CDC_BUF_COUNT(cdcBuf) (CDC_BUF_MASK & (cdcBuf.wrIdx - cdcBuf.rdIdx)) - - -// CDC output buffer -typedef struct __CDC_BUF_T { - unsigned char data[CDC_BUF_SIZE]; - unsigned int wrIdx; - unsigned int rdIdx; -} CDC_BUF_T; - -CDC_BUF_T CDC_OutBuf; // buffer for all CDC Out data - -/*---------------------------------------------------------------------------- - read data from CDC_OutBuf - *---------------------------------------------------------------------------*/ -int CDC_RdOutBuf (char *buffer, const int *length) { - int bytesToRead, bytesRead; - - /* Read *length bytes, block if *bytes are not avaialable */ - bytesToRead = *length; - bytesToRead = (bytesToRead < (*length)) ? bytesToRead : (*length); - bytesRead = bytesToRead; - - - // ... add code to check for underrun - - while (bytesToRead--) { - *buffer++ = CDC_BUF_RD(CDC_OutBuf); - } - return (bytesRead); -} - -/*---------------------------------------------------------------------------- - write data to CDC_OutBuf - *---------------------------------------------------------------------------*/ -int CDC_WrOutBuf (const char *buffer, int *length) { - int bytesToWrite, bytesWritten; - - // Write *length bytes - bytesToWrite = *length; - bytesWritten = bytesToWrite; - - - // ... add code to check for overwrite - - while (bytesToWrite) { - CDC_BUF_WR(CDC_OutBuf, *buffer++); // Copy Data to buffer - bytesToWrite--; - } - - return (bytesWritten); -} - -/*---------------------------------------------------------------------------- - check if character(s) are available at CDC_OutBuf - *---------------------------------------------------------------------------*/ -int CDC_OutBufAvailChar (int *availChar) { - - *availChar = CDC_BUF_COUNT(CDC_OutBuf); - - return (0); -} -/* end Buffer handling */ - - -/*---------------------------------------------------------------------------- - CDC Initialisation - Initializes the data structures and serial port - Parameters: None - Return Value: None - *---------------------------------------------------------------------------*/ -void CDC_Init (char portNum ) { - - if ( portNum == 0 ) - { - ser_OpenPort (0); - ser_InitPort0 (CDC_LineCoding.dwDTERate, - CDC_LineCoding.bDataBits, - CDC_LineCoding.bParityType, - CDC_LineCoding.bCharFormat); - } - else - { - ser_OpenPort (1); - ser_InitPort1 (CDC_LineCoding.dwDTERate, - CDC_LineCoding.bDataBits, - CDC_LineCoding.bParityType, - CDC_LineCoding.bCharFormat); - } - CDC_DepInEmpty = 1; - CDC_SerialState = CDC_GetSerialState(); - - CDC_BUF_RESET(CDC_OutBuf); -} - - -/*---------------------------------------------------------------------------- - CDC SendEncapsulatedCommand Request Callback - Called automatically on CDC SEND_ENCAPSULATED_COMMAND Request - Parameters: None (global SetupPacket and EP0Buf) - Return Value: TRUE - Success, FALSE - Error - *---------------------------------------------------------------------------*/ -uint32_t CDC_SendEncapsulatedCommand (void) { - - return (TRUE); -} - - -/*---------------------------------------------------------------------------- - CDC GetEncapsulatedResponse Request Callback - Called automatically on CDC Get_ENCAPSULATED_RESPONSE Request - Parameters: None (global SetupPacket and EP0Buf) - Return Value: TRUE - Success, FALSE - Error - *---------------------------------------------------------------------------*/ -uint32_t CDC_GetEncapsulatedResponse (void) { - - /* ... add code to handle request */ - return (TRUE); -} - - -/*---------------------------------------------------------------------------- - CDC SetCommFeature Request Callback - Called automatically on CDC Set_COMM_FATURE Request - Parameters: FeatureSelector - Return Value: TRUE - Success, FALSE - Error - *---------------------------------------------------------------------------*/ -uint32_t CDC_SetCommFeature (unsigned short wFeatureSelector) { - - /* ... add code to handle request */ - return (TRUE); -} - - -/*---------------------------------------------------------------------------- - CDC GetCommFeature Request Callback - Called automatically on CDC Get_COMM_FATURE Request - Parameters: FeatureSelector - Return Value: TRUE - Success, FALSE - Error - *---------------------------------------------------------------------------*/ -uint32_t CDC_GetCommFeature (unsigned short wFeatureSelector) { - - /* ... add code to handle request */ - return (TRUE); -} - - -/*---------------------------------------------------------------------------- - CDC ClearCommFeature Request Callback - Called automatically on CDC CLEAR_COMM_FATURE Request - Parameters: FeatureSelector - Return Value: TRUE - Success, FALSE - Error - *---------------------------------------------------------------------------*/ -uint32_t CDC_ClearCommFeature (unsigned short wFeatureSelector) { - - /* ... add code to handle request */ - return (TRUE); -} - - -/*---------------------------------------------------------------------------- - CDC SetLineCoding Request Callback - Called automatically on CDC SET_LINE_CODING Request - Parameters: none (global SetupPacket and EP0Buf) - Return Value: TRUE - Success, FALSE - Error - *---------------------------------------------------------------------------*/ -uint32_t CDC_SetLineCoding (void) { - - CDC_LineCoding.dwDTERate = (EP0Buf[0] << 0) - | (EP0Buf[1] << 8) - | (EP0Buf[2] << 16) - | (EP0Buf[3] << 24); - CDC_LineCoding.bCharFormat = EP0Buf[4]; - CDC_LineCoding.bParityType = EP0Buf[5]; - CDC_LineCoding.bDataBits = EP0Buf[6]; - -#if PORT_NUM - ser_ClosePort(1); - ser_OpenPort (1); - ser_InitPort1 (CDC_LineCoding.dwDTERate, - CDC_LineCoding.bDataBits, - CDC_LineCoding.bParityType, - CDC_LineCoding.bCharFormat); -#else - ser_ClosePort(0); - ser_OpenPort (0); - ser_InitPort0 (CDC_LineCoding.dwDTERate, - CDC_LineCoding.bDataBits, - CDC_LineCoding.bParityType, - CDC_LineCoding.bCharFormat); -#endif - return (TRUE); -} - - -/*---------------------------------------------------------------------------- - CDC GetLineCoding Request Callback - Called automatically on CDC GET_LINE_CODING Request - Parameters: None (global SetupPacket and EP0Buf) - Return Value: TRUE - Success, FALSE - Error - *---------------------------------------------------------------------------*/ -uint32_t CDC_GetLineCoding (void) { - - EP0Buf[0] = (CDC_LineCoding.dwDTERate >> 0) & 0xFF; - EP0Buf[1] = (CDC_LineCoding.dwDTERate >> 8) & 0xFF; - EP0Buf[2] = (CDC_LineCoding.dwDTERate >> 16) & 0xFF; - EP0Buf[3] = (CDC_LineCoding.dwDTERate >> 24) & 0xFF; - EP0Buf[4] = CDC_LineCoding.bCharFormat; - EP0Buf[5] = CDC_LineCoding.bParityType; - EP0Buf[6] = CDC_LineCoding.bDataBits; - - return (TRUE); -} - - -/*---------------------------------------------------------------------------- - CDC SetControlLineState Request Callback - Called automatically on CDC SET_CONTROL_LINE_STATE Request - Parameters: ControlSignalBitmap - Return Value: TRUE - Success, FALSE - Error - *---------------------------------------------------------------------------*/ -uint32_t CDC_SetControlLineState (unsigned short wControlSignalBitmap) { - - /* ... add code to handle request */ - return (TRUE); -} - - -/*---------------------------------------------------------------------------- - CDC SendBreak Request Callback - Called automatically on CDC Set_COMM_FATURE Request - Parameters: 0xFFFF start of Break - 0x0000 stop of Break - 0x#### Duration of Break - Return Value: TRUE - Success, FALSE - Error - *---------------------------------------------------------------------------*/ -uint32_t CDC_SendBreak (unsigned short wDurationOfBreak) { - - /* ... add code to handle request */ - return (TRUE); -} - - -/*---------------------------------------------------------------------------- - CDC_BulkIn call on DataIn Request - Parameters: none - Return Value: none - *---------------------------------------------------------------------------*/ -void CDC_BulkIn(void) { - int numBytesRead, numBytesAvail; - - ser_AvailChar (&numBytesAvail); - - // ... add code to check for overwrite - - numBytesRead = ser_Read ((char *)&BulkBufIn[0], &numBytesAvail); - - // send over USB - if (numBytesRead > 0) { - USB_WriteEP (CDC_DEP_IN, &BulkBufIn[0], numBytesRead); - } - else { - CDC_DepInEmpty = 1; - } -} - - -/*---------------------------------------------------------------------------- - CDC_BulkOut call on DataOut Request - Parameters: none - Return Value: none - *---------------------------------------------------------------------------*/ -void CDC_BulkOut(void) { - int numBytesRead; - - // get data from USB into intermediate buffer - numBytesRead = USB_ReadEP(CDC_DEP_OUT, &BulkBufOut[0]); - - // ... add code to check for overwrite - - // store data in a buffer to transmit it over serial interface - CDC_WrOutBuf ((char *)&BulkBufOut[0], &numBytesRead); - -} - - -/*---------------------------------------------------------------------------- - Get the SERIAL_STATE as defined in usbcdc11.pdf, 6.3.5, Table 69. - Parameters: none - Return Value: SerialState as defined in usbcdc11.pdf - *---------------------------------------------------------------------------*/ -unsigned short CDC_GetSerialState (void) { - unsigned short temp; - - CDC_SerialState = 0; - ser_LineState (&temp); - - if (temp & 0x8000) CDC_SerialState |= CDC_SERIAL_STATE_RX_CARRIER; - if (temp & 0x2000) CDC_SerialState |= CDC_SERIAL_STATE_TX_CARRIER; - if (temp & 0x0010) CDC_SerialState |= CDC_SERIAL_STATE_BREAK; - if (temp & 0x4000) CDC_SerialState |= CDC_SERIAL_STATE_RING; - if (temp & 0x0008) CDC_SerialState |= CDC_SERIAL_STATE_FRAMING; - if (temp & 0x0004) CDC_SerialState |= CDC_SERIAL_STATE_PARITY; - if (temp & 0x0002) CDC_SerialState |= CDC_SERIAL_STATE_OVERRUN; - - return (CDC_SerialState); -} - - -/*---------------------------------------------------------------------------- - Send the SERIAL_STATE notification as defined in usbcdc11.pdf, 6.3.5. - *---------------------------------------------------------------------------*/ -void CDC_NotificationIn (void) { - - NotificationBuf[0] = 0xA1; // bmRequestType - NotificationBuf[1] = CDC_NOTIFICATION_SERIAL_STATE; // bNotification (SERIAL_STATE) - NotificationBuf[2] = 0x00; // wValue - NotificationBuf[3] = 0x00; - NotificationBuf[4] = 0x00; // wIndex (Interface #, LSB first) - NotificationBuf[5] = 0x00; - NotificationBuf[6] = 0x02; // wLength (Data length = 2 bytes, LSB first) - NotificationBuf[7] = 0x00; - NotificationBuf[8] = (CDC_SerialState >> 0) & 0xFF; // UART State Bitmap (16bits, LSB first) - NotificationBuf[9] = (CDC_SerialState >> 8) & 0xFF; - - USB_WriteEP (CDC_CEP_IN, &NotificationBuf[0], 10); // send notification -} +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: cdcuser.c + * Purpose: USB Communication Device Class User module + * Version: V1.10 + *---------------------------------------------------------------------------- +* This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC microcontroller devices only. Nothing else + * gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#include "lpc_types.h" + +#include "usb.h" +#include "hw.h" +#include "cfg.h" +#include "core.h" +#include "cdc.h" +#include "cdcuser.h" +#include "serial.h" + + +unsigned char BulkBufIn [USB_CDC_BUFSIZE]; // Buffer to store USB IN packet +unsigned char BulkBufOut [USB_CDC_BUFSIZE]; // Buffer to store USB OUT packet +unsigned char NotificationBuf [10]; + +CDC_LINE_CODING CDC_LineCoding = {9600, 0, 0, 8}; +unsigned short CDC_SerialState = 0x0000; +unsigned short CDC_DepInEmpty = 1; // Data IN EP is empty + +/*---------------------------------------------------------------------------- + We need a buffer for incomming data on USB port because USB receives + much faster than UART transmits + *---------------------------------------------------------------------------*/ +/* Buffer masks */ +#define CDC_BUF_SIZE (64) // Output buffer in bytes (power 2) + // large enough for file transfer +#define CDC_BUF_MASK (CDC_BUF_SIZE-1ul) + +/* Buffer read / write macros */ +#define CDC_BUF_RESET(cdcBuf) (cdcBuf.rdIdx = cdcBuf.wrIdx = 0) +#define CDC_BUF_WR(cdcBuf, dataIn) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.wrIdx++] = (dataIn)) +#define CDC_BUF_RD(cdcBuf) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.rdIdx++]) +#define CDC_BUF_EMPTY(cdcBuf) (cdcBuf.rdIdx == cdcBuf.wrIdx) +#define CDC_BUF_FULL(cdcBuf) (cdcBuf.rdIdx == cdcBuf.wrIdx+1) +#define CDC_BUF_COUNT(cdcBuf) (CDC_BUF_MASK & (cdcBuf.wrIdx - cdcBuf.rdIdx)) + + +// CDC output buffer +typedef struct __CDC_BUF_T { + unsigned char data[CDC_BUF_SIZE]; + unsigned int wrIdx; + unsigned int rdIdx; +} CDC_BUF_T; + +CDC_BUF_T CDC_OutBuf; // buffer for all CDC Out data + +/*---------------------------------------------------------------------------- + read data from CDC_OutBuf + *---------------------------------------------------------------------------*/ +int CDC_RdOutBuf (char *buffer, const int *length) { + int bytesToRead, bytesRead; + + /* Read *length bytes, block if *bytes are not avaialable */ + bytesToRead = *length; + bytesToRead = (bytesToRead < (*length)) ? bytesToRead : (*length); + bytesRead = bytesToRead; + + + // ... add code to check for underrun + + while (bytesToRead--) { + *buffer++ = CDC_BUF_RD(CDC_OutBuf); + } + return (bytesRead); +} + +/*---------------------------------------------------------------------------- + write data to CDC_OutBuf + *---------------------------------------------------------------------------*/ +int CDC_WrOutBuf (const char *buffer, int *length) { + int bytesToWrite, bytesWritten; + + // Write *length bytes + bytesToWrite = *length; + bytesWritten = bytesToWrite; + + + // ... add code to check for overwrite + + while (bytesToWrite) { + CDC_BUF_WR(CDC_OutBuf, *buffer++); // Copy Data to buffer + bytesToWrite--; + } + + return (bytesWritten); +} + +/*---------------------------------------------------------------------------- + check if character(s) are available at CDC_OutBuf + *---------------------------------------------------------------------------*/ +int CDC_OutBufAvailChar (int *availChar) { + + *availChar = CDC_BUF_COUNT(CDC_OutBuf); + + return (0); +} +/* end Buffer handling */ + + +/*---------------------------------------------------------------------------- + CDC Initialisation + Initializes the data structures and serial port + Parameters: None + Return Value: None + *---------------------------------------------------------------------------*/ +void CDC_Init (char portNum ) { + + if ( portNum == 0 ) + { + ser_OpenPort (0); + ser_InitPort0 (CDC_LineCoding.dwDTERate, + CDC_LineCoding.bDataBits, + CDC_LineCoding.bParityType, + CDC_LineCoding.bCharFormat); + } + else + { + ser_OpenPort (1); + ser_InitPort1 (CDC_LineCoding.dwDTERate, + CDC_LineCoding.bDataBits, + CDC_LineCoding.bParityType, + CDC_LineCoding.bCharFormat); + } + CDC_DepInEmpty = 1; + CDC_SerialState = CDC_GetSerialState(); + + CDC_BUF_RESET(CDC_OutBuf); +} + + +/*---------------------------------------------------------------------------- + CDC SendEncapsulatedCommand Request Callback + Called automatically on CDC SEND_ENCAPSULATED_COMMAND Request + Parameters: None (global SetupPacket and EP0Buf) + Return Value: TRUE - Success, FALSE - Error + *---------------------------------------------------------------------------*/ +uint32_t CDC_SendEncapsulatedCommand (void) { + + return (TRUE); +} + + +/*---------------------------------------------------------------------------- + CDC GetEncapsulatedResponse Request Callback + Called automatically on CDC Get_ENCAPSULATED_RESPONSE Request + Parameters: None (global SetupPacket and EP0Buf) + Return Value: TRUE - Success, FALSE - Error + *---------------------------------------------------------------------------*/ +uint32_t CDC_GetEncapsulatedResponse (void) { + + /* ... add code to handle request */ + return (TRUE); +} + + +/*---------------------------------------------------------------------------- + CDC SetCommFeature Request Callback + Called automatically on CDC Set_COMM_FATURE Request + Parameters: FeatureSelector + Return Value: TRUE - Success, FALSE - Error + *---------------------------------------------------------------------------*/ +uint32_t CDC_SetCommFeature (unsigned short wFeatureSelector) { + + /* ... add code to handle request */ + return (TRUE); +} + + +/*---------------------------------------------------------------------------- + CDC GetCommFeature Request Callback + Called automatically on CDC Get_COMM_FATURE Request + Parameters: FeatureSelector + Return Value: TRUE - Success, FALSE - Error + *---------------------------------------------------------------------------*/ +uint32_t CDC_GetCommFeature (unsigned short wFeatureSelector) { + + /* ... add code to handle request */ + return (TRUE); +} + + +/*---------------------------------------------------------------------------- + CDC ClearCommFeature Request Callback + Called automatically on CDC CLEAR_COMM_FATURE Request + Parameters: FeatureSelector + Return Value: TRUE - Success, FALSE - Error + *---------------------------------------------------------------------------*/ +uint32_t CDC_ClearCommFeature (unsigned short wFeatureSelector) { + + /* ... add code to handle request */ + return (TRUE); +} + + +/*---------------------------------------------------------------------------- + CDC SetLineCoding Request Callback + Called automatically on CDC SET_LINE_CODING Request + Parameters: none (global SetupPacket and EP0Buf) + Return Value: TRUE - Success, FALSE - Error + *---------------------------------------------------------------------------*/ +uint32_t CDC_SetLineCoding (void) { + + CDC_LineCoding.dwDTERate = (EP0Buf[0] << 0) + | (EP0Buf[1] << 8) + | (EP0Buf[2] << 16) + | (EP0Buf[3] << 24); + CDC_LineCoding.bCharFormat = EP0Buf[4]; + CDC_LineCoding.bParityType = EP0Buf[5]; + CDC_LineCoding.bDataBits = EP0Buf[6]; + +#if PORT_NUM + ser_ClosePort(1); + ser_OpenPort (1); + ser_InitPort1 (CDC_LineCoding.dwDTERate, + CDC_LineCoding.bDataBits, + CDC_LineCoding.bParityType, + CDC_LineCoding.bCharFormat); +#else + ser_ClosePort(0); + ser_OpenPort (0); + ser_InitPort0 (CDC_LineCoding.dwDTERate, + CDC_LineCoding.bDataBits, + CDC_LineCoding.bParityType, + CDC_LineCoding.bCharFormat); +#endif + return (TRUE); +} + + +/*---------------------------------------------------------------------------- + CDC GetLineCoding Request Callback + Called automatically on CDC GET_LINE_CODING Request + Parameters: None (global SetupPacket and EP0Buf) + Return Value: TRUE - Success, FALSE - Error + *---------------------------------------------------------------------------*/ +uint32_t CDC_GetLineCoding (void) { + + EP0Buf[0] = (CDC_LineCoding.dwDTERate >> 0) & 0xFF; + EP0Buf[1] = (CDC_LineCoding.dwDTERate >> 8) & 0xFF; + EP0Buf[2] = (CDC_LineCoding.dwDTERate >> 16) & 0xFF; + EP0Buf[3] = (CDC_LineCoding.dwDTERate >> 24) & 0xFF; + EP0Buf[4] = CDC_LineCoding.bCharFormat; + EP0Buf[5] = CDC_LineCoding.bParityType; + EP0Buf[6] = CDC_LineCoding.bDataBits; + + return (TRUE); +} + + +/*---------------------------------------------------------------------------- + CDC SetControlLineState Request Callback + Called automatically on CDC SET_CONTROL_LINE_STATE Request + Parameters: ControlSignalBitmap + Return Value: TRUE - Success, FALSE - Error + *---------------------------------------------------------------------------*/ +uint32_t CDC_SetControlLineState (unsigned short wControlSignalBitmap) { + + /* ... add code to handle request */ + return (TRUE); +} + + +/*---------------------------------------------------------------------------- + CDC SendBreak Request Callback + Called automatically on CDC Set_COMM_FATURE Request + Parameters: 0xFFFF start of Break + 0x0000 stop of Break + 0x#### Duration of Break + Return Value: TRUE - Success, FALSE - Error + *---------------------------------------------------------------------------*/ +uint32_t CDC_SendBreak (unsigned short wDurationOfBreak) { + + /* ... add code to handle request */ + return (TRUE); +} + + +/*---------------------------------------------------------------------------- + CDC_BulkIn call on DataIn Request + Parameters: none + Return Value: none + *---------------------------------------------------------------------------*/ +void CDC_BulkIn(void) { + int numBytesRead, numBytesAvail; + + ser_AvailChar (&numBytesAvail); + + // ... add code to check for overwrite + + numBytesRead = ser_Read ((char *)&BulkBufIn[0], &numBytesAvail); + + // send over USB + if (numBytesRead > 0) { + USB_WriteEP (CDC_DEP_IN, &BulkBufIn[0], numBytesRead); + } + else { + CDC_DepInEmpty = 1; + } +} + + +/*---------------------------------------------------------------------------- + CDC_BulkOut call on DataOut Request + Parameters: none + Return Value: none + *---------------------------------------------------------------------------*/ +void CDC_BulkOut(void) { + int numBytesRead; + + // get data from USB into intermediate buffer + numBytesRead = USB_ReadEP(CDC_DEP_OUT, &BulkBufOut[0]); + + // ... add code to check for overwrite + + // store data in a buffer to transmit it over serial interface + CDC_WrOutBuf ((char *)&BulkBufOut[0], &numBytesRead); + +} + + +/*---------------------------------------------------------------------------- + Get the SERIAL_STATE as defined in usbcdc11.pdf, 6.3.5, Table 69. + Parameters: none + Return Value: SerialState as defined in usbcdc11.pdf + *---------------------------------------------------------------------------*/ +unsigned short CDC_GetSerialState (void) { + unsigned short temp; + + CDC_SerialState = 0; + ser_LineState (&temp); + + if (temp & 0x8000) CDC_SerialState |= CDC_SERIAL_STATE_RX_CARRIER; + if (temp & 0x2000) CDC_SerialState |= CDC_SERIAL_STATE_TX_CARRIER; + if (temp & 0x0010) CDC_SerialState |= CDC_SERIAL_STATE_BREAK; + if (temp & 0x4000) CDC_SerialState |= CDC_SERIAL_STATE_RING; + if (temp & 0x0008) CDC_SerialState |= CDC_SERIAL_STATE_FRAMING; + if (temp & 0x0004) CDC_SerialState |= CDC_SERIAL_STATE_PARITY; + if (temp & 0x0002) CDC_SerialState |= CDC_SERIAL_STATE_OVERRUN; + + return (CDC_SerialState); +} + + +/*---------------------------------------------------------------------------- + Send the SERIAL_STATE notification as defined in usbcdc11.pdf, 6.3.5. + *---------------------------------------------------------------------------*/ +void CDC_NotificationIn (void) { + + NotificationBuf[0] = 0xA1; // bmRequestType + NotificationBuf[1] = CDC_NOTIFICATION_SERIAL_STATE; // bNotification (SERIAL_STATE) + NotificationBuf[2] = 0x00; // wValue + NotificationBuf[3] = 0x00; + NotificationBuf[4] = 0x00; // wIndex (Interface #, LSB first) + NotificationBuf[5] = 0x00; + NotificationBuf[6] = 0x02; // wLength (Data length = 2 bytes, LSB first) + NotificationBuf[7] = 0x00; + NotificationBuf[8] = (CDC_SerialState >> 0) & 0xFF; // UART State Bitmap (16bits, LSB first) + NotificationBuf[9] = (CDC_SerialState >> 8) & 0xFF; + + USB_WriteEP (CDC_CEP_IN, &NotificationBuf[0], 10); // send notification +} diff --git a/new_cmsis/usb/cdcuser.h b/new_cmsis/usb/cdcuser.h index 388f07a..99c922a 100755 --- a/new_cmsis/usb/cdcuser.h +++ b/new_cmsis/usb/cdcuser.h @@ -1,63 +1,63 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: cdcuser.h - * Purpose: USB Communication Device Class User module Definitions - * Version: V1.10 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC microcontroller devices only. Nothing else - * gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -#ifndef __CDCUSER_H__ -#define __CDCUSER_H__ - -/* CDC buffer handling */ -extern int CDC_RdOutBuf (char *buffer, const int *length); -extern CDC_WrOutBuf (const char *buffer, int *length); -extern CDC_OutBufAvailChar (int *availChar); - - -/* CDC Data In/Out Endpoint Address */ -#define CDC_DEP_IN 0x82 -#define CDC_DEP_OUT 0x02 - -/* CDC Communication In Endpoint Address */ -#define CDC_CEP_IN 0x81 - -/* CDC Requests Callback Functions */ -extern uint32_t CDC_SendEncapsulatedCommand (void); -extern uint32_t CDC_GetEncapsulatedResponse (void); -extern uint32_t CDC_SetCommFeature (unsigned short wFeatureSelector); -extern uint32_t CDC_GetCommFeature (unsigned short wFeatureSelector); -extern uint32_t CDC_ClearCommFeature (unsigned short wFeatureSelector); -extern uint32_t CDC_GetLineCoding (void); -extern uint32_t CDC_SetLineCoding (void); -extern uint32_t CDC_SetControlLineState (unsigned short wControlSignalBitmap); -extern uint32_t CDC_SendBreak (unsigned short wDurationOfBreak); - -/* CDC Bulk Callback Functions */ -extern void CDC_BulkIn (void); -extern void CDC_BulkOut (void); - -/* CDC Notification Callback Function */ -extern void CDC_NotificationIn (void); - -/* CDC Initializtion Function */ -extern void CDC_Init (char portNum); - -/* CDC prepare the SERAIAL_STATE */ -extern unsigned short CDC_GetSerialState (void); - -/* flow control */ -extern unsigned short CDC_DepInEmpty; // DataEndPoint IN empty - -#endif /* __CDCUSER_H__ */ - +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: cdcuser.h + * Purpose: USB Communication Device Class User module Definitions + * Version: V1.10 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC microcontroller devices only. Nothing else + * gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#ifndef __CDCUSER_H__ +#define __CDCUSER_H__ + +/* CDC buffer handling */ +extern int CDC_RdOutBuf (char *buffer, const int *length); +extern CDC_WrOutBuf (const char *buffer, int *length); +extern CDC_OutBufAvailChar (int *availChar); + + +/* CDC Data In/Out Endpoint Address */ +#define CDC_DEP_IN 0x82 +#define CDC_DEP_OUT 0x02 + +/* CDC Communication In Endpoint Address */ +#define CDC_CEP_IN 0x81 + +/* CDC Requests Callback Functions */ +extern uint32_t CDC_SendEncapsulatedCommand (void); +extern uint32_t CDC_GetEncapsulatedResponse (void); +extern uint32_t CDC_SetCommFeature (unsigned short wFeatureSelector); +extern uint32_t CDC_GetCommFeature (unsigned short wFeatureSelector); +extern uint32_t CDC_ClearCommFeature (unsigned short wFeatureSelector); +extern uint32_t CDC_GetLineCoding (void); +extern uint32_t CDC_SetLineCoding (void); +extern uint32_t CDC_SetControlLineState (unsigned short wControlSignalBitmap); +extern uint32_t CDC_SendBreak (unsigned short wDurationOfBreak); + +/* CDC Bulk Callback Functions */ +extern void CDC_BulkIn (void); +extern void CDC_BulkOut (void); + +/* CDC Notification Callback Function */ +extern void CDC_NotificationIn (void); + +/* CDC Initializtion Function */ +extern void CDC_Init (char portNum); + +/* CDC prepare the SERAIAL_STATE */ +extern unsigned short CDC_GetSerialState (void); + +/* flow control */ +extern unsigned short CDC_DepInEmpty; // DataEndPoint IN empty + +#endif /* __CDCUSER_H__ */ + diff --git a/new_cmsis/usb/usbcfg.h b/new_cmsis/usb/cfg.h similarity index 96% rename from new_cmsis/usb/usbcfg.h rename to new_cmsis/usb/cfg.h index b8610da..69816e0 100755 --- a/new_cmsis/usb/usbcfg.h +++ b/new_cmsis/usb/cfg.h @@ -1,181 +1,181 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: usbcfg.h - * Purpose: USB Custom Configuration - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC family microcontroller devices only. Nothing - * else gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------- - * History: - * V1.20 Added vendor specific support - * V1.00 Initial Version - *---------------------------------------------------------------------------*/ - -#ifndef __USBCFG_H__ -#define __USBCFG_H__ - - -//*** <<< Use Configuration Wizard in Context Menu >>> *** - - -/* -// USB Configuration -// USB Power -// Default Power Setting -// <0=> Bus-powered -// <1=> Self-powered -// Max Number of Interfaces <1-256> -// Max Number of Endpoints <1-32> -// Max Endpoint 0 Packet Size -// <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes -// DMA Transfer -// Use DMA for selected Endpoints -// Endpoint 0 Out -// Endpoint 0 In -// Endpoint 1 Out -// Endpoint 1 In -// Endpoint 2 Out -// Endpoint 2 In -// Endpoint 3 Out -// Endpoint 3 In -// Endpoint 4 Out -// Endpoint 4 In -// Endpoint 5 Out -// Endpoint 5 In -// Endpoint 6 Out -// Endpoint 6 In -// Endpoint 7 Out -// Endpoint 7 In -// Endpoint 8 Out -// Endpoint 8 In -// Endpoint 9 Out -// Endpoint 9 In -// Endpoint 10 Out -// Endpoint 10 In -// Endpoint 11 Out -// Endpoint 11 In -// Endpoint 12 Out -// Endpoint 12 In -// Endpoint 13 Out -// Endpoint 13 In -// Endpoint 14 Out -// Endpoint 14 In -// Endpoint 15 Out -// Endpoint 15 In -// -// -*/ - -#define USB_POWER 0 -#define USB_IF_NUM 4 -#define USB_EP_NUM 32 -#define USB_MAX_PACKET0 8 -#define USB_DMA 0 -#define USB_DMA_EP 0x00000000 - - -/* -// USB Event Handlers -// Device Events -// Power Event -// Reset Event -// Suspend Event -// Resume Event -// Remote Wakeup Event -// Start of Frame Event -// Error Event -// -// Endpoint Events -// Endpoint 0 Event -// Endpoint 1 Event -// Endpoint 2 Event -// Endpoint 3 Event -// Endpoint 4 Event -// Endpoint 5 Event -// Endpoint 6 Event -// Endpoint 7 Event -// Endpoint 8 Event -// Endpoint 9 Event -// Endpoint 10 Event -// Endpoint 11 Event -// Endpoint 12 Event -// Endpoint 13 Event -// Endpoint 14 Event -// Endpoint 15 Event -// -// USB Core Events -// Set Configuration Event -// Set Interface Event -// Set/Clear Feature Event -// -// -*/ - -#define USB_POWER_EVENT 0 -#define USB_RESET_EVENT 1 -#define USB_SUSPEND_EVENT 0 -#define USB_RESUME_EVENT 0 -#define USB_WAKEUP_EVENT 0 -#define USB_SOF_EVENT 0 -#define USB_ERROR_EVENT 0 -#define USB_EP_EVENT 0x0007 -#define USB_CONFIGURE_EVENT 1 -#define USB_INTERFACE_EVENT 0 -#define USB_FEATURE_EVENT 0 - - -/* -// USB Class Support -// enables USB Class specific Requests -// Human Interface Device (HID) -// Interface Number <0-255> -// -// Mass Storage -// Interface Number <0-255> -// -// Audio Device -// Control Interface Number <0-255> -// Streaming Interface 1 Number <0-255> -// Streaming Interface 2 Number <0-255> -// -// Communication Device -// Control Interface Number <0-255> -// Bulk Interface Number <0-255> -// Max Communication Device Buffer Size -// <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes -// -// -*/ - -#define USB_CLASS 1 -#define USB_HID 0 -#define USB_HID_IF_NUM 0 -#define USB_MSC 0 -#define USB_MSC_IF_NUM 0 -#define USB_AUDIO 0 -#define USB_ADC_CIF_NUM 0 -#define USB_ADC_SIF1_NUM 1 -#define USB_ADC_SIF2_NUM 2 -#define USB_CDC 1 -#define USB_CDC_CIF_NUM 0 -#define USB_CDC_DIF_NUM 1 -#define USB_CDC_BUFSIZE 64 - -/* -// USB Vendor Support -// enables USB Vendor specific Requests -// -*/ -#define USB_VENDOR 0 - - -#endif /* __USBCFG_H__ */ +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: usbcfg.h + * Purpose: USB Custom Configuration + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC family microcontroller devices only. Nothing + * else gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------- + * History: + * V1.20 Added vendor specific support + * V1.00 Initial Version + *---------------------------------------------------------------------------*/ + +#ifndef __USBCFG_H__ +#define __USBCFG_H__ + + +//*** <<< Use Configuration Wizard in Context Menu >>> *** + + +/* +// USB Configuration +// USB Power +// Default Power Setting +// <0=> Bus-powered +// <1=> Self-powered +// Max Number of Interfaces <1-256> +// Max Number of Endpoints <1-32> +// Max Endpoint 0 Packet Size +// <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes +// DMA Transfer +// Use DMA for selected Endpoints +// Endpoint 0 Out +// Endpoint 0 In +// Endpoint 1 Out +// Endpoint 1 In +// Endpoint 2 Out +// Endpoint 2 In +// Endpoint 3 Out +// Endpoint 3 In +// Endpoint 4 Out +// Endpoint 4 In +// Endpoint 5 Out +// Endpoint 5 In +// Endpoint 6 Out +// Endpoint 6 In +// Endpoint 7 Out +// Endpoint 7 In +// Endpoint 8 Out +// Endpoint 8 In +// Endpoint 9 Out +// Endpoint 9 In +// Endpoint 10 Out +// Endpoint 10 In +// Endpoint 11 Out +// Endpoint 11 In +// Endpoint 12 Out +// Endpoint 12 In +// Endpoint 13 Out +// Endpoint 13 In +// Endpoint 14 Out +// Endpoint 14 In +// Endpoint 15 Out +// Endpoint 15 In +// +// +*/ + +#define USB_POWER 0 +#define USB_IF_NUM 4 +#define USB_EP_NUM 32 +#define USB_MAX_PACKET0 8 +#define USB_DMA 0 +#define USB_DMA_EP 0x00000000 + + +/* +// USB Event Handlers +// Device Events +// Power Event +// Reset Event +// Suspend Event +// Resume Event +// Remote Wakeup Event +// Start of Frame Event +// Error Event +// +// Endpoint Events +// Endpoint 0 Event +// Endpoint 1 Event +// Endpoint 2 Event +// Endpoint 3 Event +// Endpoint 4 Event +// Endpoint 5 Event +// Endpoint 6 Event +// Endpoint 7 Event +// Endpoint 8 Event +// Endpoint 9 Event +// Endpoint 10 Event +// Endpoint 11 Event +// Endpoint 12 Event +// Endpoint 13 Event +// Endpoint 14 Event +// Endpoint 15 Event +// +// USB Core Events +// Set Configuration Event +// Set Interface Event +// Set/Clear Feature Event +// +// +*/ + +#define USB_POWER_EVENT 0 +#define USB_RESET_EVENT 1 +#define USB_SUSPEND_EVENT 0 +#define USB_RESUME_EVENT 0 +#define USB_WAKEUP_EVENT 0 +#define USB_SOF_EVENT 0 +#define USB_ERROR_EVENT 0 +#define USB_EP_EVENT 0x0007 +#define USB_CONFIGURE_EVENT 1 +#define USB_INTERFACE_EVENT 0 +#define USB_FEATURE_EVENT 0 + + +/* +// USB Class Support +// enables USB Class specific Requests +// Human Interface Device (HID) +// Interface Number <0-255> +// +// Mass Storage +// Interface Number <0-255> +// +// Audio Device +// Control Interface Number <0-255> +// Streaming Interface 1 Number <0-255> +// Streaming Interface 2 Number <0-255> +// +// Communication Device +// Control Interface Number <0-255> +// Bulk Interface Number <0-255> +// Max Communication Device Buffer Size +// <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes +// +// +*/ + +#define USB_CLASS 1 +#define USB_HID 0 +#define USB_HID_IF_NUM 0 +#define USB_MSC 0 +#define USB_MSC_IF_NUM 0 +#define USB_AUDIO 0 +#define USB_ADC_CIF_NUM 0 +#define USB_ADC_SIF1_NUM 1 +#define USB_ADC_SIF2_NUM 2 +#define USB_CDC 1 +#define USB_CDC_CIF_NUM 0 +#define USB_CDC_DIF_NUM 1 +#define USB_CDC_BUFSIZE 64 + +/* +// USB Vendor Support +// enables USB Vendor specific Requests +// +*/ +#define USB_VENDOR 0 + + +#endif /* __USBCFG_H__ */ diff --git a/new_cmsis/usb/usbcore.c b/new_cmsis/usb/core.c similarity index 96% rename from new_cmsis/usb/usbcore.c rename to new_cmsis/usb/core.c index f80c7ee..8e33323 100755 --- a/new_cmsis/usb/usbcore.c +++ b/new_cmsis/usb/core.c @@ -1,1112 +1,1112 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: usbcore.c - * Purpose: USB Core Module - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC family microcontroller devices only. Nothing - * else gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------- - * History: - * V1.20 Added vendor specific requests - * Changed string descriptor handling - * Reworked Endpoint0 - * V1.00 Initial Version - *----------------------------------------------------------------------------*/ -#include "lpc_types.h" - -#include "usb.h" -#include "usbcfg.h" -#include "usbhw.h" -#include "usbcore.h" -#include "usbdesc.h" -#include "usbuser.h" - -#if (USB_CLASS) - -#if (USB_AUDIO) -#include "audio.h" -#include "adcuser.h" -#endif - -#if (USB_HID) -#include "hid.h" -#include "hiduser.h" -#endif - -#if (USB_MSC) -#include "msc.h" -#include "mscuser.h" -extern MSC_CSW CSW; -#endif - -#if (USB_CDC) -#include "cdc.h" -#include "cdcuser.h" -#endif - -#endif - -#if (USB_VENDOR) -#include "vendor.h" -#endif - -#if defined ( __CC_ARM ) -#pragma diag_suppress 111,1441 -#endif - -#if defined ( __GNUC__ ) -#define __packed __attribute__((__packed__)) -#endif - -uint16_t USB_DeviceStatus; -uint8_t USB_DeviceAddress; -uint8_t USB_Configuration; -uint32_t USB_EndPointMask; -uint32_t USB_EndPointHalt; -uint32_t USB_EndPointStall; /* EP must stay stalled */ -uint8_t USB_NumInterfaces; -uint8_t USB_AltSetting[USB_IF_NUM]; - -uint8_t EP0Buf[USB_MAX_PACKET0]; - - -USB_EP_DATA EP0Data; - -USB_SETUP_PACKET SetupPacket; - - -/* - * Reset USB Core - * Parameters: None - * Return Value: None - */ - -void USB_ResetCore (void) { - - USB_DeviceStatus = USB_POWER; - USB_DeviceAddress = 0; - USB_Configuration = 0; - USB_EndPointMask = 0x00010001; - USB_EndPointHalt = 0x00000000; - USB_EndPointStall = 0x00000000; -} - - -/* - * USB Request - Setup Stage - * Parameters: None (global SetupPacket) - * Return Value: None - */ - -void USB_SetupStage (void) { - USB_ReadEP(0x00, (uint8_t *)&SetupPacket); -} - - -/* - * USB Request - Data In Stage - * Parameters: None (global EP0Data) - * Return Value: None - */ - -void USB_DataInStage (void) { - uint32_t cnt; - - if (EP0Data.Count > USB_MAX_PACKET0) { - cnt = USB_MAX_PACKET0; - } else { - cnt = EP0Data.Count; - } - cnt = USB_WriteEP(0x80, EP0Data.pData, cnt); - EP0Data.pData += cnt; - EP0Data.Count -= cnt; -} - - -/* - * USB Request - Data Out Stage - * Parameters: None (global EP0Data) - * Return Value: None - */ - -void USB_DataOutStage (void) { - uint32_t cnt; - - cnt = USB_ReadEP(0x00, EP0Data.pData); - EP0Data.pData += cnt; - EP0Data.Count -= cnt; -} - - -/* - * USB Request - Status In Stage - * Parameters: None - * Return Value: None - */ - -void USB_StatusInStage (void) { - USB_WriteEP(0x80, NULL, 0); -} - - -/* - * USB Request - Status Out Stage - * Parameters: None - * Return Value: None - */ - -void USB_StatusOutStage (void) { - USB_ReadEP(0x00, EP0Buf); -} - - -/* - * Get Status USB Request - * Parameters: None (global SetupPacket) - * Return Value: TRUE - Success, FALSE - Error - */ - -#if defined ( __IAR_SYSTEMS_ICC__ ) -inline uint32_t USB_ReqGetStatus (void) { -#else -__inline uint32_t USB_ReqGetStatus (void) { -#endif - uint32_t n, m; - - switch (SetupPacket.bmRequestType.BM.Recipient) { - case REQUEST_TO_DEVICE: - EP0Data.pData = (uint8_t *)&USB_DeviceStatus; - break; - case REQUEST_TO_INTERFACE: - if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) { - *((__packed uint16_t *)EP0Buf) = 0; - *((uint16_t *)EP0Buf) = 0; - EP0Data.pData = EP0Buf; - } else { - return (FALSE); - } - break; - case REQUEST_TO_ENDPOINT: - n = SetupPacket.wIndex.WB.L & 0x8F; - m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n); - if (((USB_Configuration != 0) || ((n & 0x0F) == 0)) && (USB_EndPointMask & m)) { - *((__packed uint16_t *)EP0Buf) = (USB_EndPointHalt & m) ? 1 : 0; - *((uint16_t *)EP0Buf) = (USB_EndPointHalt & m) ? 1 : 0; - EP0Data.pData = EP0Buf; - } else { - return (FALSE); - } - break; - default: - return (FALSE); - } - return (TRUE); -} - - -/* - * Set/Clear Feature USB Request - * Parameters: sc: 0 - Clear, 1 - Set - * (global SetupPacket) - * Return Value: TRUE - Success, FALSE - Error - */ - -#if defined ( __IAR_SYSTEMS_ICC__ ) -inline uint32_t USB_ReqSetClrFeature (uint32_t sc) { -#else -__inline uint32_t USB_ReqSetClrFeature (uint32_t sc) { -#endif - uint32_t n, m; - - switch (SetupPacket.bmRequestType.BM.Recipient) { - case REQUEST_TO_DEVICE: - if (SetupPacket.wValue.W == USB_FEATURE_REMOTE_WAKEUP) { - if (sc) { - USB_WakeUpCfg(TRUE); - USB_DeviceStatus |= USB_GETSTATUS_REMOTE_WAKEUP; - } else { - USB_WakeUpCfg(FALSE); - USB_DeviceStatus &= ~USB_GETSTATUS_REMOTE_WAKEUP; - } - } else { - return (FALSE); - } - break; - case REQUEST_TO_INTERFACE: - return (FALSE); - case REQUEST_TO_ENDPOINT: - n = SetupPacket.wIndex.WB.L & 0x8F; - m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n); - if ((USB_Configuration != 0) && ((n & 0x0F) != 0) && (USB_EndPointMask & m)) { - if (SetupPacket.wValue.W == USB_FEATURE_ENDPOINT_STALL) { - if (sc) { - USB_SetStallEP(n); - USB_EndPointHalt |= m; - } else { - if ((USB_EndPointStall & m) != 0) { - return (TRUE); - } - USB_ClrStallEP(n); -#if (USB_MSC) - if ((n == MSC_EP_IN) && ((USB_EndPointHalt & m) != 0)) { - /* Compliance Test: rewrite CSW after unstall */ - if (CSW.dSignature == MSC_CSW_Signature) { - USB_WriteEP(MSC_EP_IN, (uint8_t *)&CSW, sizeof(CSW)); - } - } -#endif - USB_EndPointHalt &= ~m; - } - } else { - return (FALSE); - } - } else { - return (FALSE); - } - break; - default: - return (FALSE); - } - return (TRUE); -} - - -/* - * Set Address USB Request - * Parameters: None (global SetupPacket) - * Return Value: TRUE - Success, FALSE - Error - */ - -#if defined ( __IAR_SYSTEMS_ICC__ ) -inline uint32_t USB_ReqSetAddress (void) { -#else -__inline uint32_t USB_ReqSetAddress (void) { -#endif - switch (SetupPacket.bmRequestType.BM.Recipient) { - case REQUEST_TO_DEVICE: - USB_DeviceAddress = 0x80 | SetupPacket.wValue.WB.L; - break; - default: - return (FALSE); - } - return (TRUE); -} - - -/* - * Get Descriptor USB Request - * Parameters: None (global SetupPacket) - * Return Value: TRUE - Success, FALSE - Error - */ - -#if defined ( __IAR_SYSTEMS_ICC__ ) -inline uint32_t USB_ReqGetDescriptor (void) { -#else -__inline uint32_t USB_ReqGetDescriptor (void) { -#endif - uint8_t *pD; - uint32_t len, n; - - switch (SetupPacket.bmRequestType.BM.Recipient) { - case REQUEST_TO_DEVICE: - switch (SetupPacket.wValue.WB.H) { - case USB_DEVICE_DESCRIPTOR_TYPE: - EP0Data.pData = (uint8_t *)USB_DeviceDescriptor; - len = USB_DEVICE_DESC_SIZE; - break; - case USB_CONFIGURATION_DESCRIPTOR_TYPE: - pD = (uint8_t *)USB_ConfigDescriptor; - for (n = 0; n != SetupPacket.wValue.WB.L; n++) { - if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength != 0) { - pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength; - } - } - if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength == 0) { - return (FALSE); - } - EP0Data.pData = pD; - len = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength; - break; - case USB_STRING_DESCRIPTOR_TYPE: - pD = (uint8_t *)USB_StringDescriptor; - for (n = 0; n != SetupPacket.wValue.WB.L; n++) { - if (((USB_STRING_DESCRIPTOR *)pD)->bLength != 0) { - pD += ((USB_STRING_DESCRIPTOR *)pD)->bLength; - } - } - if (((USB_STRING_DESCRIPTOR *)pD)->bLength == 0) { - return (FALSE); - } - EP0Data.pData = pD; - len = ((USB_STRING_DESCRIPTOR *)EP0Data.pData)->bLength; - break; - default: - return (FALSE); - } - break; - case REQUEST_TO_INTERFACE: - switch (SetupPacket.wValue.WB.H) { -#if USB_HID - case HID_HID_DESCRIPTOR_TYPE: - if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) { - return (FALSE); /* Only Single HID Interface is supported */ - } - EP0Data.pData = (uint8_t *)USB_ConfigDescriptor + HID_DESC_OFFSET; - len = HID_DESC_SIZE; - break; - case HID_REPORT_DESCRIPTOR_TYPE: - if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) { - return (FALSE); /* Only Single HID Interface is supported */ - } - EP0Data.pData = (uint8_t *)HID_ReportDescriptor; - len = HID_ReportDescSize; - break; - case HID_PHYSICAL_DESCRIPTOR_TYPE: - return (FALSE); /* HID Physical Descriptor is not supported */ -#endif - default: - return (FALSE); - } -// break; - default: - return (FALSE); - } - - if (EP0Data.Count > len) { - EP0Data.Count = len; - } - - return (TRUE); -} - - -/* - * Get Configuration USB Request - * Parameters: None (global SetupPacket) - * Return Value: TRUE - Success, FALSE - Error - */ - -#if defined ( __IAR_SYSTEMS_ICC__ ) -inline uint32_t USB_ReqGetConfiguration (void) { -#else -__inline uint32_t USB_ReqGetConfiguration (void) { -#endif - switch (SetupPacket.bmRequestType.BM.Recipient) { - case REQUEST_TO_DEVICE: - EP0Data.pData = &USB_Configuration; - break; - default: - return (FALSE); - } - return (TRUE); -} - - -/* - * Set Configuration USB Request - * Parameters: None (global SetupPacket) - * Return Value: TRUE - Success, FALSE - Error - */ - -#if defined ( __IAR_SYSTEMS_ICC__ ) -inline uint32_t USB_ReqSetConfiguration (void) { -#else -__inline uint32_t USB_ReqSetConfiguration (void) { -#endif - USB_COMMON_DESCRIPTOR *pD; - uint32_t alt = 0; - uint32_t n, m; - uint32_t tmp; - - switch (SetupPacket.bmRequestType.BM.Recipient) { - case REQUEST_TO_DEVICE: - - if (SetupPacket.wValue.WB.L) { - pD = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor; - while (pD->bLength) { - switch (pD->bDescriptorType) { - case USB_CONFIGURATION_DESCRIPTOR_TYPE: - if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue == SetupPacket.wValue.WB.L) { - USB_Configuration = SetupPacket.wValue.WB.L; - USB_NumInterfaces = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->bNumInterfaces; - for (n = 0; n < USB_IF_NUM; n++) { - USB_AltSetting[n] = 0; - } - for (n = 1; n < 16; n++) { - if (USB_EndPointMask & (1 << n)) { - USB_DisableEP(n); - } - if (USB_EndPointMask & ((1 << 16) << n)) { - USB_DisableEP(n | 0x80); - } - } - USB_EndPointMask = 0x00010001; - USB_EndPointHalt = 0x00000000; - USB_EndPointStall= 0x00000000; - USB_Configure(TRUE); - if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bmAttributes & USB_CONFIG_POWERED_MASK) { - USB_DeviceStatus |= USB_GETSTATUS_SELF_POWERED; - } else { - USB_DeviceStatus &= ~USB_GETSTATUS_SELF_POWERED; - } - } else { -// (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength; - tmp = (uint32_t)pD; - tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength; - pD = (USB_COMMON_DESCRIPTOR *)tmp; - continue; - } - break; - case USB_INTERFACE_DESCRIPTOR_TYPE: - alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting; - break; - case USB_ENDPOINT_DESCRIPTOR_TYPE: - if (alt == 0) { - n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F; - m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n); - USB_EndPointMask |= m; - USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD); - USB_EnableEP(n); - USB_ResetEP(n); - } - break; - } -// (uint8_t *)pD += pD->bLength; - tmp = (uint32_t)pD; - tmp += pD->bLength; - pD = (USB_COMMON_DESCRIPTOR *)tmp; - } - } - else { - USB_Configuration = 0; - for (n = 1; n < 16; n++) { - if (USB_EndPointMask & (1 << n)) { - USB_DisableEP(n); - } - if (USB_EndPointMask & ((1 << 16) << n)) { - USB_DisableEP(n | 0x80); - } - } - USB_EndPointMask = 0x00010001; - USB_EndPointHalt = 0x00000000; - USB_EndPointStall = 0x00000000; - USB_Configure(FALSE); - } - - if (USB_Configuration != SetupPacket.wValue.WB.L) { - return (FALSE); - } - break; - default: - return (FALSE); - } - return (TRUE); -} - - -/* - * Get Interface USB Request - * Parameters: None (global SetupPacket) - * Return Value: TRUE - Success, FALSE - Error - */ - -#if defined ( __IAR_SYSTEMS_ICC__ ) -inline uint32_t USB_ReqGetInterface (void) { -#else -__inline uint32_t USB_ReqGetInterface (void) { -#endif - switch (SetupPacket.bmRequestType.BM.Recipient) { - case REQUEST_TO_INTERFACE: - if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) { - EP0Data.pData = USB_AltSetting + SetupPacket.wIndex.WB.L; - } else { - return (FALSE); - } - break; - default: - return (FALSE); - } - return (TRUE); -} - - -/* - * Set Interface USB Request - * Parameters: None (global SetupPacket) - * Return Value: TRUE - Success, FALSE - Error - */ -#if defined ( __IAR_SYSTEMS_ICC__ ) -inline uint32_t USB_ReqSetInterface (void) { -#else -__inline uint32_t USB_ReqSetInterface (void) { -#endif - USB_COMMON_DESCRIPTOR *pD; - uint32_t ifn = 0, alt = 0, old = 0, msk = 0; - uint32_t n, m; - uint32_t set; - uint32_t tmp; - - switch (SetupPacket.bmRequestType.BM.Recipient) { - case REQUEST_TO_INTERFACE: - if (USB_Configuration == 0) return (FALSE); - set = FALSE; - pD = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor; - while (pD->bLength) { - switch (pD->bDescriptorType) { - case USB_CONFIGURATION_DESCRIPTOR_TYPE: - if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue != USB_Configuration) { -// (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength; - tmp = (uint32_t)pD; - tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength; - pD = (USB_COMMON_DESCRIPTOR *)tmp; - - continue; - } - break; - case USB_INTERFACE_DESCRIPTOR_TYPE: - ifn = ((USB_INTERFACE_DESCRIPTOR *)pD)->bInterfaceNumber; - alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting; - msk = 0; - if ((ifn == SetupPacket.wIndex.WB.L) && (alt == SetupPacket.wValue.WB.L)) { - set = TRUE; - old = USB_AltSetting[ifn]; - USB_AltSetting[ifn] = (uint8_t)alt; - } - break; - case USB_ENDPOINT_DESCRIPTOR_TYPE: - if (ifn == SetupPacket.wIndex.WB.L) { - n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F; - m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n); - if (alt == SetupPacket.wValue.WB.L) { - USB_EndPointMask |= m; - USB_EndPointHalt &= ~m; - USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD); - USB_EnableEP(n); - USB_ResetEP(n); - msk |= m; - } - else if ((alt == old) && ((msk & m) == 0)) { - USB_EndPointMask &= ~m; - USB_EndPointHalt &= ~m; - USB_DisableEP(n); - } - } - break; - } -// (uint8_t *)pD += pD->bLength; - tmp = (uint32_t)pD; - tmp += pD->bLength; - pD = (USB_COMMON_DESCRIPTOR *)tmp; - } - break; - default: - return (FALSE); - } - - return (set); -} - - -/* - * USB Endpoint 0 Event Callback - * Parameters: event - * Return Value: none - */ - -void USB_EndPoint0 (uint32_t event) { - - switch (event) { - case USB_EVT_SETUP: - USB_SetupStage(); - USB_DirCtrlEP(SetupPacket.bmRequestType.BM.Dir); - EP0Data.Count = SetupPacket.wLength; /* Number of bytes to transfer */ - switch (SetupPacket.bmRequestType.BM.Type) { - - case REQUEST_STANDARD: - switch (SetupPacket.bRequest) { - case USB_REQUEST_GET_STATUS: - if (!USB_ReqGetStatus()) { - goto stall_i; - } - USB_DataInStage(); - break; - - case USB_REQUEST_CLEAR_FEATURE: - if (!USB_ReqSetClrFeature(0)) { - goto stall_i; - } - USB_StatusInStage(); -#if USB_FEATURE_EVENT - USB_Feature_Event(); -#endif - break; - - case USB_REQUEST_SET_FEATURE: - if (!USB_ReqSetClrFeature(1)) { - goto stall_i; - } - USB_StatusInStage(); -#if USB_FEATURE_EVENT - USB_Feature_Event(); -#endif - break; - - case USB_REQUEST_SET_ADDRESS: - if (!USB_ReqSetAddress()) { - goto stall_i; - } - USB_StatusInStage(); - break; - - case USB_REQUEST_GET_DESCRIPTOR: - if (!USB_ReqGetDescriptor()) { - goto stall_i; - } - USB_DataInStage(); - break; - - case USB_REQUEST_SET_DESCRIPTOR: -/*stall_o:*/ USB_SetStallEP(0x00); /* not supported */ - EP0Data.Count = 0; - break; - - case USB_REQUEST_GET_CONFIGURATION: - if (!USB_ReqGetConfiguration()) { - goto stall_i; - } - USB_DataInStage(); - break; - - case USB_REQUEST_SET_CONFIGURATION: - if (!USB_ReqSetConfiguration()) { - goto stall_i; - } - USB_StatusInStage(); -#if USB_CONFIGURE_EVENT - USB_Configure_Event(); -#endif - break; - - case USB_REQUEST_GET_INTERFACE: - if (!USB_ReqGetInterface()) { - goto stall_i; - } - USB_DataInStage(); - break; - - case USB_REQUEST_SET_INTERFACE: - if (!USB_ReqSetInterface()) { - goto stall_i; - } - USB_StatusInStage(); -#if USB_INTERFACE_EVENT - USB_Interface_Event(); -#endif - break; - - default: - goto stall_i; - } - break; /* end case REQUEST_STANDARD */ - -#if USB_CLASS - case REQUEST_CLASS: - switch (SetupPacket.bmRequestType.BM.Recipient) { - - case REQUEST_TO_DEVICE: - goto stall_i; /* not supported */ - - case REQUEST_TO_INTERFACE: -#if USB_HID - if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) { /* IF number correct? */ - switch (SetupPacket.bRequest) { - case HID_REQUEST_GET_REPORT: - if (HID_GetReport()) { - EP0Data.pData = EP0Buf; /* point to data to be sent */ - USB_DataInStage(); /* send requested data */ - goto setup_class_ok; - } - break; - case HID_REQUEST_SET_REPORT: - EP0Data.pData = EP0Buf; /* data to be received */ - goto setup_class_ok; - case HID_REQUEST_GET_IDLE: - if (HID_GetIdle()) { - EP0Data.pData = EP0Buf; /* point to data to be sent */ - USB_DataInStage(); /* send requested data */ - goto setup_class_ok; - } - break; - case HID_REQUEST_SET_IDLE: - if (HID_SetIdle()) { - USB_StatusInStage(); /* send Acknowledge */ - goto setup_class_ok; - } - break; - case HID_REQUEST_GET_PROTOCOL: - if (HID_GetProtocol()) { - EP0Data.pData = EP0Buf; /* point to data to be sent */ - USB_DataInStage(); /* send requested data */ - goto setup_class_ok; - } - break; - case HID_REQUEST_SET_PROTOCOL: - if (HID_SetProtocol()) { - USB_StatusInStage(); /* send Acknowledge */ - goto setup_class_ok; - } - break; - } - } -#endif /* USB_HID */ -#if USB_MSC - if (SetupPacket.wIndex.WB.L == USB_MSC_IF_NUM) { /* IF number correct? */ - switch (SetupPacket.bRequest) { - case MSC_REQUEST_RESET: - if ((SetupPacket.wValue.W == 0) && /* RESET with invalid parameters -> STALL */ - (SetupPacket.wLength == 0)) { - if (MSC_Reset()) { - USB_StatusInStage(); - goto setup_class_ok; - } - } - break; - case MSC_REQUEST_GET_MAX_LUN: - if ((SetupPacket.wValue.W == 0) && /* GET_MAX_LUN with invalid parameters -> STALL */ - (SetupPacket.wLength == 1)) { - if (MSC_GetMaxLUN()) { - EP0Data.pData = EP0Buf; - USB_DataInStage(); - goto setup_class_ok; - } - } - break; - } - } -#endif /* USB_MSC */ -#if USB_AUDIO - if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM) || /* IF number correct? */ - (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) || - (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) { - switch (SetupPacket.bRequest) { - case AUDIO_REQUEST_GET_CUR: - case AUDIO_REQUEST_GET_MIN: - case AUDIO_REQUEST_GET_MAX: - case AUDIO_REQUEST_GET_RES: - if (ADC_IF_GetRequest()) { - EP0Data.pData = EP0Buf; /* point to data to be sent */ - USB_DataInStage(); /* send requested data */ - goto setup_class_ok; - } - break; - case AUDIO_REQUEST_SET_CUR: -// case AUDIO_REQUEST_SET_MIN: -// case AUDIO_REQUEST_SET_MAX: -// case AUDIO_REQUEST_SET_RES: - EP0Data.pData = EP0Buf; /* data to be received */ - goto setup_class_ok; - } - } -#endif /* USB_AUDIO */ -#if USB_CDC - if ((SetupPacket.wIndex.WB.L == USB_CDC_CIF_NUM) || /* IF number correct? */ - (SetupPacket.wIndex.WB.L == USB_CDC_DIF_NUM)) { - switch (SetupPacket.bRequest) { - case CDC_SEND_ENCAPSULATED_COMMAND: - EP0Data.pData = EP0Buf; /* data to be received, see USB_EVT_OUT */ - goto setup_class_ok; - case CDC_GET_ENCAPSULATED_RESPONSE: - if (CDC_GetEncapsulatedResponse()) { - EP0Data.pData = EP0Buf; /* point to data to be sent */ - USB_DataInStage(); /* send requested data */ - goto setup_class_ok; - } - break; - case CDC_SET_COMM_FEATURE: - EP0Data.pData = EP0Buf; /* data to be received, see USB_EVT_OUT */ - goto setup_class_ok; - case CDC_GET_COMM_FEATURE: - if (CDC_GetCommFeature(SetupPacket.wValue.W)) { - EP0Data.pData = EP0Buf; /* point to data to be sent */ - USB_DataInStage(); /* send requested data */ - goto setup_class_ok; - } - break; - case CDC_CLEAR_COMM_FEATURE: - if (CDC_ClearCommFeature(SetupPacket.wValue.W)) { - USB_StatusInStage(); /* send Acknowledge */ - goto setup_class_ok; - } - break; - case CDC_SET_LINE_CODING: - EP0Data.pData = EP0Buf; /* data to be received, see USB_EVT_OUT */ - goto setup_class_ok; - case CDC_GET_LINE_CODING: - if (CDC_GetLineCoding()) { - EP0Data.pData = EP0Buf; /* point to data to be sent */ - USB_DataInStage(); /* send requested data */ - goto setup_class_ok; - } - break; - case CDC_SET_CONTROL_LINE_STATE: - if (CDC_SetControlLineState(SetupPacket.wValue.W)) { - USB_StatusInStage(); /* send Acknowledge */ - goto setup_class_ok; - } - break; - case CDC_SEND_BREAK: - if (CDC_SendBreak(SetupPacket.wValue.W)) { - USB_StatusInStage(); /* send Acknowledge */ - goto setup_class_ok; - } - break; - } - } -#endif /* USB_CDC */ - goto stall_i; /* not supported */ - /* end case REQUEST_TO_INTERFACE */ - - case REQUEST_TO_ENDPOINT: -#if USB_AUDIO - switch (SetupPacket.bRequest) { - case AUDIO_REQUEST_GET_CUR: - case AUDIO_REQUEST_GET_MIN: - case AUDIO_REQUEST_GET_MAX: - case AUDIO_REQUEST_GET_RES: - if (ADC_EP_GetRequest()) { - EP0Data.pData = EP0Buf; /* point to data to be sent */ - USB_DataInStage(); /* send requested data */ - goto setup_class_ok; - } - break; - case AUDIO_REQUEST_SET_CUR: -// case AUDIO_REQUEST_SET_MIN: -// case AUDIO_REQUEST_SET_MAX: -// case AUDIO_REQUEST_SET_RES: - EP0Data.pData = EP0Buf; /* data to be received */ - goto setup_class_ok; - } -#endif /* USB_AUDIO */ - goto stall_i; - /* end case REQUEST_TO_ENDPOINT */ - - default: - goto stall_i; - } -setup_class_ok: /* request finished successfully */ - break; /* end case REQUEST_CLASS */ -#endif /* USB_CLASS */ - -#if USB_VENDOR - case REQUEST_VENDOR: - switch (SetupPacket.bmRequestType.BM.Recipient) { - - case REQUEST_TO_DEVICE: - if (!USB_ReqVendorDev(TRUE)) { - goto stall_i; /* not supported */ - } - break; - - case REQUEST_TO_INTERFACE: - if (!USB_ReqVendorIF(TRUE)) { - goto stall_i; /* not supported */ - } - break; - - case REQUEST_TO_ENDPOINT: - if (!USB_ReqVendorEP(TRUE)) { - goto stall_i; /* not supported */ - } - break; - - default: - goto stall_i; - } - - if (SetupPacket.wLength) { - if (SetupPacket.bmRequestType.BM.Dir == REQUEST_DEVICE_TO_HOST) { - USB_DataInStage(); - } - } else { - USB_StatusInStage(); - } - - break; /* end case REQUEST_VENDOR */ -#endif /* USB_VENDOR */ - - default: -stall_i: USB_SetStallEP(0x80); - EP0Data.Count = 0; - break; - } - break; /* end case USB_EVT_SETUP */ - - case USB_EVT_OUT: - if (SetupPacket.bmRequestType.BM.Dir == REQUEST_HOST_TO_DEVICE) { - if (EP0Data.Count) { /* still data to receive ? */ - USB_DataOutStage(); /* receive data */ - if (EP0Data.Count == 0) { /* data complete ? */ - switch (SetupPacket.bmRequestType.BM.Type) { - - case REQUEST_STANDARD: - goto stall_i; /* not supported */ - -#if (USB_CLASS) - case REQUEST_CLASS: - switch (SetupPacket.bmRequestType.BM.Recipient) { - case REQUEST_TO_DEVICE: - goto stall_i; /* not supported */ - - case REQUEST_TO_INTERFACE: -#if USB_HID - if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) { /* IF number correct? */ - switch (SetupPacket.bRequest) { - case HID_REQUEST_SET_REPORT: - if (HID_SetReport()) { - USB_StatusInStage(); /* send Acknowledge */ - goto out_class_ok; - } - break; - } - } -#endif /* USB_HID */ -#if USB_AUDIO - if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM) || /* IF number correct? */ - (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) || - (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) { - switch (SetupPacket.bRequest) { - case AUDIO_REQUEST_SET_CUR: -// case AUDIO_REQUEST_SET_MIN: -// case AUDIO_REQUEST_SET_MAX: -// case AUDIO_REQUEST_SET_RES: - if (ADC_IF_SetRequest()) { - USB_StatusInStage(); /* send Acknowledge */ - goto out_class_ok; - } - break; - } - } -#endif /* USB_AUDIO */ -#if USB_CDC - if ((SetupPacket.wIndex.WB.L == USB_CDC_CIF_NUM) || /* IF number correct? */ - (SetupPacket.wIndex.WB.L == USB_CDC_DIF_NUM)) { - switch (SetupPacket.bRequest) { - case CDC_SEND_ENCAPSULATED_COMMAND: - if (CDC_SendEncapsulatedCommand()) { - USB_StatusInStage(); /* send Acknowledge */ - goto out_class_ok; - } - break; - case CDC_SET_COMM_FEATURE: - if (CDC_SetCommFeature(SetupPacket.wValue.W)) { - USB_StatusInStage(); /* send Acknowledge */ - goto out_class_ok; - } - break; - case CDC_SET_LINE_CODING: - if (CDC_SetLineCoding()) { - USB_StatusInStage(); /* send Acknowledge */ - goto out_class_ok; - } - break; - } - } -#endif /* USB_CDC */ - goto stall_i; - /* end case REQUEST_TO_INTERFACE */ - - case REQUEST_TO_ENDPOINT: -#if USB_AUDIO - switch (SetupPacket.bRequest) { - case AUDIO_REQUEST_SET_CUR: -// case AUDIO_REQUEST_SET_MIN: -// case AUDIO_REQUEST_SET_MAX: -// case AUDIO_REQUEST_SET_RES: - if (ADC_EP_SetRequest()) { - USB_StatusInStage(); /* send Acknowledge */ - goto out_class_ok; - } - break; - } -#endif /* USB_AUDIO */ - goto stall_i; - /* end case REQUEST_TO_ENDPOINT */ - - default: - goto stall_i; - } -out_class_ok: /* request finished successfully */ - break; /* end case REQUEST_CLASS */ -#endif /* USB_CLASS */ - -#if USB_VENDOR - case REQUEST_VENDOR: - switch (SetupPacket.bmRequestType.BM.Recipient) { - - case REQUEST_TO_DEVICE: - if (!USB_ReqVendorDev(FALSE)) { - goto stall_i; /* not supported */ - } - break; - - case REQUEST_TO_INTERFACE: - if (!USB_ReqVendorIF(FALSE)) { - goto stall_i; /* not supported */ - } - break; - - case REQUEST_TO_ENDPOINT: - if (!USB_ReqVendorEP(FALSE)) { - goto stall_i; /* not supported */ - } - break; - - default: - goto stall_i; - } - - USB_StatusInStage(); - - break; /* end case REQUEST_VENDOR */ -#endif /* USB_VENDOR */ - - default: - goto stall_i; - } - } - } - } else { - USB_StatusOutStage(); /* receive Acknowledge */ - } - break; /* end case USB_EVT_OUT */ - - case USB_EVT_IN : - if (SetupPacket.bmRequestType.BM.Dir == REQUEST_DEVICE_TO_HOST) { - USB_DataInStage(); /* send data */ - } else { - if (USB_DeviceAddress & 0x80) { - USB_DeviceAddress &= 0x7F; - USB_SetAddress(USB_DeviceAddress); - } - } - break; /* end case USB_EVT_IN */ - - case USB_EVT_OUT_STALL: - USB_ClrStallEP(0x00); - break; - - case USB_EVT_IN_STALL: - USB_ClrStallEP(0x80); - break; - - } -} +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: usbcore.c + * Purpose: USB Core Module + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC family microcontroller devices only. Nothing + * else gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------- + * History: + * V1.20 Added vendor specific requests + * Changed string descriptor handling + * Reworked Endpoint0 + * V1.00 Initial Version + *----------------------------------------------------------------------------*/ +#include "lpc_types.h" + +#include "usb.h" +#include "cfg.h" +#include "hw.h" +#include "core.h" +#include "desc.h" +#include "user.h" + +#if (USB_CLASS) + +#if (USB_AUDIO) +#include "audio.h" +#include "adcuser.h" +#endif + +#if (USB_HID) +#include "hid.h" +#include "hiduser.h" +#endif + +#if (USB_MSC) +#include "msc.h" +#include "mscuser.h" +extern MSC_CSW CSW; +#endif + +#if (USB_CDC) +#include "cdc.h" +#include "cdcuser.h" +#endif + +#endif + +#if (USB_VENDOR) +#include "vendor.h" +#endif + +#if defined ( __CC_ARM ) +#pragma diag_suppress 111,1441 +#endif + +#if defined ( __GNUC__ ) +#define __packed __attribute__((__packed__)) +#endif + +uint16_t USB_DeviceStatus; +uint8_t USB_DeviceAddress; +uint8_t USB_Configuration; +uint32_t USB_EndPointMask; +uint32_t USB_EndPointHalt; +uint32_t USB_EndPointStall; /* EP must stay stalled */ +uint8_t USB_NumInterfaces; +uint8_t USB_AltSetting[USB_IF_NUM]; + +uint8_t EP0Buf[USB_MAX_PACKET0]; + + +USB_EP_DATA EP0Data; + +USB_SETUP_PACKET SetupPacket; + + +/* + * Reset USB Core + * Parameters: None + * Return Value: None + */ + +void USB_ResetCore (void) { + + USB_DeviceStatus = USB_POWER; + USB_DeviceAddress = 0; + USB_Configuration = 0; + USB_EndPointMask = 0x00010001; + USB_EndPointHalt = 0x00000000; + USB_EndPointStall = 0x00000000; +} + + +/* + * USB Request - Setup Stage + * Parameters: None (global SetupPacket) + * Return Value: None + */ + +void USB_SetupStage (void) { + USB_ReadEP(0x00, (uint8_t *)&SetupPacket); +} + + +/* + * USB Request - Data In Stage + * Parameters: None (global EP0Data) + * Return Value: None + */ + +void USB_DataInStage (void) { + uint32_t cnt; + + if (EP0Data.Count > USB_MAX_PACKET0) { + cnt = USB_MAX_PACKET0; + } else { + cnt = EP0Data.Count; + } + cnt = USB_WriteEP(0x80, EP0Data.pData, cnt); + EP0Data.pData += cnt; + EP0Data.Count -= cnt; +} + + +/* + * USB Request - Data Out Stage + * Parameters: None (global EP0Data) + * Return Value: None + */ + +void USB_DataOutStage (void) { + uint32_t cnt; + + cnt = USB_ReadEP(0x00, EP0Data.pData); + EP0Data.pData += cnt; + EP0Data.Count -= cnt; +} + + +/* + * USB Request - Status In Stage + * Parameters: None + * Return Value: None + */ + +void USB_StatusInStage (void) { + USB_WriteEP(0x80, NULL, 0); +} + + +/* + * USB Request - Status Out Stage + * Parameters: None + * Return Value: None + */ + +void USB_StatusOutStage (void) { + USB_ReadEP(0x00, EP0Buf); +} + + +/* + * Get Status USB Request + * Parameters: None (global SetupPacket) + * Return Value: TRUE - Success, FALSE - Error + */ + +#if defined ( __IAR_SYSTEMS_ICC__ ) +inline uint32_t USB_ReqGetStatus (void) { +#else +__inline uint32_t USB_ReqGetStatus (void) { +#endif + uint32_t n, m; + + switch (SetupPacket.bmRequestType.BM.Recipient) { + case REQUEST_TO_DEVICE: + EP0Data.pData = (uint8_t *)&USB_DeviceStatus; + break; + case REQUEST_TO_INTERFACE: + if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) { + *((__packed uint16_t *)EP0Buf) = 0; + *((uint16_t *)EP0Buf) = 0; + EP0Data.pData = EP0Buf; + } else { + return (FALSE); + } + break; + case REQUEST_TO_ENDPOINT: + n = SetupPacket.wIndex.WB.L & 0x8F; + m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n); + if (((USB_Configuration != 0) || ((n & 0x0F) == 0)) && (USB_EndPointMask & m)) { + *((__packed uint16_t *)EP0Buf) = (USB_EndPointHalt & m) ? 1 : 0; + *((uint16_t *)EP0Buf) = (USB_EndPointHalt & m) ? 1 : 0; + EP0Data.pData = EP0Buf; + } else { + return (FALSE); + } + break; + default: + return (FALSE); + } + return (TRUE); +} + + +/* + * Set/Clear Feature USB Request + * Parameters: sc: 0 - Clear, 1 - Set + * (global SetupPacket) + * Return Value: TRUE - Success, FALSE - Error + */ + +#if defined ( __IAR_SYSTEMS_ICC__ ) +inline uint32_t USB_ReqSetClrFeature (uint32_t sc) { +#else +__inline uint32_t USB_ReqSetClrFeature (uint32_t sc) { +#endif + uint32_t n, m; + + switch (SetupPacket.bmRequestType.BM.Recipient) { + case REQUEST_TO_DEVICE: + if (SetupPacket.wValue.W == USB_FEATURE_REMOTE_WAKEUP) { + if (sc) { + USB_WakeUpCfg(TRUE); + USB_DeviceStatus |= USB_GETSTATUS_REMOTE_WAKEUP; + } else { + USB_WakeUpCfg(FALSE); + USB_DeviceStatus &= ~USB_GETSTATUS_REMOTE_WAKEUP; + } + } else { + return (FALSE); + } + break; + case REQUEST_TO_INTERFACE: + return (FALSE); + case REQUEST_TO_ENDPOINT: + n = SetupPacket.wIndex.WB.L & 0x8F; + m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n); + if ((USB_Configuration != 0) && ((n & 0x0F) != 0) && (USB_EndPointMask & m)) { + if (SetupPacket.wValue.W == USB_FEATURE_ENDPOINT_STALL) { + if (sc) { + USB_SetStallEP(n); + USB_EndPointHalt |= m; + } else { + if ((USB_EndPointStall & m) != 0) { + return (TRUE); + } + USB_ClrStallEP(n); +#if (USB_MSC) + if ((n == MSC_EP_IN) && ((USB_EndPointHalt & m) != 0)) { + /* Compliance Test: rewrite CSW after unstall */ + if (CSW.dSignature == MSC_CSW_Signature) { + USB_WriteEP(MSC_EP_IN, (uint8_t *)&CSW, sizeof(CSW)); + } + } +#endif + USB_EndPointHalt &= ~m; + } + } else { + return (FALSE); + } + } else { + return (FALSE); + } + break; + default: + return (FALSE); + } + return (TRUE); +} + + +/* + * Set Address USB Request + * Parameters: None (global SetupPacket) + * Return Value: TRUE - Success, FALSE - Error + */ + +#if defined ( __IAR_SYSTEMS_ICC__ ) +inline uint32_t USB_ReqSetAddress (void) { +#else +__inline uint32_t USB_ReqSetAddress (void) { +#endif + switch (SetupPacket.bmRequestType.BM.Recipient) { + case REQUEST_TO_DEVICE: + USB_DeviceAddress = 0x80 | SetupPacket.wValue.WB.L; + break; + default: + return (FALSE); + } + return (TRUE); +} + + +/* + * Get Descriptor USB Request + * Parameters: None (global SetupPacket) + * Return Value: TRUE - Success, FALSE - Error + */ + +#if defined ( __IAR_SYSTEMS_ICC__ ) +inline uint32_t USB_ReqGetDescriptor (void) { +#else +__inline uint32_t USB_ReqGetDescriptor (void) { +#endif + uint8_t *pD; + uint32_t len, n; + + switch (SetupPacket.bmRequestType.BM.Recipient) { + case REQUEST_TO_DEVICE: + switch (SetupPacket.wValue.WB.H) { + case USB_DEVICE_DESCRIPTOR_TYPE: + EP0Data.pData = (uint8_t *)USB_DeviceDescriptor; + len = USB_DEVICE_DESC_SIZE; + break; + case USB_CONFIGURATION_DESCRIPTOR_TYPE: + pD = (uint8_t *)USB_ConfigDescriptor; + for (n = 0; n != SetupPacket.wValue.WB.L; n++) { + if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength != 0) { + pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength; + } + } + if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength == 0) { + return (FALSE); + } + EP0Data.pData = pD; + len = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength; + break; + case USB_STRING_DESCRIPTOR_TYPE: + pD = (uint8_t *)USB_StringDescriptor; + for (n = 0; n != SetupPacket.wValue.WB.L; n++) { + if (((USB_STRING_DESCRIPTOR *)pD)->bLength != 0) { + pD += ((USB_STRING_DESCRIPTOR *)pD)->bLength; + } + } + if (((USB_STRING_DESCRIPTOR *)pD)->bLength == 0) { + return (FALSE); + } + EP0Data.pData = pD; + len = ((USB_STRING_DESCRIPTOR *)EP0Data.pData)->bLength; + break; + default: + return (FALSE); + } + break; + case REQUEST_TO_INTERFACE: + switch (SetupPacket.wValue.WB.H) { +#if USB_HID + case HID_HID_DESCRIPTOR_TYPE: + if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) { + return (FALSE); /* Only Single HID Interface is supported */ + } + EP0Data.pData = (uint8_t *)USB_ConfigDescriptor + HID_DESC_OFFSET; + len = HID_DESC_SIZE; + break; + case HID_REPORT_DESCRIPTOR_TYPE: + if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) { + return (FALSE); /* Only Single HID Interface is supported */ + } + EP0Data.pData = (uint8_t *)HID_ReportDescriptor; + len = HID_ReportDescSize; + break; + case HID_PHYSICAL_DESCRIPTOR_TYPE: + return (FALSE); /* HID Physical Descriptor is not supported */ +#endif + default: + return (FALSE); + } +// break; + default: + return (FALSE); + } + + if (EP0Data.Count > len) { + EP0Data.Count = len; + } + + return (TRUE); +} + + +/* + * Get Configuration USB Request + * Parameters: None (global SetupPacket) + * Return Value: TRUE - Success, FALSE - Error + */ + +#if defined ( __IAR_SYSTEMS_ICC__ ) +inline uint32_t USB_ReqGetConfiguration (void) { +#else +__inline uint32_t USB_ReqGetConfiguration (void) { +#endif + switch (SetupPacket.bmRequestType.BM.Recipient) { + case REQUEST_TO_DEVICE: + EP0Data.pData = &USB_Configuration; + break; + default: + return (FALSE); + } + return (TRUE); +} + + +/* + * Set Configuration USB Request + * Parameters: None (global SetupPacket) + * Return Value: TRUE - Success, FALSE - Error + */ + +#if defined ( __IAR_SYSTEMS_ICC__ ) +inline uint32_t USB_ReqSetConfiguration (void) { +#else +__inline uint32_t USB_ReqSetConfiguration (void) { +#endif + USB_COMMON_DESCRIPTOR *pD; + uint32_t alt = 0; + uint32_t n, m; + uint32_t tmp; + + switch (SetupPacket.bmRequestType.BM.Recipient) { + case REQUEST_TO_DEVICE: + + if (SetupPacket.wValue.WB.L) { + pD = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor; + while (pD->bLength) { + switch (pD->bDescriptorType) { + case USB_CONFIGURATION_DESCRIPTOR_TYPE: + if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue == SetupPacket.wValue.WB.L) { + USB_Configuration = SetupPacket.wValue.WB.L; + USB_NumInterfaces = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->bNumInterfaces; + for (n = 0; n < USB_IF_NUM; n++) { + USB_AltSetting[n] = 0; + } + for (n = 1; n < 16; n++) { + if (USB_EndPointMask & (1 << n)) { + USB_DisableEP(n); + } + if (USB_EndPointMask & ((1 << 16) << n)) { + USB_DisableEP(n | 0x80); + } + } + USB_EndPointMask = 0x00010001; + USB_EndPointHalt = 0x00000000; + USB_EndPointStall= 0x00000000; + USB_Configure(TRUE); + if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bmAttributes & USB_CONFIG_POWERED_MASK) { + USB_DeviceStatus |= USB_GETSTATUS_SELF_POWERED; + } else { + USB_DeviceStatus &= ~USB_GETSTATUS_SELF_POWERED; + } + } else { +// (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength; + tmp = (uint32_t)pD; + tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength; + pD = (USB_COMMON_DESCRIPTOR *)tmp; + continue; + } + break; + case USB_INTERFACE_DESCRIPTOR_TYPE: + alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting; + break; + case USB_ENDPOINT_DESCRIPTOR_TYPE: + if (alt == 0) { + n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F; + m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n); + USB_EndPointMask |= m; + USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD); + USB_EnableEP(n); + USB_ResetEP(n); + } + break; + } +// (uint8_t *)pD += pD->bLength; + tmp = (uint32_t)pD; + tmp += pD->bLength; + pD = (USB_COMMON_DESCRIPTOR *)tmp; + } + } + else { + USB_Configuration = 0; + for (n = 1; n < 16; n++) { + if (USB_EndPointMask & (1 << n)) { + USB_DisableEP(n); + } + if (USB_EndPointMask & ((1 << 16) << n)) { + USB_DisableEP(n | 0x80); + } + } + USB_EndPointMask = 0x00010001; + USB_EndPointHalt = 0x00000000; + USB_EndPointStall = 0x00000000; + USB_Configure(FALSE); + } + + if (USB_Configuration != SetupPacket.wValue.WB.L) { + return (FALSE); + } + break; + default: + return (FALSE); + } + return (TRUE); +} + + +/* + * Get Interface USB Request + * Parameters: None (global SetupPacket) + * Return Value: TRUE - Success, FALSE - Error + */ + +#if defined ( __IAR_SYSTEMS_ICC__ ) +inline uint32_t USB_ReqGetInterface (void) { +#else +__inline uint32_t USB_ReqGetInterface (void) { +#endif + switch (SetupPacket.bmRequestType.BM.Recipient) { + case REQUEST_TO_INTERFACE: + if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) { + EP0Data.pData = USB_AltSetting + SetupPacket.wIndex.WB.L; + } else { + return (FALSE); + } + break; + default: + return (FALSE); + } + return (TRUE); +} + + +/* + * Set Interface USB Request + * Parameters: None (global SetupPacket) + * Return Value: TRUE - Success, FALSE - Error + */ +#if defined ( __IAR_SYSTEMS_ICC__ ) +inline uint32_t USB_ReqSetInterface (void) { +#else +__inline uint32_t USB_ReqSetInterface (void) { +#endif + USB_COMMON_DESCRIPTOR *pD; + uint32_t ifn = 0, alt = 0, old = 0, msk = 0; + uint32_t n, m; + uint32_t set; + uint32_t tmp; + + switch (SetupPacket.bmRequestType.BM.Recipient) { + case REQUEST_TO_INTERFACE: + if (USB_Configuration == 0) return (FALSE); + set = FALSE; + pD = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor; + while (pD->bLength) { + switch (pD->bDescriptorType) { + case USB_CONFIGURATION_DESCRIPTOR_TYPE: + if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue != USB_Configuration) { +// (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength; + tmp = (uint32_t)pD; + tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength; + pD = (USB_COMMON_DESCRIPTOR *)tmp; + + continue; + } + break; + case USB_INTERFACE_DESCRIPTOR_TYPE: + ifn = ((USB_INTERFACE_DESCRIPTOR *)pD)->bInterfaceNumber; + alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting; + msk = 0; + if ((ifn == SetupPacket.wIndex.WB.L) && (alt == SetupPacket.wValue.WB.L)) { + set = TRUE; + old = USB_AltSetting[ifn]; + USB_AltSetting[ifn] = (uint8_t)alt; + } + break; + case USB_ENDPOINT_DESCRIPTOR_TYPE: + if (ifn == SetupPacket.wIndex.WB.L) { + n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F; + m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n); + if (alt == SetupPacket.wValue.WB.L) { + USB_EndPointMask |= m; + USB_EndPointHalt &= ~m; + USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD); + USB_EnableEP(n); + USB_ResetEP(n); + msk |= m; + } + else if ((alt == old) && ((msk & m) == 0)) { + USB_EndPointMask &= ~m; + USB_EndPointHalt &= ~m; + USB_DisableEP(n); + } + } + break; + } +// (uint8_t *)pD += pD->bLength; + tmp = (uint32_t)pD; + tmp += pD->bLength; + pD = (USB_COMMON_DESCRIPTOR *)tmp; + } + break; + default: + return (FALSE); + } + + return (set); +} + + +/* + * USB Endpoint 0 Event Callback + * Parameters: event + * Return Value: none + */ + +void USB_EndPoint0 (uint32_t event) { + + switch (event) { + case USB_EVT_SETUP: + USB_SetupStage(); + USB_DirCtrlEP(SetupPacket.bmRequestType.BM.Dir); + EP0Data.Count = SetupPacket.wLength; /* Number of bytes to transfer */ + switch (SetupPacket.bmRequestType.BM.Type) { + + case REQUEST_STANDARD: + switch (SetupPacket.bRequest) { + case USB_REQUEST_GET_STATUS: + if (!USB_ReqGetStatus()) { + goto stall_i; + } + USB_DataInStage(); + break; + + case USB_REQUEST_CLEAR_FEATURE: + if (!USB_ReqSetClrFeature(0)) { + goto stall_i; + } + USB_StatusInStage(); +#if USB_FEATURE_EVENT + USB_Feature_Event(); +#endif + break; + + case USB_REQUEST_SET_FEATURE: + if (!USB_ReqSetClrFeature(1)) { + goto stall_i; + } + USB_StatusInStage(); +#if USB_FEATURE_EVENT + USB_Feature_Event(); +#endif + break; + + case USB_REQUEST_SET_ADDRESS: + if (!USB_ReqSetAddress()) { + goto stall_i; + } + USB_StatusInStage(); + break; + + case USB_REQUEST_GET_DESCRIPTOR: + if (!USB_ReqGetDescriptor()) { + goto stall_i; + } + USB_DataInStage(); + break; + + case USB_REQUEST_SET_DESCRIPTOR: +/*stall_o:*/ USB_SetStallEP(0x00); /* not supported */ + EP0Data.Count = 0; + break; + + case USB_REQUEST_GET_CONFIGURATION: + if (!USB_ReqGetConfiguration()) { + goto stall_i; + } + USB_DataInStage(); + break; + + case USB_REQUEST_SET_CONFIGURATION: + if (!USB_ReqSetConfiguration()) { + goto stall_i; + } + USB_StatusInStage(); +#if USB_CONFIGURE_EVENT + USB_Configure_Event(); +#endif + break; + + case USB_REQUEST_GET_INTERFACE: + if (!USB_ReqGetInterface()) { + goto stall_i; + } + USB_DataInStage(); + break; + + case USB_REQUEST_SET_INTERFACE: + if (!USB_ReqSetInterface()) { + goto stall_i; + } + USB_StatusInStage(); +#if USB_INTERFACE_EVENT + USB_Interface_Event(); +#endif + break; + + default: + goto stall_i; + } + break; /* end case REQUEST_STANDARD */ + +#if USB_CLASS + case REQUEST_CLASS: + switch (SetupPacket.bmRequestType.BM.Recipient) { + + case REQUEST_TO_DEVICE: + goto stall_i; /* not supported */ + + case REQUEST_TO_INTERFACE: +#if USB_HID + if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) { /* IF number correct? */ + switch (SetupPacket.bRequest) { + case HID_REQUEST_GET_REPORT: + if (HID_GetReport()) { + EP0Data.pData = EP0Buf; /* point to data to be sent */ + USB_DataInStage(); /* send requested data */ + goto setup_class_ok; + } + break; + case HID_REQUEST_SET_REPORT: + EP0Data.pData = EP0Buf; /* data to be received */ + goto setup_class_ok; + case HID_REQUEST_GET_IDLE: + if (HID_GetIdle()) { + EP0Data.pData = EP0Buf; /* point to data to be sent */ + USB_DataInStage(); /* send requested data */ + goto setup_class_ok; + } + break; + case HID_REQUEST_SET_IDLE: + if (HID_SetIdle()) { + USB_StatusInStage(); /* send Acknowledge */ + goto setup_class_ok; + } + break; + case HID_REQUEST_GET_PROTOCOL: + if (HID_GetProtocol()) { + EP0Data.pData = EP0Buf; /* point to data to be sent */ + USB_DataInStage(); /* send requested data */ + goto setup_class_ok; + } + break; + case HID_REQUEST_SET_PROTOCOL: + if (HID_SetProtocol()) { + USB_StatusInStage(); /* send Acknowledge */ + goto setup_class_ok; + } + break; + } + } +#endif /* USB_HID */ +#if USB_MSC + if (SetupPacket.wIndex.WB.L == USB_MSC_IF_NUM) { /* IF number correct? */ + switch (SetupPacket.bRequest) { + case MSC_REQUEST_RESET: + if ((SetupPacket.wValue.W == 0) && /* RESET with invalid parameters -> STALL */ + (SetupPacket.wLength == 0)) { + if (MSC_Reset()) { + USB_StatusInStage(); + goto setup_class_ok; + } + } + break; + case MSC_REQUEST_GET_MAX_LUN: + if ((SetupPacket.wValue.W == 0) && /* GET_MAX_LUN with invalid parameters -> STALL */ + (SetupPacket.wLength == 1)) { + if (MSC_GetMaxLUN()) { + EP0Data.pData = EP0Buf; + USB_DataInStage(); + goto setup_class_ok; + } + } + break; + } + } +#endif /* USB_MSC */ +#if USB_AUDIO + if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM) || /* IF number correct? */ + (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) || + (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) { + switch (SetupPacket.bRequest) { + case AUDIO_REQUEST_GET_CUR: + case AUDIO_REQUEST_GET_MIN: + case AUDIO_REQUEST_GET_MAX: + case AUDIO_REQUEST_GET_RES: + if (ADC_IF_GetRequest()) { + EP0Data.pData = EP0Buf; /* point to data to be sent */ + USB_DataInStage(); /* send requested data */ + goto setup_class_ok; + } + break; + case AUDIO_REQUEST_SET_CUR: +// case AUDIO_REQUEST_SET_MIN: +// case AUDIO_REQUEST_SET_MAX: +// case AUDIO_REQUEST_SET_RES: + EP0Data.pData = EP0Buf; /* data to be received */ + goto setup_class_ok; + } + } +#endif /* USB_AUDIO */ +#if USB_CDC + if ((SetupPacket.wIndex.WB.L == USB_CDC_CIF_NUM) || /* IF number correct? */ + (SetupPacket.wIndex.WB.L == USB_CDC_DIF_NUM)) { + switch (SetupPacket.bRequest) { + case CDC_SEND_ENCAPSULATED_COMMAND: + EP0Data.pData = EP0Buf; /* data to be received, see USB_EVT_OUT */ + goto setup_class_ok; + case CDC_GET_ENCAPSULATED_RESPONSE: + if (CDC_GetEncapsulatedResponse()) { + EP0Data.pData = EP0Buf; /* point to data to be sent */ + USB_DataInStage(); /* send requested data */ + goto setup_class_ok; + } + break; + case CDC_SET_COMM_FEATURE: + EP0Data.pData = EP0Buf; /* data to be received, see USB_EVT_OUT */ + goto setup_class_ok; + case CDC_GET_COMM_FEATURE: + if (CDC_GetCommFeature(SetupPacket.wValue.W)) { + EP0Data.pData = EP0Buf; /* point to data to be sent */ + USB_DataInStage(); /* send requested data */ + goto setup_class_ok; + } + break; + case CDC_CLEAR_COMM_FEATURE: + if (CDC_ClearCommFeature(SetupPacket.wValue.W)) { + USB_StatusInStage(); /* send Acknowledge */ + goto setup_class_ok; + } + break; + case CDC_SET_LINE_CODING: + EP0Data.pData = EP0Buf; /* data to be received, see USB_EVT_OUT */ + goto setup_class_ok; + case CDC_GET_LINE_CODING: + if (CDC_GetLineCoding()) { + EP0Data.pData = EP0Buf; /* point to data to be sent */ + USB_DataInStage(); /* send requested data */ + goto setup_class_ok; + } + break; + case CDC_SET_CONTROL_LINE_STATE: + if (CDC_SetControlLineState(SetupPacket.wValue.W)) { + USB_StatusInStage(); /* send Acknowledge */ + goto setup_class_ok; + } + break; + case CDC_SEND_BREAK: + if (CDC_SendBreak(SetupPacket.wValue.W)) { + USB_StatusInStage(); /* send Acknowledge */ + goto setup_class_ok; + } + break; + } + } +#endif /* USB_CDC */ + goto stall_i; /* not supported */ + /* end case REQUEST_TO_INTERFACE */ + + case REQUEST_TO_ENDPOINT: +#if USB_AUDIO + switch (SetupPacket.bRequest) { + case AUDIO_REQUEST_GET_CUR: + case AUDIO_REQUEST_GET_MIN: + case AUDIO_REQUEST_GET_MAX: + case AUDIO_REQUEST_GET_RES: + if (ADC_EP_GetRequest()) { + EP0Data.pData = EP0Buf; /* point to data to be sent */ + USB_DataInStage(); /* send requested data */ + goto setup_class_ok; + } + break; + case AUDIO_REQUEST_SET_CUR: +// case AUDIO_REQUEST_SET_MIN: +// case AUDIO_REQUEST_SET_MAX: +// case AUDIO_REQUEST_SET_RES: + EP0Data.pData = EP0Buf; /* data to be received */ + goto setup_class_ok; + } +#endif /* USB_AUDIO */ + goto stall_i; + /* end case REQUEST_TO_ENDPOINT */ + + default: + goto stall_i; + } +setup_class_ok: /* request finished successfully */ + break; /* end case REQUEST_CLASS */ +#endif /* USB_CLASS */ + +#if USB_VENDOR + case REQUEST_VENDOR: + switch (SetupPacket.bmRequestType.BM.Recipient) { + + case REQUEST_TO_DEVICE: + if (!USB_ReqVendorDev(TRUE)) { + goto stall_i; /* not supported */ + } + break; + + case REQUEST_TO_INTERFACE: + if (!USB_ReqVendorIF(TRUE)) { + goto stall_i; /* not supported */ + } + break; + + case REQUEST_TO_ENDPOINT: + if (!USB_ReqVendorEP(TRUE)) { + goto stall_i; /* not supported */ + } + break; + + default: + goto stall_i; + } + + if (SetupPacket.wLength) { + if (SetupPacket.bmRequestType.BM.Dir == REQUEST_DEVICE_TO_HOST) { + USB_DataInStage(); + } + } else { + USB_StatusInStage(); + } + + break; /* end case REQUEST_VENDOR */ +#endif /* USB_VENDOR */ + + default: +stall_i: USB_SetStallEP(0x80); + EP0Data.Count = 0; + break; + } + break; /* end case USB_EVT_SETUP */ + + case USB_EVT_OUT: + if (SetupPacket.bmRequestType.BM.Dir == REQUEST_HOST_TO_DEVICE) { + if (EP0Data.Count) { /* still data to receive ? */ + USB_DataOutStage(); /* receive data */ + if (EP0Data.Count == 0) { /* data complete ? */ + switch (SetupPacket.bmRequestType.BM.Type) { + + case REQUEST_STANDARD: + goto stall_i; /* not supported */ + +#if (USB_CLASS) + case REQUEST_CLASS: + switch (SetupPacket.bmRequestType.BM.Recipient) { + case REQUEST_TO_DEVICE: + goto stall_i; /* not supported */ + + case REQUEST_TO_INTERFACE: +#if USB_HID + if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) { /* IF number correct? */ + switch (SetupPacket.bRequest) { + case HID_REQUEST_SET_REPORT: + if (HID_SetReport()) { + USB_StatusInStage(); /* send Acknowledge */ + goto out_class_ok; + } + break; + } + } +#endif /* USB_HID */ +#if USB_AUDIO + if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM) || /* IF number correct? */ + (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) || + (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) { + switch (SetupPacket.bRequest) { + case AUDIO_REQUEST_SET_CUR: +// case AUDIO_REQUEST_SET_MIN: +// case AUDIO_REQUEST_SET_MAX: +// case AUDIO_REQUEST_SET_RES: + if (ADC_IF_SetRequest()) { + USB_StatusInStage(); /* send Acknowledge */ + goto out_class_ok; + } + break; + } + } +#endif /* USB_AUDIO */ +#if USB_CDC + if ((SetupPacket.wIndex.WB.L == USB_CDC_CIF_NUM) || /* IF number correct? */ + (SetupPacket.wIndex.WB.L == USB_CDC_DIF_NUM)) { + switch (SetupPacket.bRequest) { + case CDC_SEND_ENCAPSULATED_COMMAND: + if (CDC_SendEncapsulatedCommand()) { + USB_StatusInStage(); /* send Acknowledge */ + goto out_class_ok; + } + break; + case CDC_SET_COMM_FEATURE: + if (CDC_SetCommFeature(SetupPacket.wValue.W)) { + USB_StatusInStage(); /* send Acknowledge */ + goto out_class_ok; + } + break; + case CDC_SET_LINE_CODING: + if (CDC_SetLineCoding()) { + USB_StatusInStage(); /* send Acknowledge */ + goto out_class_ok; + } + break; + } + } +#endif /* USB_CDC */ + goto stall_i; + /* end case REQUEST_TO_INTERFACE */ + + case REQUEST_TO_ENDPOINT: +#if USB_AUDIO + switch (SetupPacket.bRequest) { + case AUDIO_REQUEST_SET_CUR: +// case AUDIO_REQUEST_SET_MIN: +// case AUDIO_REQUEST_SET_MAX: +// case AUDIO_REQUEST_SET_RES: + if (ADC_EP_SetRequest()) { + USB_StatusInStage(); /* send Acknowledge */ + goto out_class_ok; + } + break; + } +#endif /* USB_AUDIO */ + goto stall_i; + /* end case REQUEST_TO_ENDPOINT */ + + default: + goto stall_i; + } +out_class_ok: /* request finished successfully */ + break; /* end case REQUEST_CLASS */ +#endif /* USB_CLASS */ + +#if USB_VENDOR + case REQUEST_VENDOR: + switch (SetupPacket.bmRequestType.BM.Recipient) { + + case REQUEST_TO_DEVICE: + if (!USB_ReqVendorDev(FALSE)) { + goto stall_i; /* not supported */ + } + break; + + case REQUEST_TO_INTERFACE: + if (!USB_ReqVendorIF(FALSE)) { + goto stall_i; /* not supported */ + } + break; + + case REQUEST_TO_ENDPOINT: + if (!USB_ReqVendorEP(FALSE)) { + goto stall_i; /* not supported */ + } + break; + + default: + goto stall_i; + } + + USB_StatusInStage(); + + break; /* end case REQUEST_VENDOR */ +#endif /* USB_VENDOR */ + + default: + goto stall_i; + } + } + } + } else { + USB_StatusOutStage(); /* receive Acknowledge */ + } + break; /* end case USB_EVT_OUT */ + + case USB_EVT_IN : + if (SetupPacket.bmRequestType.BM.Dir == REQUEST_DEVICE_TO_HOST) { + USB_DataInStage(); /* send data */ + } else { + if (USB_DeviceAddress & 0x80) { + USB_DeviceAddress &= 0x7F; + USB_SetAddress(USB_DeviceAddress); + } + } + break; /* end case USB_EVT_IN */ + + case USB_EVT_OUT_STALL: + USB_ClrStallEP(0x00); + break; + + case USB_EVT_IN_STALL: + USB_ClrStallEP(0x80); + break; + + } +} diff --git a/new_cmsis/usb/usbcore.h b/new_cmsis/usb/core.h similarity index 97% rename from new_cmsis/usb/usbcore.h rename to new_cmsis/usb/core.h index 9562160..79cf657 100755 --- a/new_cmsis/usb/usbcore.h +++ b/new_cmsis/usb/core.h @@ -1,52 +1,52 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: usbcore.h - * Purpose: USB Core Definitions - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC microcontroller devices only. Nothing else - * gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -#ifndef __USBCORE_H__ -#define __USBCORE_H__ - - -/* USB Endpoint Data Structure */ -typedef struct _USB_EP_DATA { - uint8_t *pData; - uint16_t Count; -} USB_EP_DATA; - -/* USB Core Global Variables */ -extern uint16_t USB_DeviceStatus; -extern uint8_t USB_DeviceAddress; -extern uint8_t USB_Configuration; -extern uint32_t USB_EndPointMask; -extern uint32_t USB_EndPointHalt; -extern uint32_t USB_EndPointStall; -extern uint8_t USB_AltSetting[USB_IF_NUM]; - -/* USB Endpoint 0 Buffer */ -extern uint8_t EP0Buf[USB_MAX_PACKET0]; - -/* USB Endpoint 0 Data Info */ -extern USB_EP_DATA EP0Data; - -/* USB Setup Packet */ -extern USB_SETUP_PACKET SetupPacket; - -/* USB Core Functions */ -extern void USB_ResetCore (void); - - - -#endif /* __USBCORE_H__ */ +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: usbcore.h + * Purpose: USB Core Definitions + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC microcontroller devices only. Nothing else + * gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#ifndef __USBCORE_H__ +#define __USBCORE_H__ + + +/* USB Endpoint Data Structure */ +typedef struct _USB_EP_DATA { + uint8_t *pData; + uint16_t Count; +} USB_EP_DATA; + +/* USB Core Global Variables */ +extern uint16_t USB_DeviceStatus; +extern uint8_t USB_DeviceAddress; +extern uint8_t USB_Configuration; +extern uint32_t USB_EndPointMask; +extern uint32_t USB_EndPointHalt; +extern uint32_t USB_EndPointStall; +extern uint8_t USB_AltSetting[USB_IF_NUM]; + +/* USB Endpoint 0 Buffer */ +extern uint8_t EP0Buf[USB_MAX_PACKET0]; + +/* USB Endpoint 0 Data Info */ +extern USB_EP_DATA EP0Data; + +/* USB Setup Packet */ +extern USB_SETUP_PACKET SetupPacket; + +/* USB Core Functions */ +extern void USB_ResetCore (void); + + + +#endif /* __USBCORE_H__ */ diff --git a/new_cmsis/usb/usbdesc.c b/new_cmsis/usb/desc.c similarity index 87% rename from new_cmsis/usb/usbdesc.c rename to new_cmsis/usb/desc.c index a2a75b0..ee1df87 100755 --- a/new_cmsis/usb/usbdesc.c +++ b/new_cmsis/usb/desc.c @@ -1,201 +1,195 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: usbdesc.c - * Purpose: USB Descriptors - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC microcontroller devices only. Nothing else - * gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------- - * History: - * V1.20 Changed string descriptor handling - * V1.00 Initial Version - *---------------------------------------------------------------------------*/ -#include "lpc_types.h" -#include "usb.h" -#include "cdc.h" -#include "usbcfg.h" -#include "usbdesc.h" - - -/* USB Standard Device Descriptor */ -const uint8_t USB_DeviceDescriptor[] = { - USB_DEVICE_DESC_SIZE, /* bLength */ - USB_DEVICE_DESCRIPTOR_TYPE, /* bDescriptorType */ - WBVAL(0x0200), /* 2.0 */ /* bcdUSB */ - USB_DEVICE_CLASS_COMMUNICATIONS, /* bDeviceClass CDC*/ - 0x00, /* bDeviceSubClass */ - 0x00, /* bDeviceProtocol */ - USB_MAX_PACKET0, /* bMaxPacketSize0 */ - WBVAL(0x1FC9), /* idVendor */ - WBVAL(0x2002), /* idProduct */ - WBVAL(0x0100), /* 1.00 */ /* bcdDevice */ - 0x01, /* iManufacturer */ - 0x02, /* iProduct */ - 0x03, /* iSerialNumber */ - 0x01 /* bNumConfigurations: one possible configuration*/ -}; - -/* USB Configuration Descriptor */ -/* All Descriptors (Configuration, Interface, Endpoint, Class, Vendor */ -const uint8_t USB_ConfigDescriptor[] = { -/* Configuration 1 */ - USB_CONFIGUARTION_DESC_SIZE, /* bLength */ - USB_CONFIGURATION_DESCRIPTOR_TYPE, /* bDescriptorType */ - WBVAL( /* wTotalLength */ - 1*USB_CONFIGUARTION_DESC_SIZE + - 1*USB_INTERFACE_DESC_SIZE + /* communication interface */ - 0x0013 + /* CDC functions */ - 1*USB_ENDPOINT_DESC_SIZE + /* interrupt endpoint */ - 1*USB_INTERFACE_DESC_SIZE + /* data interface */ - 2*USB_ENDPOINT_DESC_SIZE /* bulk endpoints */ - ), - 0x02, /* bNumInterfaces */ - 0x01, /* bConfigurationValue: 0x01 is used to select this configuration */ - 0x00, /* iConfiguration: no string to describe this configuration */ - USB_CONFIG_BUS_POWERED /*|*/ /* bmAttributes */ -/*USB_CONFIG_REMOTE_WAKEUP*/, - USB_CONFIG_POWER_MA(100), /* bMaxPower, device power consumption is 100 mA */ -/* Interface 0, Alternate Setting 0, Communication class interface descriptor */ - USB_INTERFACE_DESC_SIZE, /* bLength */ - USB_INTERFACE_DESCRIPTOR_TYPE, /* bDescriptorType */ - USB_CDC_CIF_NUM, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x01, /* bNumEndpoints: One endpoint used */ - CDC_COMMUNICATION_INTERFACE_CLASS, /* bInterfaceClass: Communication Interface Class */ - CDC_ABSTRACT_CONTROL_MODEL, /* bInterfaceSubClass: Abstract Control Model */ - 0x00, /* bInterfaceProtocol: no protocol used */ - 0x5E, /* iInterface: */ -/*Header Functional Descriptor*/ - 0x05, /* bLength: Endpoint Descriptor size */ - CDC_CS_INTERFACE, /* bDescriptorType: CS_INTERFACE */ - CDC_HEADER, /* bDescriptorSubtype: Header Func Desc */ - WBVAL(CDC_V1_10), /* 1.10 */ /* bcdCDC */ -/*Call Management Functional Descriptor*/ - 0x05, /* bFunctionLength */ - CDC_CS_INTERFACE, /* bDescriptorType: CS_INTERFACE */ - CDC_CALL_MANAGEMENT, /* bDescriptorSubtype: Call Management Func Desc */ - 0x01, /* bmCapabilities: device handles call management */ - 0x01, /* bDataInterface: CDC data IF ID */ -/*Abstract Control Management Functional Descriptor*/ - 0x04, /* bFunctionLength */ - CDC_CS_INTERFACE, /* bDescriptorType: CS_INTERFACE */ - CDC_ABSTRACT_CONTROL_MANAGEMENT, /* bDescriptorSubtype: Abstract Control Management desc */ - 0x02, /* bmCapabilities: SET_LINE_CODING, GET_LINE_CODING, SET_CONTROL_LINE_STATE supported */ -/*Union Functional Descriptor*/ - 0x05, /* bFunctionLength */ - CDC_CS_INTERFACE, /* bDescriptorType: CS_INTERFACE */ - CDC_UNION, /* bDescriptorSubtype: Union func desc */ - USB_CDC_CIF_NUM, /* bMasterInterface: Communication class interface is master */ - USB_CDC_DIF_NUM, /* bSlaveInterface0: Data class interface is slave 0 */ -/*Endpoint 1 Descriptor*/ /* event notification (optional) */ - USB_ENDPOINT_DESC_SIZE, /* bLength */ - USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType */ - USB_ENDPOINT_IN(1), /* bEndpointAddress */ - USB_ENDPOINT_TYPE_INTERRUPT, /* bmAttributes */ - WBVAL(0x0010), /* wMaxPacketSize */ - 0x02, /* 2ms */ /* bInterval */ -/* Interface 1, Alternate Setting 0, Data class interface descriptor*/ - USB_INTERFACE_DESC_SIZE, /* bLength */ - USB_INTERFACE_DESCRIPTOR_TYPE, /* bDescriptorType */ - USB_CDC_DIF_NUM, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: no alternate setting */ - 0x02, /* bNumEndpoints: two endpoints used */ - CDC_DATA_INTERFACE_CLASS, /* bInterfaceClass: Data Interface Class */ - 0x00, /* bInterfaceSubClass: no subclass available */ - 0x00, /* bInterfaceProtocol: no protocol used */ - 0x5E, /* iInterface: */ -/* Endpoint, EP2 Bulk Out */ - USB_ENDPOINT_DESC_SIZE, /* bLength */ - USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType */ - USB_ENDPOINT_OUT(2), /* bEndpointAddress */ - USB_ENDPOINT_TYPE_BULK, /* bmAttributes */ - WBVAL(USB_CDC_BUFSIZE), /* wMaxPacketSize */ - 0x00, /* bInterval: ignore for Bulk transfer */ -/* Endpoint, EP2 Bulk In */ - USB_ENDPOINT_DESC_SIZE, /* bLength */ - USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType */ - USB_ENDPOINT_IN(2), /* bEndpointAddress */ - USB_ENDPOINT_TYPE_BULK, /* bmAttributes */ - WBVAL(USB_CDC_BUFSIZE), /* wMaxPacketSize */ - 0x00, /* bInterval: ignore for Bulk transfer */ -/* Terminator */ - 0 /* bLength */ -}; - - - - -/* USB String Descriptor (optional) */ -const uint8_t USB_StringDescriptor[] = { -/* Index 0x00: LANGID Codes */ - 0x04, /* bLength */ - USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */ - WBVAL(0x0409), /* US English */ /* wLANGID */ -/* Index 0x01: Manufacturer */ - (13*2 + 2), /* bLength (13 Char + Type + lenght) */ - USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */ - 'N',0, - 'X',0, - 'P',0, - ' ',0, - 'S',0, - 'E',0, - 'M',0, - 'I',0, - 'C',0, - 'O',0, - 'N',0, - 'D',0, - ' ',0, -/* Index 0x02: Product */ - (17*2 + 2), /* bLength ( 17 Char + Type + lenght) */ - USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */ - 'N',0, - 'X',0, - 'P',0, - ' ',0, - 'L',0, - 'P',0, - 'C',0, - '1',0, - '7',0, - 'x',0, - 'x',0, - ' ',0, - 'V',0, - 'C',0, - 'O',0, - 'M',0, - ' ',0, -/* Index 0x03: Serial Number */ - (12*2 + 2), /* bLength (12 Char + Type + lenght) */ - USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */ - 'D',0, - 'E',0, - 'M',0, - 'O',0, - '0',0, - '0',0, - '0',0, - '0',0, - '0',0, - '0',0, - '0',0, - '0',0, -/* Index 0x04: Interface 0, Alternate Setting 0 */ - ( 4*2 + 2), /* bLength (4 Char + Type + lenght) */ - USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */ - 'V',0, - 'C',0, - 'O',0, - 'M',0, -}; +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: usbdesc.c + * Purpose: USB Descriptors + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC microcontroller devices only. Nothing else + * gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------- + * History: + * V1.20 Changed string descriptor handling + * V1.00 Initial Version + *---------------------------------------------------------------------------*/ +#include "lpc_types.h" +#include "usb.h" +#include "cdc.h" +#include "cfg.h" +#include "desc.h" + + +/* USB Standard Device Descriptor */ +const uint8_t USB_DeviceDescriptor[] = { + USB_DEVICE_DESC_SIZE, /* bLength */ + USB_DEVICE_DESCRIPTOR_TYPE, /* bDescriptorType */ + WBVAL(0x0200), /* 2.0 */ /* bcdUSB */ + USB_DEVICE_CLASS_COMMUNICATIONS, /* bDeviceClass CDC*/ + 0x00, /* bDeviceSubClass */ + 0x00, /* bDeviceProtocol */ + USB_MAX_PACKET0, /* bMaxPacketSize0 */ + WBVAL(0x1FC9), /* idVendor */ + WBVAL(0x2002), /* idProduct */ + WBVAL(0x0100), /* 1.00 */ /* bcdDevice */ + 0x01, /* iManufacturer */ + 0x02, /* iProduct */ + 0x03, /* iSerialNumber */ + 0x01 /* bNumConfigurations: one possible configuration*/ +}; + +/* USB Configuration Descriptor */ +/* All Descriptors (Configuration, Interface, Endpoint, Class, Vendor */ +const uint8_t USB_ConfigDescriptor[] = { +/* Configuration 1 */ + USB_CONFIGUARTION_DESC_SIZE, + /* bLength */ + USB_CONFIGURATION_DESCRIPTOR_TYPE, + /* bDescriptorType */ + WBVAL( /* wTotalLength */ + (USB_CONFIGUARTION_DESC_SIZE) + + (USB_INTERFACE_DESC_SIZE) + /* communication interface */ + 0x0013 + /* CDC functions */ + (USB_ENDPOINT_DESC_SIZE) + /* interrupt endpoint */ + (USB_INTERFACE_DESC_SIZE) + /* data interface */ + (2*USB_ENDPOINT_DESC_SIZE) /* bulk endpoints */ + ), + 0x02, /* bNumInterfaces */ + 0x01, /* bConfigurationValue: 0x01 is used to select this configuration */ + 0x00, /* iConfiguration: no string to describe this configuration */ + USB_CONFIG_BUS_POWERED /*|*/ /* bmAttributes */ +/*USB_CONFIG_REMOTE_WAKEUP*/, + USB_CONFIG_POWER_MA(100), /* bMaxPower, device power consumption is 100 mA */ +/* Interface 0, Alternate Setting 0, Communication class interface descriptor */ + USB_INTERFACE_DESC_SIZE, /* bLength */ + USB_INTERFACE_DESCRIPTOR_TYPE, /* bDescriptorType */ + USB_CDC_CIF_NUM, /* bInterfaceNumber: Number of Interface */ + 0x00, /* bAlternateSetting: Alternate setting */ + 0x01, /* bNumEndpoints: One endpoint used */ + CDC_COMMUNICATION_INTERFACE_CLASS, /* bInterfaceClass: Communication Interface Class */ + CDC_ABSTRACT_CONTROL_MODEL, /* bInterfaceSubClass: Abstract Control Model */ + 0x00, /* bInterfaceProtocol: no protocol used */ + 0x5E, /* iInterface: */ +/*Header Functional Descriptor*/ + 0x05, /* bLength: Endpoint Descriptor size */ + CDC_CS_INTERFACE, /* bDescriptorType: CS_INTERFACE */ + CDC_HEADER, /* bDescriptorSubtype: Header Func Desc */ + WBVAL(CDC_V1_10), /* 1.10 */ /* bcdCDC */ +/*Call Management Functional Descriptor*/ + 0x05, /* bFunctionLength */ + CDC_CS_INTERFACE, /* bDescriptorType: CS_INTERFACE */ + CDC_CALL_MANAGEMENT, /* bDescriptorSubtype: Call Management Func Desc */ + 0x01, /* bmCapabilities: device handles call management */ + 0x01, /* bDataInterface: CDC data IF ID */ +/*Abstract Control Management Functional Descriptor*/ + 0x04, /* bFunctionLength */ + CDC_CS_INTERFACE, /* bDescriptorType: CS_INTERFACE */ + CDC_ABSTRACT_CONTROL_MANAGEMENT, /* bDescriptorSubtype: Abstract Control Management desc */ + 0x02, /* bmCapabilities: SET_LINE_CODING, GET_LINE_CODING, SET_CONTROL_LINE_STATE supported */ +/*Union Functional Descriptor*/ + 0x05, /* bFunctionLength */ + CDC_CS_INTERFACE, /* bDescriptorType: CS_INTERFACE */ + CDC_UNION, /* bDescriptorSubtype: Union func desc */ + USB_CDC_CIF_NUM, /* bMasterInterface: Communication class interface is master */ + USB_CDC_DIF_NUM, /* bSlaveInterface0: Data class interface is slave 0 */ +/*Endpoint 1 Descriptor*/ /* event notification (optional) */ + USB_ENDPOINT_DESC_SIZE, /* bLength */ + USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType */ + USB_ENDPOINT_IN(1), /* bEndpointAddress */ + USB_ENDPOINT_TYPE_INTERRUPT, /* bmAttributes */ + WBVAL(0x0010), /* wMaxPacketSize */ + 0x02, /* 2ms */ /* bInterval */ +/* Interface 1, Alternate Setting 0, Data class interface descriptor*/ + USB_INTERFACE_DESC_SIZE, /* bLength */ + USB_INTERFACE_DESCRIPTOR_TYPE, /* bDescriptorType */ + USB_CDC_DIF_NUM, /* bInterfaceNumber: Number of Interface */ + 0x00, /* bAlternateSetting: no alternate setting */ + 0x02, /* bNumEndpoints: two endpoints used */ + CDC_DATA_INTERFACE_CLASS, /* bInterfaceClass: Data Interface Class */ + 0x00, /* bInterfaceSubClass: no subclass available */ + 0x00, /* bInterfaceProtocol: no protocol used */ + 0x5E, /* iInterface: */ +/* Endpoint, EP2 Bulk Out */ + USB_ENDPOINT_DESC_SIZE, /* bLength */ + USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType */ + USB_ENDPOINT_OUT(2), /* bEndpointAddress */ + USB_ENDPOINT_TYPE_BULK, /* bmAttributes */ + WBVAL(USB_CDC_BUFSIZE), /* wMaxPacketSize */ + 0x00, /* bInterval: ignore for Bulk transfer */ +/* Endpoint, EP2 Bulk In */ + USB_ENDPOINT_DESC_SIZE, /* bLength */ + USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType */ + USB_ENDPOINT_IN(2), /* bEndpointAddress */ + USB_ENDPOINT_TYPE_BULK, /* bmAttributes */ + WBVAL(USB_CDC_BUFSIZE), /* wMaxPacketSize */ + 0x00, /* bInterval: ignore for Bulk transfer */ +/* Terminator */ + 0 /* bLength */ +}; + + + + +/* USB String Descriptor (optional) */ +const uint8_t USB_StringDescriptor[] = { +/* Index 0x00: LANGID Codes */ + 0x04, /* bLength */ + USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */ + WBVAL(0x0409), /* US English */ /* wLANGID */ +/* Index 0x01: Manufacturer */ + (7*2 + 2), /* bLength (13 Char + Type + lenght) */ + USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */ + 'L',0, + 'a',0, + 'b',0, + 'i',0, + 't',0, + 'a',0, + 't',0, +/* Index 0x02: Product */ + (17*2 + 2), /* bLength ( 17 Char + Type + lenght) */ + USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */ + 'R',0, + 'a',0, + 'p',0, + 'p',0, + 'e',0, + 'r',0, + ' ',0, + 'U',0, + 'S',0, + 'B',0, + ' ',0, + 'S',0, + 'e',0, + 'r',0, + 'i',0, + 'a',0, + 'l',0, +/* Index 0x03: Serial Number */ + (12*2 + 2), /* bLength (12 Char + Type + lenght) */ + USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */ + 'P',0, + 'R',0, + 'O',0, + 'T',0, + 'O',0, + 'T',0, + 'Y',0, + 'P',0, + 'E',0, + ' ',0, + '4',0, + '2',0, +/* Index 0x04: Interface 0, Alternate Setting 0 */ + ( 4*2 + 2), /* bLength (4 Char + Type + lenght) */ + USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */ + 'V',0, + 'C',0, + 'O',0, + 'M',0, +}; diff --git a/new_cmsis/usb/usbdesc.h b/new_cmsis/usb/desc.h similarity index 94% rename from new_cmsis/usb/usbdesc.h rename to new_cmsis/usb/desc.h index 851b80e..b6eeddc 100755 --- a/new_cmsis/usb/usbdesc.h +++ b/new_cmsis/usb/desc.h @@ -1,35 +1,35 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: usbdesc.h - * Purpose: USB Descriptors Definitions - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC microcontroller devices only. Nothing else - * gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -#ifndef __USBDESC_H__ -#define __USBDESC_H__ - - -#define WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF) - -#define USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR)) -#define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR)) -#define USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR)) -#define USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR)) - -extern const uint8_t USB_DeviceDescriptor[]; -extern const uint8_t USB_ConfigDescriptor[]; -extern const uint8_t USB_StringDescriptor[]; - - -#endif /* __USBDESC_H__ */ +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: usbdesc.h + * Purpose: USB Descriptors Definitions + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC microcontroller devices only. Nothing else + * gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#ifndef __USBDESC_H__ +#define __USBDESC_H__ + + +#define WBVAL(x) ((x) & 0xFF),(((x) >> 8) & 0xFF) + +#define USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR)) +#define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR)) +#define USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR)) +#define USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR)) + +extern const uint8_t USB_DeviceDescriptor[]; +extern const uint8_t USB_ConfigDescriptor[]; +extern const uint8_t USB_StringDescriptor[]; + + +#endif /* __USBDESC_H__ */ diff --git a/new_cmsis/usb/usbhw.c b/new_cmsis/usb/hw.c similarity index 95% rename from new_cmsis/usb/usbhw.c rename to new_cmsis/usb/hw.c index e58b268..e8fd5f4 100755 --- a/new_cmsis/usb/usbhw.c +++ b/new_cmsis/usb/hw.c @@ -1,811 +1,811 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: usbhw.c - * Purpose: USB Hardware Layer Module for NXP's LPC17xx MCU - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC family microcontroller devices only. Nothing - * else gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------- - * History: - * V1.20 Added USB_ClearEPBuf - * V1.00 Initial Version - *----------------------------------------------------------------------------*/ -#include "../LPC17xx.h" /* LPC17xx definitions */ -#include "usb.h" -#include "usbcfg.h" -#include "usbreg.h" -#include "usbhw.h" -#include "usbcore.h" -#include "usbuser.h" - -#if defined ( __CC_ARM__ ) -#pragma diag_suppress 1441 -#endif - - -#define EP_MSK_CTRL 0x0001 /* Control Endpoint Logical Address Mask */ -#define EP_MSK_BULK 0xC924 /* Bulk Endpoint Logical Address Mask */ -#define EP_MSK_INT 0x4492 /* Interrupt Endpoint Logical Address Mask */ -#define EP_MSK_ISO 0x1248 /* Isochronous Endpoint Logical Address Mask */ - - -#if USB_DMA - -#pragma arm section zidata = "USB_RAM" -uint32_t UDCA[USB_EP_NUM]; /* UDCA in USB RAM */ -uint32_t DD_NISO_Mem[4*DD_NISO_CNT]; /* Non-Iso DMA Descriptor Memory */ -uint32_t DD_ISO_Mem [5*DD_ISO_CNT]; /* Iso DMA Descriptor Memory */ -#pragma arm section zidata -uint32_t udca[USB_EP_NUM]; /* UDCA saved values */ - -uint32_t DDMemMap[2]; /* DMA Descriptor Memory Usage */ - -#endif - - -/* - * Get Endpoint Physical Address - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * Return Value: Endpoint Physical Address - */ - -uint32_t EPAdr (uint32_t EPNum) { - uint32_t val; - - val = (EPNum & 0x0F) << 1; - if (EPNum & 0x80) { - val += 1; - } - return (val); -} - - -/* - * Write Command - * Parameters: cmd: Command - * Return Value: None - */ - -void WrCmd (uint32_t cmd) { - - USB->USBDevIntClr = CCEMTY_INT; - USB->USBCmdCode = cmd; - while ((USB->USBDevIntSt & CCEMTY_INT) == 0); -} - - -/* - * Write Command Data - * Parameters: cmd: Command - * val: Data - * Return Value: None - */ - -void WrCmdDat (uint32_t cmd, uint32_t val) { - - USB->USBDevIntClr = CCEMTY_INT; - USB->USBCmdCode = cmd; - while ((USB->USBDevIntSt & CCEMTY_INT) == 0); - USB->USBDevIntClr = CCEMTY_INT; - USB->USBCmdCode = val; - while ((USB->USBDevIntSt & CCEMTY_INT) == 0); -} - - -/* - * Write Command to Endpoint - * Parameters: cmd: Command - * val: Data - * Return Value: None - */ - -void WrCmdEP (uint32_t EPNum, uint32_t cmd){ - - USB->USBDevIntClr = CCEMTY_INT; - USB->USBCmdCode = CMD_SEL_EP(EPAdr(EPNum)); - while ((USB->USBDevIntSt & CCEMTY_INT) == 0); - USB->USBDevIntClr = CCEMTY_INT; - USB->USBCmdCode = cmd; - while ((USB->USBDevIntSt & CCEMTY_INT) == 0); -} - - -/* - * Read Command Data - * Parameters: cmd: Command - * Return Value: Data Value - */ - -uint32_t RdCmdDat (uint32_t cmd) { - - USB->USBDevIntClr = CCEMTY_INT | CDFULL_INT; - USB->USBCmdCode = cmd; - while ((USB->USBDevIntSt & CDFULL_INT) == 0); - return (USB->USBCmdData); -} - - -/* - * USB Initialize Function - * Called by the User to initialize USB - * Return Value: None - */ - -void USB_Init (void) { - - PINCON->PINSEL1 &= ~((3<<26)|(3<<28)); /* P0.29 D+, P0.30 D- */ - PINCON->PINSEL1 |= ((1<<26)|(1<<28)); /* PINSEL1 26.27, 28.29 = 01 */ - - PINCON->PINSEL3 &= ~((3<< 4)|(3<<28)); /* P1.18 GoodLink, P1.30 VBUS */ - PINCON->PINSEL3 |= ((1<< 4)|(2<<28)); /* PINSEL3 4.5 = 01, 28.29 = 10 */ - - PINCON->PINSEL4 &= ~((3<<18) ); /* P2.9 SoftConnect */ - PINCON->PINSEL4 |= ((1<<18) ); /* PINSEL4 18.19 = 01 */ - - SC->PCONP |= (1UL<<31); /* USB PCLK -> enable USB Per. */ - - USB->USBClkCtrl = 0x1A; /* Dev, PortSel, AHB clock enable */ - while ((USB->USBClkSt & 0x1A) != 0x1A); - - NVIC_EnableIRQ(USB_IRQn); /* enable USB interrupt */ - - USB_Reset(); - USB_SetAddress(0); -} - - -/* - * USB Connect Function - * Called by the User to Connect/Disconnect USB - * Parameters: con: Connect/Disconnect - * Return Value: None - */ - -void USB_Connect (uint32_t con) { - WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(con ? DEV_CON : 0)); -} - - -/* - * USB Reset Function - * Called automatically on USB Reset - * Return Value: None - */ - -void USB_Reset (void) { -#if USB_DMA - uint32_t n; -#endif - - USB->USBEpInd = 0; - USB->USBMaxPSize = USB_MAX_PACKET0; - USB->USBEpInd = 1; - USB->USBMaxPSize = USB_MAX_PACKET0; - while ((USB->USBDevIntSt & EP_RLZED_INT) == 0); - - USB->USBEpIntClr = 0xFFFFFFFF; - USB->USBEpIntEn = 0xFFFFFFFF ^ USB_DMA_EP; - USB->USBDevIntClr = 0xFFFFFFFF; - USB->USBDevIntEn = DEV_STAT_INT | EP_SLOW_INT | - (USB_SOF_EVENT ? FRAME_INT : 0) | - (USB_ERROR_EVENT ? ERR_INT : 0); - -#if USB_DMA - USB->USBUDCAH = USB_RAM_ADR; - USB->USBDMARClr = 0xFFFFFFFF; - USB->USBEpDMADis = 0xFFFFFFFF; - USB->USBEpDMAEn = USB_DMA_EP; - USB->USBEoTIntClr = 0xFFFFFFFF; - USB->USBNDDRIntClr = 0xFFFFFFFF; - USB->USBSysErrIntClr = 0xFFFFFFFF; - USB->USBDMAIntEn = 0x00000007; - DDMemMap[0] = 0x00000000; - DDMemMap[1] = 0x00000000; - for (n = 0; n < USB_EP_NUM; n++) { - udca[n] = 0; - UDCA[n] = 0; - } -#endif -} - - -/* - * USB Suspend Function - * Called automatically on USB Suspend - * Return Value: None - */ - -void USB_Suspend (void) { - /* Performed by Hardware */ -} - - -/* - * USB Resume Function - * Called automatically on USB Resume - * Return Value: None - */ - -void USB_Resume (void) { - /* Performed by Hardware */ -} - - -/* - * USB Remote Wakeup Function - * Called automatically on USB Remote Wakeup - * Return Value: None - */ - -void USB_WakeUp (void) { - - if (USB_DeviceStatus & USB_GETSTATUS_REMOTE_WAKEUP) { - WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(DEV_CON)); - } -} - - -/* - * USB Remote Wakeup Configuration Function - * Parameters: cfg: Enable/Disable - * Return Value: None - */ - -void USB_WakeUpCfg (uint32_t cfg) { - /* Not needed */ -} - - -/* - * USB Set Address Function - * Parameters: adr: USB Address - * Return Value: None - */ - -void USB_SetAddress (uint32_t adr) { - WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Don't wait for next */ - WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Setup Status Phase */ -} - - -/* - * USB Configure Function - * Parameters: cfg: Configure/Deconfigure - * Return Value: None - */ - -void USB_Configure (uint32_t cfg) { - - WrCmdDat(CMD_CFG_DEV, DAT_WR_BYTE(cfg ? CONF_DVICE : 0)); - - USB->USBReEp = 0x00000003; - while ((USB->USBDevIntSt & EP_RLZED_INT) == 0); - USB->USBDevIntClr = EP_RLZED_INT; -} - - -/* - * Configure USB Endpoint according to Descriptor - * Parameters: pEPD: Pointer to Endpoint Descriptor - * Return Value: None - */ - -void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) { - uint32_t num; - - num = EPAdr(pEPD->bEndpointAddress); - USB->USBReEp |= (1 << num); - USB->USBEpInd = num; - USB->USBMaxPSize = pEPD->wMaxPacketSize; - while ((USB->USBDevIntSt & EP_RLZED_INT) == 0); - USB->USBDevIntClr = EP_RLZED_INT; -} - - -/* - * Set Direction for USB Control Endpoint - * Parameters: dir: Out (dir == 0), In (dir <> 0) - * Return Value: None - */ - -void USB_DirCtrlEP (uint32_t dir) { - /* Not needed */ -} - - -/* - * Enable USB Endpoint - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * Return Value: None - */ - -void USB_EnableEP (uint32_t EPNum) { - WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0)); -} - - -/* - * Disable USB Endpoint - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * Return Value: None - */ - -void USB_DisableEP (uint32_t EPNum) { - WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_DA)); -} - - -/* - * Reset USB Endpoint - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * Return Value: None - */ - -void USB_ResetEP (uint32_t EPNum) { - WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0)); -} - - -/* - * Set Stall for USB Endpoint - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * Return Value: None - */ - -void USB_SetStallEP (uint32_t EPNum) { - WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_ST)); -} - - -/* - * Clear Stall for USB Endpoint - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * Return Value: None - */ - -void USB_ClrStallEP (uint32_t EPNum) { - WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0)); -} - - -/* - * Clear USB Endpoint Buffer - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * Return Value: None - */ - -void USB_ClearEPBuf (uint32_t EPNum) { - WrCmdEP(EPNum, CMD_CLR_BUF); -} - - -/* - * Read USB Endpoint Data - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * pData: Pointer to Data Buffer - * Return Value: Number of bytes read - */ - -uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData) { - uint32_t cnt, n; - - USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_RD_EN; - - do { - cnt = USB->USBRxPLen; - } while ((cnt & PKT_RDY) == 0); - cnt &= PKT_LNGTH_MASK; - - for (n = 0; n < (cnt + 3) / 4; n++) { - *((__packed uint32_t *)pData) = USB->USBRxData; - pData += 4; - } - USB->USBCtrl = 0; - - if (((EP_MSK_ISO >> EPNum) & 1) == 0) { /* Non-Isochronous Endpoint */ - WrCmdEP(EPNum, CMD_CLR_BUF); - } - - return (cnt); -} - - -/* - * Write USB Endpoint Data - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * pData: Pointer to Data Buffer - * cnt: Number of bytes to write - * Return Value: Number of bytes written - */ - -uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt) { - uint32_t n; - - USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_WR_EN; - - USB->USBTxPLen = cnt; - - for (n = 0; n < (cnt + 3) / 4; n++) { - USB->USBTxData = *((__packed uint32_t *)pData); - pData += 4; - } - USB->USBCtrl = 0; - WrCmdEP(EPNum, CMD_VALID_BUF); - return (cnt); -} - -#if USB_DMA - -/* DMA Descriptor Memory Layout */ -const uint32_t DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR }; -const uint32_t DDSz [2] = { 16, 20 }; - - -/* - * Setup USB DMA Transfer for selected Endpoint - * Parameters: EPNum: Endpoint Number - * pDD: Pointer to DMA Descriptor - * Return Value: TRUE - Success, FALSE - Error - */ - -uint32_t USB_DMA_Setup(uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD) { - uint32_t num, ptr, nxt, iso, n; - - iso = pDD->Cfg.Type.IsoEP; /* Iso or Non-Iso Descriptor */ - num = EPAdr(EPNum); /* Endpoint's Physical Address */ - - ptr = 0; /* Current Descriptor */ - nxt = udca[num]; /* Initial Descriptor */ - while (nxt) { /* Go through Descriptor List */ - ptr = nxt; /* Current Descriptor */ - if (!pDD->Cfg.Type.Link) { /* Check for Linked Descriptors */ - n = (ptr - DDAdr[iso]) / DDSz[iso]; /* Descriptor Index */ - DDMemMap[iso] &= ~(1 << n); /* Unmark Memory Usage */ - } - nxt = *((uint32_t *)ptr); /* Next Descriptor */ - } - - for (n = 0; n < 32; n++) { /* Search for available Memory */ - if ((DDMemMap[iso] & (1 << n)) == 0) { - break; /* Memory found */ - } - } - if (n == 32) return (FALSE); /* Memory not available */ - - DDMemMap[iso] |= 1 << n; /* Mark Memory Usage */ - nxt = DDAdr[iso] + n * DDSz[iso]; /* Next Descriptor */ - - if (ptr && pDD->Cfg.Type.Link) { - *((uint32_t *)(ptr + 0)) = nxt; /* Link in new Descriptor */ - *((uint32_t *)(ptr + 4)) |= 0x00000004; /* Next DD is Valid */ - } else { - udca[num] = nxt; /* Save new Descriptor */ - UDCA[num] = nxt; /* Update UDCA in USB */ - } - - /* Fill in DMA Descriptor */ - *(((uint32_t *)nxt)++) = 0; /* Next DD Pointer */ - *(((uint32_t *)nxt)++) = pDD->Cfg.Type.ATLE | - (pDD->Cfg.Type.IsoEP << 4) | - (pDD->MaxSize << 5) | - (pDD->BufLen << 16); - *(((uint32_t *)nxt)++) = pDD->BufAdr; - *(((uint32_t *)nxt)++) = pDD->Cfg.Type.LenPos << 8; - if (iso) { - *((uint32_t *)nxt) = pDD->InfoAdr; - } - - return (TRUE); /* Success */ -} - - -/* - * Enable USB DMA Endpoint - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * Return Value: None - */ - -void USB_DMA_Enable (uint32_t EPNum) { - USB->USBEpDMAEn = 1 << EPAdr(EPNum); -} - - -/* - * Disable USB DMA Endpoint - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * Return Value: None - */ - -void USB_DMA_Disable (uint32_t EPNum) { - USB->USBEpDMADis = 1 << EPAdr(EPNum); -} - - -/* - * Get USB DMA Endpoint Status - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * Return Value: DMA Status - */ - -uint32_t USB_DMA_Status (uint32_t EPNum) { - uint32_t ptr, val; - - ptr = UDCA[EPAdr(EPNum)]; /* Current Descriptor */ - if (ptr == 0) - return (USB_DMA_INVALID); - - val = *((uint32_t *)(ptr + 3*4)); /* Status Information */ - switch ((val >> 1) & 0x0F) { - case 0x00: /* Not serviced */ - return (USB_DMA_IDLE); - case 0x01: /* Being serviced */ - return (USB_DMA_BUSY); - case 0x02: /* Normal Completition */ - return (USB_DMA_DONE); - case 0x03: /* Data Under Run */ - return (USB_DMA_UNDER_RUN); - case 0x08: /* Data Over Run */ - return (USB_DMA_OVER_RUN); - case 0x09: /* System Error */ - return (USB_DMA_ERROR); - } - - return (USB_DMA_UNKNOWN); -} - - -/* - * Get USB DMA Endpoint Current Buffer Address - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * Return Value: DMA Address (or -1 when DMA is Invalid) - */ - -uint32_t USB_DMA_BufAdr (uint32_t EPNum) { - uint32_t ptr, val; - - ptr = UDCA[EPAdr(EPNum)]; /* Current Descriptor */ - if (ptr == 0) - { - return ((uint32_t)(-1)); /* DMA Invalid */ - } - - val = *((uint32_t *)(ptr + 2*4)); /* Buffer Address */ - return (val); /* Current Address */ -} - - -/* - * Get USB DMA Endpoint Current Buffer Count - * Number of transfered Bytes or Iso Packets - * Parameters: EPNum: Endpoint Number - * EPNum.0..3: Address - * EPNum.7: Dir - * Return Value: DMA Count (or -1 when DMA is Invalid) - */ - -uint32_t USB_DMA_BufCnt (uint32_t EPNum) { - uint32_t ptr, val; - - ptr = UDCA[EPAdr(EPNum)]; /* Current Descriptor */ - if (ptr == 0) - { - return ((uint32_t)(-1)); /* DMA Invalid */ - } - val = *((uint32_t *)(ptr + 3*4)); /* Status Information */ - return (val >> 16); /* Current Count */ -} - - -#endif /* USB_DMA */ - - -/* - * Get USB Last Frame Number - * Parameters: None - * Return Value: Frame Number - */ - -uint32_t USB_GetFrame (void) { - uint32_t val; - - WrCmd(CMD_RD_FRAME); - val = RdCmdDat(DAT_RD_FRAME); - val = val | (RdCmdDat(DAT_RD_FRAME) << 8); - - return (val); -} - - -/* - * USB Interrupt Service Routine - */ - -void USB_IRQHandler (void) { - uint32_t disr, val, n, m; - uint32_t episr, episrCur; - - disr = USB->USBDevIntSt; /* Device Interrupt Status */ - - /* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */ - if (disr & DEV_STAT_INT) { - USB->USBDevIntClr = DEV_STAT_INT; - WrCmd(CMD_GET_DEV_STAT); - val = RdCmdDat(DAT_GET_DEV_STAT); /* Device Status */ - if (val & DEV_RST) { /* Reset */ - USB_Reset(); -#if USB_RESET_EVENT - USB_Reset_Event(); -#endif - } - if (val & DEV_CON_CH) { /* Connect change */ -#if USB_POWER_EVENT - USB_Power_Event(val & DEV_CON); -#endif - } - if (val & DEV_SUS_CH) { /* Suspend/Resume */ - if (val & DEV_SUS) { /* Suspend */ - USB_Suspend(); -#if USB_SUSPEND_EVENT - USB_Suspend_Event(); -#endif - } else { /* Resume */ - USB_Resume(); -#if USB_RESUME_EVENT - USB_Resume_Event(); -#endif - } - } - goto isr_end; - } - -#if USB_SOF_EVENT - /* Start of Frame Interrupt */ - if (disr & FRAME_INT) { - USB_SOF_Event(); - } -#endif - -#if USB_ERROR_EVENT - /* Error Interrupt */ - if (disr & ERR_INT) { - WrCmd(CMD_RD_ERR_STAT); - val = RdCmdDat(DAT_RD_ERR_STAT); - USB_Error_Event(val); - } -#endif - - /* Endpoint's Slow Interrupt */ - if (disr & EP_SLOW_INT) { - episrCur = 0; - episr = USB->USBEpIntSt; - for (n = 0; n < USB_EP_NUM; n++) { /* Check All Endpoints */ - if (episr == episrCur) break; /* break if all EP interrupts handled */ - if (episr & (1 << n)) { - episrCur |= (1 << n); - m = n >> 1; - - USB->USBEpIntClr = (1 << n); - while ((USB->USBDevIntSt & CDFULL_INT) == 0); - val = USB->USBCmdData; - - if ((n & 1) == 0) { /* OUT Endpoint */ - if (n == 0) { /* Control OUT Endpoint */ - if (val & EP_SEL_STP) { /* Setup Packet */ - if (USB_P_EP[0]) { - USB_P_EP[0](USB_EVT_SETUP); - continue; - } - } - } - if (USB_P_EP[m]) { - USB_P_EP[m](USB_EVT_OUT); - } - } else { /* IN Endpoint */ - if (USB_P_EP[m]) { - USB_P_EP[m](USB_EVT_IN); - } - } - } - } - USB->USBDevIntClr = EP_SLOW_INT; - } - -#if USB_DMA - - if (USB->USBDMAIntSt & 0x00000001) { /* End of Transfer Interrupt */ - val = USB->USBEoTIntSt; - for (n = 2; n < USB_EP_NUM; n++) { /* Check All Endpoints */ - if (val & (1 << n)) { - m = n >> 1; - if ((n & 1) == 0) { /* OUT Endpoint */ - if (USB_P_EP[m]) { - USB_P_EP[m](USB_EVT_OUT_DMA_EOT); - } - } else { /* IN Endpoint */ - if (USB_P_EP[m]) { - USB_P_EP[m](USB_EVT_IN_DMA_EOT); - } - } - } - } - USB->USBEoTIntClr = val; - } - - if (USB->USBDMAIntSt & 0x00000002) { /* New DD Request Interrupt */ - val = USB->USBNDDRIntSt; - for (n = 2; n < USB_EP_NUM; n++) { /* Check All Endpoints */ - if (val & (1 << n)) { - m = n >> 1; - if ((n & 1) == 0) { /* OUT Endpoint */ - if (USB_P_EP[m]) { - USB_P_EP[m](USB_EVT_OUT_DMA_NDR); - } - } else { /* IN Endpoint */ - if (USB_P_EP[m]) { - USB_P_EP[m](USB_EVT_IN_DMA_NDR); - } - } - } - } - USB->USBNDDRIntClr = val; - } - - if (USB->USBDMAIntSt & 0x00000004) { /* System Error Interrupt */ - val = USB->USBSysErrIntSt; - for (n = 2; n < USB_EP_NUM; n++) { /* Check All Endpoints */ - if (val & (1 << n)) { - m = n >> 1; - if ((n & 1) == 0) { /* OUT Endpoint */ - if (USB_P_EP[m]) { - USB_P_EP[m](USB_EVT_OUT_DMA_ERR); - } - } else { /* IN Endpoint */ - if (USB_P_EP[m]) { - USB_P_EP[m](USB_EVT_IN_DMA_ERR); - } - } - } - } - USB->USBSysErrIntClr = val; - } - -#endif /* USB_DMA */ - -isr_end: - return; -} +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: usbhw.c + * Purpose: USB Hardware Layer Module for NXP's LPC17xx MCU + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC family microcontroller devices only. Nothing + * else gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------- + * History: + * V1.20 Added USB_ClearEPBuf + * V1.00 Initial Version + *----------------------------------------------------------------------------*/ +#include /* LPC17xx definitions */ +#include "usb.h" +#include "cfg.h" +#include "reg.h" +#include "hw.h" +#include "core.h" +#include "user.h" + +#if defined ( __CC_ARM__ ) +#pragma diag_suppress 1441 +#endif + + +#define EP_MSK_CTRL 0x0001 /* Control Endpoint Logical Address Mask */ +#define EP_MSK_BULK 0xC924 /* Bulk Endpoint Logical Address Mask */ +#define EP_MSK_INT 0x4492 /* Interrupt Endpoint Logical Address Mask */ +#define EP_MSK_ISO 0x1248 /* Isochronous Endpoint Logical Address Mask */ + + +#if USB_DMA + +#pragma arm section zidata = "USB_RAM" +uint32_t UDCA[USB_EP_NUM]; /* UDCA in USB RAM */ +uint32_t DD_NISO_Mem[4*DD_NISO_CNT]; /* Non-Iso DMA Descriptor Memory */ +uint32_t DD_ISO_Mem [5*DD_ISO_CNT]; /* Iso DMA Descriptor Memory */ +#pragma arm section zidata +uint32_t udca[USB_EP_NUM]; /* UDCA saved values */ + +uint32_t DDMemMap[2]; /* DMA Descriptor Memory Usage */ + +#endif + + +/* + * Get Endpoint Physical Address + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * Return Value: Endpoint Physical Address + */ + +uint32_t EPAdr (uint32_t EPNum) { + uint32_t val; + + val = (EPNum & 0x0F) << 1; + if (EPNum & 0x80) { + val += 1; + } + return (val); +} + + +/* + * Write Command + * Parameters: cmd: Command + * Return Value: None + */ + +void WrCmd (uint32_t cmd) { + + USB->USBDevIntClr = CCEMTY_INT; + USB->USBCmdCode = cmd; + while ((USB->USBDevIntSt & CCEMTY_INT) == 0); +} + + +/* + * Write Command Data + * Parameters: cmd: Command + * val: Data + * Return Value: None + */ + +void WrCmdDat (uint32_t cmd, uint32_t val) { + + USB->USBDevIntClr = CCEMTY_INT; + USB->USBCmdCode = cmd; + while ((USB->USBDevIntSt & CCEMTY_INT) == 0); + USB->USBDevIntClr = CCEMTY_INT; + USB->USBCmdCode = val; + while ((USB->USBDevIntSt & CCEMTY_INT) == 0); +} + + +/* + * Write Command to Endpoint + * Parameters: cmd: Command + * val: Data + * Return Value: None + */ + +void WrCmdEP (uint32_t EPNum, uint32_t cmd){ + + USB->USBDevIntClr = CCEMTY_INT; + USB->USBCmdCode = CMD_SEL_EP(EPAdr(EPNum)); + while ((USB->USBDevIntSt & CCEMTY_INT) == 0); + USB->USBDevIntClr = CCEMTY_INT; + USB->USBCmdCode = cmd; + while ((USB->USBDevIntSt & CCEMTY_INT) == 0); +} + + +/* + * Read Command Data + * Parameters: cmd: Command + * Return Value: Data Value + */ + +uint32_t RdCmdDat (uint32_t cmd) { + + USB->USBDevIntClr = CCEMTY_INT | CDFULL_INT; + USB->USBCmdCode = cmd; + while ((USB->USBDevIntSt & CDFULL_INT) == 0); + return (USB->USBCmdData); +} + + +/* + * USB Initialize Function + * Called by the User to initialize USB + * Return Value: None + */ + +void USB_Init (void) { + + PINCON->PINSEL1 &= ~((3<<26)|(3<<28)); /* P0.29 D+, P0.30 D- */ + PINCON->PINSEL1 |= ((1<<26)|(1<<28)); /* PINSEL1 26.27, 28.29 = 01 */ + + PINCON->PINSEL3 &= ~((3<< 4)|(3<<28)); /* P1.18 GoodLink, P1.30 VBUS */ + PINCON->PINSEL3 |= ((1<< 4)|(2<<28)); /* PINSEL3 4.5 = 01, 28.29 = 10 */ + + PINCON->PINSEL4 &= ~((3<<18) ); /* P2.9 SoftConnect */ + PINCON->PINSEL4 |= ((1<<18) ); /* PINSEL4 18.19 = 01 */ + + SC->PCONP |= (1UL<<31); /* USB PCLK -> enable USB Per. */ + + USB->USBClkCtrl = 0x1A; /* Dev, PortSel, AHB clock enable */ + while ((USB->USBClkSt & 0x1A) != 0x1A); + + NVIC_EnableIRQ(USB_IRQn); /* enable USB interrupt */ + + USB_Reset(); + USB_SetAddress(0); +} + + +/* + * USB Connect Function + * Called by the User to Connect/Disconnect USB + * Parameters: con: Connect/Disconnect + * Return Value: None + */ + +void USB_Connect (uint32_t con) { + WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(con ? DEV_CON : 0)); +} + + +/* + * USB Reset Function + * Called automatically on USB Reset + * Return Value: None + */ + +void USB_Reset (void) { +#if USB_DMA + uint32_t n; +#endif + + USB->USBEpInd = 0; + USB->USBMaxPSize = USB_MAX_PACKET0; + USB->USBEpInd = 1; + USB->USBMaxPSize = USB_MAX_PACKET0; + while ((USB->USBDevIntSt & EP_RLZED_INT) == 0); + + USB->USBEpIntClr = 0xFFFFFFFF; + USB->USBEpIntEn = 0xFFFFFFFF ^ USB_DMA_EP; + USB->USBDevIntClr = 0xFFFFFFFF; + USB->USBDevIntEn = DEV_STAT_INT | EP_SLOW_INT | + (USB_SOF_EVENT ? FRAME_INT : 0) | + (USB_ERROR_EVENT ? ERR_INT : 0); + +#if USB_DMA + USB->USBUDCAH = USB_RAM_ADR; + USB->USBDMARClr = 0xFFFFFFFF; + USB->USBEpDMADis = 0xFFFFFFFF; + USB->USBEpDMAEn = USB_DMA_EP; + USB->USBEoTIntClr = 0xFFFFFFFF; + USB->USBNDDRIntClr = 0xFFFFFFFF; + USB->USBSysErrIntClr = 0xFFFFFFFF; + USB->USBDMAIntEn = 0x00000007; + DDMemMap[0] = 0x00000000; + DDMemMap[1] = 0x00000000; + for (n = 0; n < USB_EP_NUM; n++) { + udca[n] = 0; + UDCA[n] = 0; + } +#endif +} + + +/* + * USB Suspend Function + * Called automatically on USB Suspend + * Return Value: None + */ + +void USB_Suspend (void) { + /* Performed by Hardware */ +} + + +/* + * USB Resume Function + * Called automatically on USB Resume + * Return Value: None + */ + +void USB_Resume (void) { + /* Performed by Hardware */ +} + + +/* + * USB Remote Wakeup Function + * Called automatically on USB Remote Wakeup + * Return Value: None + */ + +void USB_WakeUp (void) { + + if (USB_DeviceStatus & USB_GETSTATUS_REMOTE_WAKEUP) { + WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(DEV_CON)); + } +} + + +/* + * USB Remote Wakeup Configuration Function + * Parameters: cfg: Enable/Disable + * Return Value: None + */ + +void USB_WakeUpCfg (uint32_t cfg) { + /* Not needed */ +} + + +/* + * USB Set Address Function + * Parameters: adr: USB Address + * Return Value: None + */ + +void USB_SetAddress (uint32_t adr) { + WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Don't wait for next */ + WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Setup Status Phase */ +} + + +/* + * USB Configure Function + * Parameters: cfg: Configure/Deconfigure + * Return Value: None + */ + +void USB_Configure (uint32_t cfg) { + + WrCmdDat(CMD_CFG_DEV, DAT_WR_BYTE(cfg ? CONF_DVICE : 0)); + + USB->USBReEp = 0x00000003; + while ((USB->USBDevIntSt & EP_RLZED_INT) == 0); + USB->USBDevIntClr = EP_RLZED_INT; +} + + +/* + * Configure USB Endpoint according to Descriptor + * Parameters: pEPD: Pointer to Endpoint Descriptor + * Return Value: None + */ + +void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) { + uint32_t num; + + num = EPAdr(pEPD->bEndpointAddress); + USB->USBReEp |= (1 << num); + USB->USBEpInd = num; + USB->USBMaxPSize = pEPD->wMaxPacketSize; + while ((USB->USBDevIntSt & EP_RLZED_INT) == 0); + USB->USBDevIntClr = EP_RLZED_INT; +} + + +/* + * Set Direction for USB Control Endpoint + * Parameters: dir: Out (dir == 0), In (dir <> 0) + * Return Value: None + */ + +void USB_DirCtrlEP (uint32_t dir) { + /* Not needed */ +} + + +/* + * Enable USB Endpoint + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * Return Value: None + */ + +void USB_EnableEP (uint32_t EPNum) { + WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0)); +} + + +/* + * Disable USB Endpoint + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * Return Value: None + */ + +void USB_DisableEP (uint32_t EPNum) { + WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_DA)); +} + + +/* + * Reset USB Endpoint + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * Return Value: None + */ + +void USB_ResetEP (uint32_t EPNum) { + WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0)); +} + + +/* + * Set Stall for USB Endpoint + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * Return Value: None + */ + +void USB_SetStallEP (uint32_t EPNum) { + WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_ST)); +} + + +/* + * Clear Stall for USB Endpoint + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * Return Value: None + */ + +void USB_ClrStallEP (uint32_t EPNum) { + WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0)); +} + + +/* + * Clear USB Endpoint Buffer + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * Return Value: None + */ + +void USB_ClearEPBuf (uint32_t EPNum) { + WrCmdEP(EPNum, CMD_CLR_BUF); +} + + +/* + * Read USB Endpoint Data + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * pData: Pointer to Data Buffer + * Return Value: Number of bytes read + */ + +uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData) { + uint32_t cnt, n; + + USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_RD_EN; + + do { + cnt = USB->USBRxPLen; + } while ((cnt & PKT_RDY) == 0); + cnt &= PKT_LNGTH_MASK; + + for (n = 0; n < (cnt + 3) / 4; n++) { + *((__packed uint32_t *)pData) = USB->USBRxData; + pData += 4; + } + USB->USBCtrl = 0; + + if (((EP_MSK_ISO >> EPNum) & 1) == 0) { /* Non-Isochronous Endpoint */ + WrCmdEP(EPNum, CMD_CLR_BUF); + } + + return (cnt); +} + + +/* + * Write USB Endpoint Data + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * pData: Pointer to Data Buffer + * cnt: Number of bytes to write + * Return Value: Number of bytes written + */ + +uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt) { + uint32_t n; + + USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_WR_EN; + + USB->USBTxPLen = cnt; + + for (n = 0; n < (cnt + 3) / 4; n++) { + USB->USBTxData = *((__packed uint32_t *)pData); + pData += 4; + } + USB->USBCtrl = 0; + WrCmdEP(EPNum, CMD_VALID_BUF); + return (cnt); +} + +#if USB_DMA + +/* DMA Descriptor Memory Layout */ +const uint32_t DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR }; +const uint32_t DDSz [2] = { 16, 20 }; + + +/* + * Setup USB DMA Transfer for selected Endpoint + * Parameters: EPNum: Endpoint Number + * pDD: Pointer to DMA Descriptor + * Return Value: TRUE - Success, FALSE - Error + */ + +uint32_t USB_DMA_Setup(uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD) { + uint32_t num, ptr, nxt, iso, n; + + iso = pDD->Cfg.Type.IsoEP; /* Iso or Non-Iso Descriptor */ + num = EPAdr(EPNum); /* Endpoint's Physical Address */ + + ptr = 0; /* Current Descriptor */ + nxt = udca[num]; /* Initial Descriptor */ + while (nxt) { /* Go through Descriptor List */ + ptr = nxt; /* Current Descriptor */ + if (!pDD->Cfg.Type.Link) { /* Check for Linked Descriptors */ + n = (ptr - DDAdr[iso]) / DDSz[iso]; /* Descriptor Index */ + DDMemMap[iso] &= ~(1 << n); /* Unmark Memory Usage */ + } + nxt = *((uint32_t *)ptr); /* Next Descriptor */ + } + + for (n = 0; n < 32; n++) { /* Search for available Memory */ + if ((DDMemMap[iso] & (1 << n)) == 0) { + break; /* Memory found */ + } + } + if (n == 32) return (FALSE); /* Memory not available */ + + DDMemMap[iso] |= 1 << n; /* Mark Memory Usage */ + nxt = DDAdr[iso] + n * DDSz[iso]; /* Next Descriptor */ + + if (ptr && pDD->Cfg.Type.Link) { + *((uint32_t *)(ptr + 0)) = nxt; /* Link in new Descriptor */ + *((uint32_t *)(ptr + 4)) |= 0x00000004; /* Next DD is Valid */ + } else { + udca[num] = nxt; /* Save new Descriptor */ + UDCA[num] = nxt; /* Update UDCA in USB */ + } + + /* Fill in DMA Descriptor */ + *(((uint32_t *)nxt)++) = 0; /* Next DD Pointer */ + *(((uint32_t *)nxt)++) = pDD->Cfg.Type.ATLE | + (pDD->Cfg.Type.IsoEP << 4) | + (pDD->MaxSize << 5) | + (pDD->BufLen << 16); + *(((uint32_t *)nxt)++) = pDD->BufAdr; + *(((uint32_t *)nxt)++) = pDD->Cfg.Type.LenPos << 8; + if (iso) { + *((uint32_t *)nxt) = pDD->InfoAdr; + } + + return (TRUE); /* Success */ +} + + +/* + * Enable USB DMA Endpoint + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * Return Value: None + */ + +void USB_DMA_Enable (uint32_t EPNum) { + USB->USBEpDMAEn = 1 << EPAdr(EPNum); +} + + +/* + * Disable USB DMA Endpoint + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * Return Value: None + */ + +void USB_DMA_Disable (uint32_t EPNum) { + USB->USBEpDMADis = 1 << EPAdr(EPNum); +} + + +/* + * Get USB DMA Endpoint Status + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * Return Value: DMA Status + */ + +uint32_t USB_DMA_Status (uint32_t EPNum) { + uint32_t ptr, val; + + ptr = UDCA[EPAdr(EPNum)]; /* Current Descriptor */ + if (ptr == 0) + return (USB_DMA_INVALID); + + val = *((uint32_t *)(ptr + 3*4)); /* Status Information */ + switch ((val >> 1) & 0x0F) { + case 0x00: /* Not serviced */ + return (USB_DMA_IDLE); + case 0x01: /* Being serviced */ + return (USB_DMA_BUSY); + case 0x02: /* Normal Completition */ + return (USB_DMA_DONE); + case 0x03: /* Data Under Run */ + return (USB_DMA_UNDER_RUN); + case 0x08: /* Data Over Run */ + return (USB_DMA_OVER_RUN); + case 0x09: /* System Error */ + return (USB_DMA_ERROR); + } + + return (USB_DMA_UNKNOWN); +} + + +/* + * Get USB DMA Endpoint Current Buffer Address + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * Return Value: DMA Address (or -1 when DMA is Invalid) + */ + +uint32_t USB_DMA_BufAdr (uint32_t EPNum) { + uint32_t ptr, val; + + ptr = UDCA[EPAdr(EPNum)]; /* Current Descriptor */ + if (ptr == 0) + { + return ((uint32_t)(-1)); /* DMA Invalid */ + } + + val = *((uint32_t *)(ptr + 2*4)); /* Buffer Address */ + return (val); /* Current Address */ +} + + +/* + * Get USB DMA Endpoint Current Buffer Count + * Number of transfered Bytes or Iso Packets + * Parameters: EPNum: Endpoint Number + * EPNum.0..3: Address + * EPNum.7: Dir + * Return Value: DMA Count (or -1 when DMA is Invalid) + */ + +uint32_t USB_DMA_BufCnt (uint32_t EPNum) { + uint32_t ptr, val; + + ptr = UDCA[EPAdr(EPNum)]; /* Current Descriptor */ + if (ptr == 0) + { + return ((uint32_t)(-1)); /* DMA Invalid */ + } + val = *((uint32_t *)(ptr + 3*4)); /* Status Information */ + return (val >> 16); /* Current Count */ +} + + +#endif /* USB_DMA */ + + +/* + * Get USB Last Frame Number + * Parameters: None + * Return Value: Frame Number + */ + +uint32_t USB_GetFrame (void) { + uint32_t val; + + WrCmd(CMD_RD_FRAME); + val = RdCmdDat(DAT_RD_FRAME); + val = val | (RdCmdDat(DAT_RD_FRAME) << 8); + + return (val); +} + + +/* + * USB Interrupt Service Routine + */ + +void USB_IRQHandler (void) { + uint32_t disr, val, n, m; + uint32_t episr, episrCur; + + disr = USB->USBDevIntSt; /* Device Interrupt Status */ + + /* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */ + if (disr & DEV_STAT_INT) { + USB->USBDevIntClr = DEV_STAT_INT; + WrCmd(CMD_GET_DEV_STAT); + val = RdCmdDat(DAT_GET_DEV_STAT); /* Device Status */ + if (val & DEV_RST) { /* Reset */ + USB_Reset(); +#if USB_RESET_EVENT + USB_Reset_Event(); +#endif + } + if (val & DEV_CON_CH) { /* Connect change */ +#if USB_POWER_EVENT + USB_Power_Event(val & DEV_CON); +#endif + } + if (val & DEV_SUS_CH) { /* Suspend/Resume */ + if (val & DEV_SUS) { /* Suspend */ + USB_Suspend(); +#if USB_SUSPEND_EVENT + USB_Suspend_Event(); +#endif + } else { /* Resume */ + USB_Resume(); +#if USB_RESUME_EVENT + USB_Resume_Event(); +#endif + } + } + goto isr_end; + } + +#if USB_SOF_EVENT + /* Start of Frame Interrupt */ + if (disr & FRAME_INT) { + USB_SOF_Event(); + } +#endif + +#if USB_ERROR_EVENT + /* Error Interrupt */ + if (disr & ERR_INT) { + WrCmd(CMD_RD_ERR_STAT); + val = RdCmdDat(DAT_RD_ERR_STAT); + USB_Error_Event(val); + } +#endif + + /* Endpoint's Slow Interrupt */ + if (disr & EP_SLOW_INT) { + episrCur = 0; + episr = USB->USBEpIntSt; + for (n = 0; n < USB_EP_NUM; n++) { /* Check All Endpoints */ + if (episr == episrCur) break; /* break if all EP interrupts handled */ + if (episr & (1 << n)) { + episrCur |= (1 << n); + m = n >> 1; + + USB->USBEpIntClr = (1 << n); + while ((USB->USBDevIntSt & CDFULL_INT) == 0); + val = USB->USBCmdData; + + if ((n & 1) == 0) { /* OUT Endpoint */ + if (n == 0) { /* Control OUT Endpoint */ + if (val & EP_SEL_STP) { /* Setup Packet */ + if (USB_P_EP[0]) { + USB_P_EP[0](USB_EVT_SETUP); + continue; + } + } + } + if (USB_P_EP[m]) { + USB_P_EP[m](USB_EVT_OUT); + } + } else { /* IN Endpoint */ + if (USB_P_EP[m]) { + USB_P_EP[m](USB_EVT_IN); + } + } + } + } + USB->USBDevIntClr = EP_SLOW_INT; + } + +#if USB_DMA + + if (USB->USBDMAIntSt & 0x00000001) { /* End of Transfer Interrupt */ + val = USB->USBEoTIntSt; + for (n = 2; n < USB_EP_NUM; n++) { /* Check All Endpoints */ + if (val & (1 << n)) { + m = n >> 1; + if ((n & 1) == 0) { /* OUT Endpoint */ + if (USB_P_EP[m]) { + USB_P_EP[m](USB_EVT_OUT_DMA_EOT); + } + } else { /* IN Endpoint */ + if (USB_P_EP[m]) { + USB_P_EP[m](USB_EVT_IN_DMA_EOT); + } + } + } + } + USB->USBEoTIntClr = val; + } + + if (USB->USBDMAIntSt & 0x00000002) { /* New DD Request Interrupt */ + val = USB->USBNDDRIntSt; + for (n = 2; n < USB_EP_NUM; n++) { /* Check All Endpoints */ + if (val & (1 << n)) { + m = n >> 1; + if ((n & 1) == 0) { /* OUT Endpoint */ + if (USB_P_EP[m]) { + USB_P_EP[m](USB_EVT_OUT_DMA_NDR); + } + } else { /* IN Endpoint */ + if (USB_P_EP[m]) { + USB_P_EP[m](USB_EVT_IN_DMA_NDR); + } + } + } + } + USB->USBNDDRIntClr = val; + } + + if (USB->USBDMAIntSt & 0x00000004) { /* System Error Interrupt */ + val = USB->USBSysErrIntSt; + for (n = 2; n < USB_EP_NUM; n++) { /* Check All Endpoints */ + if (val & (1 << n)) { + m = n >> 1; + if ((n & 1) == 0) { /* OUT Endpoint */ + if (USB_P_EP[m]) { + USB_P_EP[m](USB_EVT_OUT_DMA_ERR); + } + } else { /* IN Endpoint */ + if (USB_P_EP[m]) { + USB_P_EP[m](USB_EVT_IN_DMA_ERR); + } + } + } + } + USB->USBSysErrIntClr = val; + } + +#endif /* USB_DMA */ + +isr_end: + return; +} diff --git a/new_cmsis/usb/usbhw.h b/new_cmsis/usb/hw.h similarity index 97% rename from new_cmsis/usb/usbhw.h rename to new_cmsis/usb/hw.h index e3bec8d..7dadecf 100755 --- a/new_cmsis/usb/usbhw.h +++ b/new_cmsis/usb/hw.h @@ -1,112 +1,112 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: usbhw.h - * Purpose: USB Hardware Layer Definitions - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC family microcontroller devices only. Nothing - * else gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------- - * History: - * V1.20 Added USB_ClearEPBuf - * V1.00 Initial Version - *----------------------------------------------------------------------------*/ - -#ifndef __USBHW_H__ -#define __USBHW_H__ -#include "lpc_types.h" - -/* USB RAM Definitions */ -#define USB_RAM_ADR 0x20080000 /* USB RAM Start Address */ -#define USB_RAM_SZ 0x00004000 /* USB RAM Size (4kB) */ - -/* DMA Endpoint Descriptors */ -#define DD_NISO_CNT 16 /* Non-Iso EP DMA Descr. Count (max. 32) */ -#define DD_ISO_CNT 8 /* Iso EP DMA Descriptor Count (max. 32) */ -#define DD_NISO_SZ (DD_NISO_CNT * 16) /* Non-Iso DMA Descr. Size */ -#define DD_ISO_SZ (DD_ISO_CNT * 20) /* Iso DMA Descriptor Size */ -#define DD_NISO_ADR (USB_RAM_ADR + 128) /* Non-Iso DMA Descr. Address */ -#define DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ) /* Iso DMA Descr. Address */ -#define DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ) /* Descr. Size */ - -/* DMA Buffer Memory Definitions */ -#define DMA_BUF_ADR (USB_RAM_ADR + DD_SZ) /* DMA Buffer Start Address */ -#define DMA_BUF_SZ (USB_RAM_SZ - DD_SZ) /* DMA Buffer Size */ - -/* USB Error Codes */ -#define USB_ERR_PID 0x0001 /* PID Error */ -#define USB_ERR_UEPKT 0x0002 /* Unexpected Packet */ -#define USB_ERR_DCRC 0x0004 /* Data CRC Error */ -#define USB_ERR_TIMOUT 0x0008 /* Bus Time-out Error */ -#define USB_ERR_EOP 0x0010 /* End of Packet Error */ -#define USB_ERR_B_OVRN 0x0020 /* Buffer Overrun */ -#define USB_ERR_BTSTF 0x0040 /* Bit Stuff Error */ -#define USB_ERR_TGL 0x0080 /* Toggle Bit Error */ - -/* USB DMA Status Codes */ -#define USB_DMA_INVALID 0x0000 /* DMA Invalid - Not Configured */ -#define USB_DMA_IDLE 0x0001 /* DMA Idle - Waiting for Trigger */ -#define USB_DMA_BUSY 0x0002 /* DMA Busy - Transfer in progress */ -#define USB_DMA_DONE 0x0003 /* DMA Transfer Done (no Errors)*/ -#define USB_DMA_OVER_RUN 0x0004 /* Data Over Run */ -#define USB_DMA_UNDER_RUN 0x0005 /* Data Under Run (Short Packet) */ -#define USB_DMA_ERROR 0x0006 /* Error */ -#define USB_DMA_UNKNOWN 0xFFFF /* Unknown State */ - -/* USB DMA Descriptor */ -typedef struct _USB_DMA_DESCRIPTOR { - uint32_t BufAdr; /* DMA Buffer Address */ - uint16_t BufLen; /* DMA Buffer Length */ - uint16_t MaxSize; /* Maximum Packet Size */ - uint32_t InfoAdr; /* Packet Info Memory Address */ - union { /* DMA Configuration */ - struct { - uint32_t Link : 1; /* Link to existing Descriptors */ - uint32_t IsoEP : 1; /* Isonchronous Endpoint */ - uint32_t ATLE : 1; /* ATLE (Auto Transfer Length Extract) */ - uint32_t Rsrvd : 5; /* Reserved */ - uint32_t LenPos : 8; /* Length Position (ATLE) */ - } Type; - uint32_t Val; - } Cfg; -} USB_DMA_DESCRIPTOR; - -/* USB Hardware Functions */ -extern void USB_Init (void); -extern void USB_Connect (uint32_t con); -extern void USB_Reset (void); -extern void USB_Suspend (void); -extern void USB_Resume (void); -extern void USB_WakeUp (void); -extern void USB_WakeUpCfg (uint32_t cfg); -extern void USB_SetAddress (uint32_t adr); -extern void USB_Configure (uint32_t cfg); -extern void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD); -extern void USB_DirCtrlEP (uint32_t dir); -extern void USB_EnableEP (uint32_t EPNum); -extern void USB_DisableEP (uint32_t EPNum); -extern void USB_ResetEP (uint32_t EPNum); -extern void USB_SetStallEP (uint32_t EPNum); -extern void USB_ClrStallEP (uint32_t EPNum); -extern void USB_ClearEPBuf (uint32_t EPNum); -extern uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData); -extern uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt); -extern uint32_t USB_DMA_Setup (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD); -extern void USB_DMA_Enable (uint32_t EPNum); -extern void USB_DMA_Disable(uint32_t EPNum); -extern uint32_t USB_DMA_Status (uint32_t EPNum); -extern uint32_t USB_DMA_BufAdr (uint32_t EPNum); -extern uint32_t USB_DMA_BufCnt (uint32_t EPNum); -extern uint32_t USB_GetFrame (void); -extern void USB_IRQHandler (void); - - -#endif /* __USBHW_H__ */ +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: usbhw.h + * Purpose: USB Hardware Layer Definitions + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC family microcontroller devices only. Nothing + * else gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------- + * History: + * V1.20 Added USB_ClearEPBuf + * V1.00 Initial Version + *----------------------------------------------------------------------------*/ + +#ifndef __USBHW_H__ +#define __USBHW_H__ +#include "lpc_types.h" + +/* USB RAM Definitions */ +#define USB_RAM_ADR 0x20080000 /* USB RAM Start Address */ +#define USB_RAM_SZ 0x00004000 /* USB RAM Size (4kB) */ + +/* DMA Endpoint Descriptors */ +#define DD_NISO_CNT 16 /* Non-Iso EP DMA Descr. Count (max. 32) */ +#define DD_ISO_CNT 8 /* Iso EP DMA Descriptor Count (max. 32) */ +#define DD_NISO_SZ (DD_NISO_CNT * 16) /* Non-Iso DMA Descr. Size */ +#define DD_ISO_SZ (DD_ISO_CNT * 20) /* Iso DMA Descriptor Size */ +#define DD_NISO_ADR (USB_RAM_ADR + 128) /* Non-Iso DMA Descr. Address */ +#define DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ) /* Iso DMA Descr. Address */ +#define DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ) /* Descr. Size */ + +/* DMA Buffer Memory Definitions */ +#define DMA_BUF_ADR (USB_RAM_ADR + DD_SZ) /* DMA Buffer Start Address */ +#define DMA_BUF_SZ (USB_RAM_SZ - DD_SZ) /* DMA Buffer Size */ + +/* USB Error Codes */ +#define USB_ERR_PID 0x0001 /* PID Error */ +#define USB_ERR_UEPKT 0x0002 /* Unexpected Packet */ +#define USB_ERR_DCRC 0x0004 /* Data CRC Error */ +#define USB_ERR_TIMOUT 0x0008 /* Bus Time-out Error */ +#define USB_ERR_EOP 0x0010 /* End of Packet Error */ +#define USB_ERR_B_OVRN 0x0020 /* Buffer Overrun */ +#define USB_ERR_BTSTF 0x0040 /* Bit Stuff Error */ +#define USB_ERR_TGL 0x0080 /* Toggle Bit Error */ + +/* USB DMA Status Codes */ +#define USB_DMA_INVALID 0x0000 /* DMA Invalid - Not Configured */ +#define USB_DMA_IDLE 0x0001 /* DMA Idle - Waiting for Trigger */ +#define USB_DMA_BUSY 0x0002 /* DMA Busy - Transfer in progress */ +#define USB_DMA_DONE 0x0003 /* DMA Transfer Done (no Errors)*/ +#define USB_DMA_OVER_RUN 0x0004 /* Data Over Run */ +#define USB_DMA_UNDER_RUN 0x0005 /* Data Under Run (Short Packet) */ +#define USB_DMA_ERROR 0x0006 /* Error */ +#define USB_DMA_UNKNOWN 0xFFFF /* Unknown State */ + +/* USB DMA Descriptor */ +typedef struct _USB_DMA_DESCRIPTOR { + uint32_t BufAdr; /* DMA Buffer Address */ + uint16_t BufLen; /* DMA Buffer Length */ + uint16_t MaxSize; /* Maximum Packet Size */ + uint32_t InfoAdr; /* Packet Info Memory Address */ + union { /* DMA Configuration */ + struct { + uint32_t Link : 1; /* Link to existing Descriptors */ + uint32_t IsoEP : 1; /* Isonchronous Endpoint */ + uint32_t ATLE : 1; /* ATLE (Auto Transfer Length Extract) */ + uint32_t Rsrvd : 5; /* Reserved */ + uint32_t LenPos : 8; /* Length Position (ATLE) */ + } Type; + uint32_t Val; + } Cfg; +} USB_DMA_DESCRIPTOR; + +/* USB Hardware Functions */ +extern void USB_Init (void); +extern void USB_Connect (uint32_t con); +extern void USB_Reset (void); +extern void USB_Suspend (void); +extern void USB_Resume (void); +extern void USB_WakeUp (void); +extern void USB_WakeUpCfg (uint32_t cfg); +extern void USB_SetAddress (uint32_t adr); +extern void USB_Configure (uint32_t cfg); +extern void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD); +extern void USB_DirCtrlEP (uint32_t dir); +extern void USB_EnableEP (uint32_t EPNum); +extern void USB_DisableEP (uint32_t EPNum); +extern void USB_ResetEP (uint32_t EPNum); +extern void USB_SetStallEP (uint32_t EPNum); +extern void USB_ClrStallEP (uint32_t EPNum); +extern void USB_ClearEPBuf (uint32_t EPNum); +extern uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData); +extern uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt); +extern uint32_t USB_DMA_Setup (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD); +extern void USB_DMA_Enable (uint32_t EPNum); +extern void USB_DMA_Disable(uint32_t EPNum); +extern uint32_t USB_DMA_Status (uint32_t EPNum); +extern uint32_t USB_DMA_BufAdr (uint32_t EPNum); +extern uint32_t USB_DMA_BufCnt (uint32_t EPNum); +extern uint32_t USB_GetFrame (void); +extern void USB_IRQHandler (void); + + +#endif /* __USBHW_H__ */ diff --git a/new_cmsis/usb/lpc17xx-vcom.inf b/new_cmsis/usb/lpc17xx-vcom.inf deleted file mode 100755 index 82b6b0c..0000000 --- a/new_cmsis/usb/lpc17xx-vcom.inf +++ /dev/null @@ -1,65 +0,0 @@ -; -; Keil - An ARM Company Comunication Device Class driver installation file -; (C)2007 Copyright -; - -[Version] -Signature="$Windows NT$" -Class=Ports -ClassGuid={4D36E978-E325-11CE-BFC1-08002BE10318} -Provider=%Keil% -;LayoutFile=layout.inf -DriverVer=01/06/07 - -[Manufacturer] -%Keil%=DeviceList - -[DestinationDirs] -DefaultDestDir=12 - -[SourceDisksFiles] - -[SourceDisksNames] - -[DeviceList] -%DESCRIPTION%=LPC17xxUSB, USB\VID_1FC9&PID_2002 - -;------------------------------------------------------------------------------ -; Windows 2000/XP Sections -;------------------------------------------------------------------------------ - -[LPC17xxUSB.nt] -include=mdmcpq.inf -CopyFiles=DriverCopyFiles -AddReg=LPC17xxUSB.nt.AddReg - -[DriverCopyFiles] -usbser.sys,,,0x20 - -[LPC17xxUSB.nt.AddReg] -HKR,,DevLoader,,*ntkern -HKR,,NTMPDriver,,usbser.sys -HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" - -[LPC17xxUSB.nt.Services] -include=mdmcpq.inf -AddService=usbser, 0x00000002, DriverService - - -[LPC17xxUSB.nt.HW] -include=mdmcpq.inf - -[DriverService] -DisplayName=%DESCRIPTION% -ServiceType=1 -StartType=3 -ErrorControl=1 -ServiceBinary=%12%\usbser.sys - -;------------------------------------------------------------------------------ -; String Definitions -;------------------------------------------------------------------------------ - -[Strings] -NXP="NXP - Founded by Philips" -DESCRIPTION="LPC17xx USB VCom Port" diff --git a/new_cmsis/usb/lpc17xx_libcfg.h b/new_cmsis/usb/lpc17xx_libcfg.h index 4308dbd..16a8b05 100755 --- a/new_cmsis/usb/lpc17xx_libcfg.h +++ b/new_cmsis/usb/lpc17xx_libcfg.h @@ -1,144 +1,144 @@ -/***********************************************************************//** - * @file lpc17xx_libcfg.h - * @purpose Library configuration file - * @version 2.0 - * @date 21. May. 2010 - * @author NXP MCU SW Application Team - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -#ifndef LPC17XX_LIBCFG_H_ -#define LPC17XX_LIBCFG_H_ - -#include "lpc_types.h" - - -/************************** DEBUG MODE DEFINITIONS *********************************/ -/* Un-comment the line below to compile the library in DEBUG mode, this will expanse - the "CHECK_PARAM" macro in the FW library code */ - -#define DEBUG - - -/******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/ - -/* Comment the line below to disable the specific peripheral inclusion */ - -/* DEBUG_FRAMWORK -------------------- */ -///#define _DBGFWK - -/* GPIO ------------------------------- */ -//#define _GPIO - -/* EXTI ------------------------------- */ -//#define _EXTI - -/* UART ------------------------------- */ -//#define _UART -//#define _UART0 -//#define _UART1 -//#define _UART2 -//#define _UART3 - -/* SPI ------------------------------- */ -//#define _SPI - -/* SYSTICK --------------------------- */ -//#define _SYSTICK - -/* SSP ------------------------------- */ -//#define _SSP -//#define _SSP0 -//#define _SSP1 - - -/* I2C ------------------------------- */ -//#define _I2C -//#define _I2C0 -//#define _I2C1 -//#define _I2C2 - -/* TIMER ------------------------------- */ -//#define _TIM - -/* WDT ------------------------------- */ -//#define _WDT - - -/* GPDMA ------------------------------- */ -//#define _GPDMA - - -/* DAC ------------------------------- */ -//#define _DAC - -/* DAC ------------------------------- */ -//#define _ADC - - -/* PWM ------------------------------- */ -//#define _PWM -//#define _PWM1 - -/* RTC ------------------------------- */ -//#define _RTC - -/* I2S ------------------------------- */ -//#define _I2S - -/* USB device ------------------------------- */ -//#define _USBDEV -//#define _USB_DMA - -/* QEI ------------------------------- */ -//#define _QEI - -/* MCPWM ------------------------------- */ -//#define _MCPWM - -/* CAN--------------------------------*/ -//#define _CAN - -/* RIT ------------------------------- */ -//#define _RIT - -/* EMAC ------------------------------ */ -//#define _EMAC - -/************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/ - -#ifdef DEBUG -/******************************************************************************* -* @brief The CHECK_PARAM macro is used for function's parameters check. -* It is used only if the library is compiled in DEBUG mode. -* @param[in] expr - If expr is false, it calls check_failed() function -* which reports the name of the source file and the source -* line number of the call that failed. -* - If expr is true, it returns no value. -* @return None -*******************************************************************************/ -#define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__)) -#else -#define CHECK_PARAM(expr) -#endif /* DEBUG */ - - - -/************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/ - -#ifdef DEBUG -void check_failed(uint8_t *file, uint32_t line); -#endif - - -#endif /* LPC17XX_LIBCFG_H_ */ +/***********************************************************************//** + * @file lpc17xx_libcfg.h + * @purpose Library configuration file + * @version 2.0 + * @date 21. May. 2010 + * @author NXP MCU SW Application Team + ************************************************************************** + * Software that is described herein is for illustrative purposes only + * which provides customers with programming information regarding the + * products. This software is supplied "AS IS" without any warranties. + * NXP Semiconductors assumes no responsibility or liability for the + * use of the software, conveys no license or title under any patent, + * copyright, or mask work right to the product. NXP Semiconductors + * reserves the right to make changes in the software without + * notification. NXP Semiconductors also make no representation or + * warranty that such application will be suitable for the specified + * use without further testing or modification. + **************************************************************************/ + +#ifndef LPC17XX_LIBCFG_H_ +#define LPC17XX_LIBCFG_H_ + +#include "lpc_types.h" + + +/************************** DEBUG MODE DEFINITIONS *********************************/ +/* Un-comment the line below to compile the library in DEBUG mode, this will expanse + the "CHECK_PARAM" macro in the FW library code */ + +#define DEBUG + + +/******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/ + +/* Comment the line below to disable the specific peripheral inclusion */ + +/* DEBUG_FRAMWORK -------------------- */ +///#define _DBGFWK + +/* GPIO ------------------------------- */ +//#define _GPIO + +/* EXTI ------------------------------- */ +//#define _EXTI + +/* UART ------------------------------- */ +//#define _UART +//#define _UART0 +//#define _UART1 +//#define _UART2 +//#define _UART3 + +/* SPI ------------------------------- */ +//#define _SPI + +/* SYSTICK --------------------------- */ +//#define _SYSTICK + +/* SSP ------------------------------- */ +//#define _SSP +//#define _SSP0 +//#define _SSP1 + + +/* I2C ------------------------------- */ +//#define _I2C +//#define _I2C0 +//#define _I2C1 +//#define _I2C2 + +/* TIMER ------------------------------- */ +//#define _TIM + +/* WDT ------------------------------- */ +//#define _WDT + + +/* GPDMA ------------------------------- */ +//#define _GPDMA + + +/* DAC ------------------------------- */ +//#define _DAC + +/* DAC ------------------------------- */ +//#define _ADC + + +/* PWM ------------------------------- */ +//#define _PWM +//#define _PWM1 + +/* RTC ------------------------------- */ +//#define _RTC + +/* I2S ------------------------------- */ +//#define _I2S + +/* USB device ------------------------------- */ +//#define _USBDEV +//#define _USB_DMA + +/* QEI ------------------------------- */ +//#define _QEI + +/* MCPWM ------------------------------- */ +//#define _MCPWM + +/* CAN--------------------------------*/ +//#define _CAN + +/* RIT ------------------------------- */ +//#define _RIT + +/* EMAC ------------------------------ */ +//#define _EMAC + +/************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/ + +#ifdef DEBUG +/******************************************************************************* +* @brief The CHECK_PARAM macro is used for function's parameters check. +* It is used only if the library is compiled in DEBUG mode. +* @param[in] expr - If expr is false, it calls check_failed() function +* which reports the name of the source file and the source +* line number of the call that failed. +* - If expr is true, it returns no value. +* @return None +*******************************************************************************/ +#define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__)) +#else +#define CHECK_PARAM(expr) +#endif /* DEBUG */ + + + +/************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/ + +#ifdef DEBUG +void check_failed(uint8_t *file, uint32_t line); +#endif + + +#endif /* LPC17XX_LIBCFG_H_ */ diff --git a/new_cmsis/usb/lpc_types.h b/new_cmsis/usb/lpc_types.h index 9cfb3be..d24a9f5 100755 --- a/new_cmsis/usb/lpc_types.h +++ b/new_cmsis/usb/lpc_types.h @@ -1,196 +1,196 @@ -/***********************************************************************//** - * @file lpc_types.h - * @brief Contains the NXP ABL typedefs for C standard types. - * It is intended to be used in ISO C conforming development - * environments and checks for this insofar as it is possible - * to do so. - * @version 1.0 - * @date 27 Jul. 2008 - * @author wellsk - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Type group ----------------------------------------------------------- */ -/** @defgroup LPC_Types LPC_Types - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC_TYPES_H -#define LPC_TYPES_H - -/* Includes ------------------------------------------------------------------- */ -#include - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup LPC_Types_Public_Types LPC_Types Public Types - * @{ - */ - -/** - * @brief Boolean Type definition - */ -typedef enum {FALSE = 0, TRUE = !FALSE} Bool; - -/** - * @brief Flag Status and Interrupt Flag Status type definition - */ -typedef enum {RESET = 0, SET = !RESET} FlagStatus, IntStatus, SetState; -#define PARAM_SETSTATE(State) ((State==RESET) || (State==SET)) - -/** - * @brief Functional State Definition - */ -typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; -#define PARAM_FUNCTIONALSTATE(State) ((State==DISABLE) || (State==ENABLE)) - -/** - * @ Status type definition - */ -typedef enum {ERROR = 0, SUCCESS = !ERROR} Status; - - -/** - * Read/Write transfer type mode (Block or non-block) - */ -typedef enum -{ - NONE_BLOCKING = 0, /**< None Blocking type */ - BLOCKING, /**< Blocking type */ -} TRANSFER_BLOCK_Type; - - -/** Pointer to Function returning Void (any number of parameters) */ -typedef void (*PFV)(); - -/** Pointer to Function returning int32_t (any number of parameters) */ -typedef int32_t(*PFI)(); - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup LPC_Types_Public_Macros LPC_Types Public Macros - * @{ - */ - -/* _BIT(n) sets the bit at position "n" - * _BIT(n) is intended to be used in "OR" and "AND" expressions: - * e.g., "(_BIT(3) | _BIT(7))". - */ -#undef _BIT -/* Set bit macro */ -#define _BIT(n) (1< = (any_expression) & _BITMASK(x), where 0 < x <= 32. - * If "any_expression" results in a value that is larger than can be - * contained in 'x' bits, the bits above 'x - 1' are masked off. When - * used with the _SBF example above, the example would be written: - * a_reg = ((_SBF(5,7) | _SBF(12,0xF)) & _BITMASK(16)) - * This ensures that the value written to a_reg is no wider than - * 16 bits, and makes the code easier to read and understand. - */ -#undef _BITMASK -/* Bitmask creation macro */ -#define _BITMASK(field_width) ( _BIT(field_width) - 1) - -/* NULL pointer */ -#ifndef NULL -#define NULL ((void*) 0) -#endif - -/* Number of elements in an array */ -#define NELEMENTS(array) (sizeof (array) / sizeof (array[0])) - -/* Static data/function define */ -#define STATIC static -/* External data/function define */ -#define EXTERN extern - -#define MAX(a, b) (((a) > (b)) ? (a) : (b)) -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) - -/** - * @} - */ - - -/* Old Type Definition compatibility ------------------------------------------ */ -/** @addtogroup LPC_Types_Public_Types LPC_Types Public Types - * @{ - */ - -/** SMA type for character type */ -typedef char CHAR; - -/** SMA type for 8 bit unsigned value */ -typedef uint8_t UNS_8; - -/** SMA type for 8 bit signed value */ -typedef int8_t INT_8; - -/** SMA type for 16 bit unsigned value */ -typedef uint16_t UNS_16; - -/** SMA type for 16 bit signed value */ -typedef int16_t INT_16; - -/** SMA type for 32 bit unsigned value */ -typedef uint32_t UNS_32; - -/** SMA type for 32 bit signed value */ -typedef int32_t INT_32; - -/** SMA type for 64 bit signed value */ -typedef int64_t INT_64; - -/** SMA type for 64 bit unsigned value */ -typedef uint64_t UNS_64; - -/** 32 bit boolean type */ -typedef Bool BOOL_32; - -/** 16 bit boolean type */ -typedef Bool BOOL_16; - -/** 8 bit boolean type */ -typedef Bool BOOL_8; - -/** - * @} - */ - - -#endif /* LPC_TYPES_H */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ +/***********************************************************************//** + * @file lpc_types.h + * @brief Contains the NXP ABL typedefs for C standard types. + * It is intended to be used in ISO C conforming development + * environments and checks for this insofar as it is possible + * to do so. + * @version 1.0 + * @date 27 Jul. 2008 + * @author wellsk + ************************************************************************** + * Software that is described herein is for illustrative purposes only + * which provides customers with programming information regarding the + * products. This software is supplied "AS IS" without any warranties. + * NXP Semiconductors assumes no responsibility or liability for the + * use of the software, conveys no license or title under any patent, + * copyright, or mask work right to the product. NXP Semiconductors + * reserves the right to make changes in the software without + * notification. NXP Semiconductors also make no representation or + * warranty that such application will be suitable for the specified + * use without further testing or modification. + **************************************************************************/ + +/* Type group ----------------------------------------------------------- */ +/** @defgroup LPC_Types LPC_Types + * @ingroup LPC1700CMSIS_FwLib_Drivers + * @{ + */ + +#ifndef LPC_TYPES_H +#define LPC_TYPES_H + +/* Includes ------------------------------------------------------------------- */ +#include + + +/* Public Types --------------------------------------------------------------- */ +/** @defgroup LPC_Types_Public_Types LPC_Types Public Types + * @{ + */ + +/** + * @brief Boolean Type definition + */ +typedef enum {FALSE = 0, TRUE = !FALSE} Bool; + +/** + * @brief Flag Status and Interrupt Flag Status type definition + */ +typedef enum {RESET = 0, SET = !RESET} FlagStatus, IntStatus, SetState; +#define PARAM_SETSTATE(State) ((State==RESET) || (State==SET)) + +/** + * @brief Functional State Definition + */ +typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; +#define PARAM_FUNCTIONALSTATE(State) ((State==DISABLE) || (State==ENABLE)) + +/** + * @ Status type definition + */ +typedef enum {ERROR = 0, SUCCESS = !ERROR} Status; + + +/** + * Read/Write transfer type mode (Block or non-block) + */ +typedef enum +{ + NONE_BLOCKING = 0, /**< None Blocking type */ + BLOCKING, /**< Blocking type */ +} TRANSFER_BLOCK_Type; + + +/** Pointer to Function returning Void (any number of parameters) */ +typedef void (*PFV)(); + +/** Pointer to Function returning int32_t (any number of parameters) */ +typedef int32_t(*PFI)(); + +/** + * @} + */ + + +/* Public Macros -------------------------------------------------------------- */ +/** @defgroup LPC_Types_Public_Macros LPC_Types Public Macros + * @{ + */ + +/* _BIT(n) sets the bit at position "n" + * _BIT(n) is intended to be used in "OR" and "AND" expressions: + * e.g., "(_BIT(3) | _BIT(7))". + */ +#undef _BIT +/* Set bit macro */ +#define _BIT(n) (1< = (any_expression) & _BITMASK(x), where 0 < x <= 32. + * If "any_expression" results in a value that is larger than can be + * contained in 'x' bits, the bits above 'x - 1' are masked off. When + * used with the _SBF example above, the example would be written: + * a_reg = ((_SBF(5,7) | _SBF(12,0xF)) & _BITMASK(16)) + * This ensures that the value written to a_reg is no wider than + * 16 bits, and makes the code easier to read and understand. + */ +#undef _BITMASK +/* Bitmask creation macro */ +#define _BITMASK(field_width) ( _BIT(field_width) - 1) + +/* NULL pointer */ +#ifndef NULL +#define NULL ((void*) 0) +#endif + +/* Number of elements in an array */ +#define NELEMENTS(array) (sizeof (array) / sizeof (array[0])) + +/* Static data/function define */ +#define STATIC static +/* External data/function define */ +#define EXTERN extern + +#define MAX(a, b) (((a) > (b)) ? (a) : (b)) +#define MIN(a, b) (((a) < (b)) ? (a) : (b)) + +/** + * @} + */ + + +/* Old Type Definition compatibility ------------------------------------------ */ +/** @addtogroup LPC_Types_Public_Types LPC_Types Public Types + * @{ + */ + +/** SMA type for character type */ +typedef char CHAR; + +/** SMA type for 8 bit unsigned value */ +typedef uint8_t UNS_8; + +/** SMA type for 8 bit signed value */ +typedef int8_t INT_8; + +/** SMA type for 16 bit unsigned value */ +typedef uint16_t UNS_16; + +/** SMA type for 16 bit signed value */ +typedef int16_t INT_16; + +/** SMA type for 32 bit unsigned value */ +typedef uint32_t UNS_32; + +/** SMA type for 32 bit signed value */ +typedef int32_t INT_32; + +/** SMA type for 64 bit signed value */ +typedef int64_t INT_64; + +/** SMA type for 64 bit unsigned value */ +typedef uint64_t UNS_64; + +/** 32 bit boolean type */ +typedef Bool BOOL_32; + +/** 16 bit boolean type */ +typedef Bool BOOL_16; + +/** 8 bit boolean type */ +typedef Bool BOOL_8; + +/** + * @} + */ + + +#endif /* LPC_TYPES_H */ + +/** + * @} + */ + +/* --------------------------------- End Of File ------------------------------ */ diff --git a/new_cmsis/usb/usbreg.h b/new_cmsis/usb/reg.h similarity index 97% rename from new_cmsis/usb/usbreg.h rename to new_cmsis/usb/reg.h index fe1d58d..9b2501e 100755 --- a/new_cmsis/usb/usbreg.h +++ b/new_cmsis/usb/reg.h @@ -1,130 +1,130 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: usbreg.h - * Purpose: USB Hardware Layer Definitions for NXP LPC Family MCUs - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC family microcontroller devices only. Nothing - * else gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -#ifndef __USBREG_H -#define __USBREG_H - -/* Device Interrupt Bit Definitions */ -#define FRAME_INT 0x00000001 -#define EP_FAST_INT 0x00000002 -#define EP_SLOW_INT 0x00000004 -#define DEV_STAT_INT 0x00000008 -#define CCEMTY_INT 0x00000010 -#define CDFULL_INT 0x00000020 -#define RxENDPKT_INT 0x00000040 -#define TxENDPKT_INT 0x00000080 -#define EP_RLZED_INT 0x00000100 -#define ERR_INT 0x00000200 - -/* Rx & Tx Packet Length Definitions */ -#define PKT_LNGTH_MASK 0x000003FF -#define PKT_DV 0x00000400 -#define PKT_RDY 0x00000800 - -/* USB Control Definitions */ -#define CTRL_RD_EN 0x00000001 -#define CTRL_WR_EN 0x00000002 - -/* Command Codes */ -#define CMD_SET_ADDR 0x00D00500 -#define CMD_CFG_DEV 0x00D80500 -#define CMD_SET_MODE 0x00F30500 -#define CMD_RD_FRAME 0x00F50500 -#define DAT_RD_FRAME 0x00F50200 -#define CMD_RD_TEST 0x00FD0500 -#define DAT_RD_TEST 0x00FD0200 -#define CMD_SET_DEV_STAT 0x00FE0500 -#define CMD_GET_DEV_STAT 0x00FE0500 -#define DAT_GET_DEV_STAT 0x00FE0200 -#define CMD_GET_ERR_CODE 0x00FF0500 -#define DAT_GET_ERR_CODE 0x00FF0200 -#define CMD_RD_ERR_STAT 0x00FB0500 -#define DAT_RD_ERR_STAT 0x00FB0200 -#define DAT_WR_BYTE(x) (0x00000100 | ((x) << 16)) -#define CMD_SEL_EP(x) (0x00000500 | ((x) << 16)) -#define DAT_SEL_EP(x) (0x00000200 | ((x) << 16)) -#define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16)) -#define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16)) -#define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16)) -#define CMD_CLR_BUF 0x00F20500 -#define DAT_CLR_BUF 0x00F20200 -#define CMD_VALID_BUF 0x00FA0500 - -/* Device Address Register Definitions */ -#define DEV_ADDR_MASK 0x7F -#define DEV_EN 0x80 - -/* Device Configure Register Definitions */ -#define CONF_DVICE 0x01 - -/* Device Mode Register Definitions */ -#define AP_CLK 0x01 -#define INAK_CI 0x02 -#define INAK_CO 0x04 -#define INAK_II 0x08 -#define INAK_IO 0x10 -#define INAK_BI 0x20 -#define INAK_BO 0x40 - -/* Device Status Register Definitions */ -#define DEV_CON 0x01 -#define DEV_CON_CH 0x02 -#define DEV_SUS 0x04 -#define DEV_SUS_CH 0x08 -#define DEV_RST 0x10 - -/* Error Code Register Definitions */ -#define ERR_EC_MASK 0x0F -#define ERR_EA 0x10 - -/* Error Status Register Definitions */ -#define ERR_PID 0x01 -#define ERR_UEPKT 0x02 -#define ERR_DCRC 0x04 -#define ERR_TIMOUT 0x08 -#define ERR_EOP 0x10 -#define ERR_B_OVRN 0x20 -#define ERR_BTSTF 0x40 -#define ERR_TGL 0x80 - -/* Endpoint Select Register Definitions */ -#define EP_SEL_F 0x01 -#define EP_SEL_ST 0x02 -#define EP_SEL_STP 0x04 -#define EP_SEL_PO 0x08 -#define EP_SEL_EPN 0x10 -#define EP_SEL_B_1_FULL 0x20 -#define EP_SEL_B_2_FULL 0x40 - -/* Endpoint Status Register Definitions */ -#define EP_STAT_ST 0x01 -#define EP_STAT_DA 0x20 -#define EP_STAT_RF_MO 0x40 -#define EP_STAT_CND_ST 0x80 - -/* Clear Buffer Register Definitions */ -#define CLR_BUF_PO 0x01 - - -/* DMA Interrupt Bit Definitions */ -#define EOT_INT 0x01 -#define NDD_REQ_INT 0x02 -#define SYS_ERR_INT 0x04 - - -#endif /* __USBREG_H */ +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: usbreg.h + * Purpose: USB Hardware Layer Definitions for NXP LPC Family MCUs + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC family microcontroller devices only. Nothing + * else gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#ifndef __USBREG_H +#define __USBREG_H + +/* Device Interrupt Bit Definitions */ +#define FRAME_INT 0x00000001 +#define EP_FAST_INT 0x00000002 +#define EP_SLOW_INT 0x00000004 +#define DEV_STAT_INT 0x00000008 +#define CCEMTY_INT 0x00000010 +#define CDFULL_INT 0x00000020 +#define RxENDPKT_INT 0x00000040 +#define TxENDPKT_INT 0x00000080 +#define EP_RLZED_INT 0x00000100 +#define ERR_INT 0x00000200 + +/* Rx & Tx Packet Length Definitions */ +#define PKT_LNGTH_MASK 0x000003FF +#define PKT_DV 0x00000400 +#define PKT_RDY 0x00000800 + +/* USB Control Definitions */ +#define CTRL_RD_EN 0x00000001 +#define CTRL_WR_EN 0x00000002 + +/* Command Codes */ +#define CMD_SET_ADDR 0x00D00500 +#define CMD_CFG_DEV 0x00D80500 +#define CMD_SET_MODE 0x00F30500 +#define CMD_RD_FRAME 0x00F50500 +#define DAT_RD_FRAME 0x00F50200 +#define CMD_RD_TEST 0x00FD0500 +#define DAT_RD_TEST 0x00FD0200 +#define CMD_SET_DEV_STAT 0x00FE0500 +#define CMD_GET_DEV_STAT 0x00FE0500 +#define DAT_GET_DEV_STAT 0x00FE0200 +#define CMD_GET_ERR_CODE 0x00FF0500 +#define DAT_GET_ERR_CODE 0x00FF0200 +#define CMD_RD_ERR_STAT 0x00FB0500 +#define DAT_RD_ERR_STAT 0x00FB0200 +#define DAT_WR_BYTE(x) (0x00000100 | ((x) << 16)) +#define CMD_SEL_EP(x) (0x00000500 | ((x) << 16)) +#define DAT_SEL_EP(x) (0x00000200 | ((x) << 16)) +#define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16)) +#define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16)) +#define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16)) +#define CMD_CLR_BUF 0x00F20500 +#define DAT_CLR_BUF 0x00F20200 +#define CMD_VALID_BUF 0x00FA0500 + +/* Device Address Register Definitions */ +#define DEV_ADDR_MASK 0x7F +#define DEV_EN 0x80 + +/* Device Configure Register Definitions */ +#define CONF_DVICE 0x01 + +/* Device Mode Register Definitions */ +#define AP_CLK 0x01 +#define INAK_CI 0x02 +#define INAK_CO 0x04 +#define INAK_II 0x08 +#define INAK_IO 0x10 +#define INAK_BI 0x20 +#define INAK_BO 0x40 + +/* Device Status Register Definitions */ +#define DEV_CON 0x01 +#define DEV_CON_CH 0x02 +#define DEV_SUS 0x04 +#define DEV_SUS_CH 0x08 +#define DEV_RST 0x10 + +/* Error Code Register Definitions */ +#define ERR_EC_MASK 0x0F +#define ERR_EA 0x10 + +/* Error Status Register Definitions */ +#define ERR_PID 0x01 +#define ERR_UEPKT 0x02 +#define ERR_DCRC 0x04 +#define ERR_TIMOUT 0x08 +#define ERR_EOP 0x10 +#define ERR_B_OVRN 0x20 +#define ERR_BTSTF 0x40 +#define ERR_TGL 0x80 + +/* Endpoint Select Register Definitions */ +#define EP_SEL_F 0x01 +#define EP_SEL_ST 0x02 +#define EP_SEL_STP 0x04 +#define EP_SEL_PO 0x08 +#define EP_SEL_EPN 0x10 +#define EP_SEL_B_1_FULL 0x20 +#define EP_SEL_B_2_FULL 0x40 + +/* Endpoint Status Register Definitions */ +#define EP_STAT_ST 0x01 +#define EP_STAT_DA 0x20 +#define EP_STAT_RF_MO 0x40 +#define EP_STAT_CND_ST 0x80 + +/* Clear Buffer Register Definitions */ +#define CLR_BUF_PO 0x01 + + +/* DMA Interrupt Bit Definitions */ +#define EOT_INT 0x01 +#define NDD_REQ_INT 0x02 +#define SYS_ERR_INT 0x04 + + +#endif /* __USBREG_H */ diff --git a/new_cmsis/usb/serial.c b/new_cmsis/usb/serial.c index 938ae18..dd23b26 100755 --- a/new_cmsis/usb/serial.c +++ b/new_cmsis/usb/serial.c @@ -1,404 +1,404 @@ -/*---------------------------------------------------------------------------- - * Name: serial.c - * Purpose: serial port handling for LPC17xx - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC microcontroller devices only. Nothing else - * gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ -#include "../LPC17xx.h" // LPC17xx definitions -#include "lpc_types.h" -#include "serial.h" - - -/*---------------------------------------------------------------------------- - Defines for ring buffers - *---------------------------------------------------------------------------*/ -#define SER_BUF_SIZE (128) // serial buffer in bytes (power 2) -#define SER_BUF_MASK (SER_BUF_SIZE-1ul) // buffer size mask - -/* Buffer read / write macros */ -#define SER_BUF_RESET(serBuf) (serBuf.rdIdx = serBuf.wrIdx = 0) -#define SER_BUF_WR(serBuf, dataIn) (serBuf.data[SER_BUF_MASK & serBuf.wrIdx++] = (dataIn)) -#define SER_BUF_RD(serBuf) (serBuf.data[SER_BUF_MASK & serBuf.rdIdx++]) -#define SER_BUF_EMPTY(serBuf) (serBuf.rdIdx == serBuf.wrIdx) -#define SER_BUF_FULL(serBuf) (serBuf.rdIdx == serBuf.wrIdx+1) -#define SER_BUF_COUNT(serBuf) (SER_BUF_MASK & (serBuf.wrIdx - serBuf.rdIdx)) - -// buffer type -typedef struct __SER_BUF_T { - unsigned char data[SER_BUF_SIZE]; - unsigned int wrIdx; - unsigned int rdIdx; -} SER_BUF_T; - -unsigned long ser_txRestart; // NZ if TX restart is required -unsigned short ser_lineState; // ((msr << 8) | (lsr)) -SER_BUF_T ser_out; // Serial data buffers -SER_BUF_T ser_in; - -/*---------------------------------------------------------------------------- - open the serial port - *---------------------------------------------------------------------------*/ -void ser_OpenPort (char portNum) { - - if ( portNum == 0 ) - { - /* Port 0 */ - NVIC_DisableIRQ(UART0_IRQn); - PINCON->PINSEL0 &= ~0x000000F0; - PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2 */ - } - else - { - /* Port 1 */ - NVIC_DisableIRQ(UART1_IRQn); - PINCON->PINSEL4 &= ~0x0000000F; - PINCON->PINSEL4 |= 0x0000000A; /* Enable RxD1 P2.1, TxD1 P2.0 */ - } - return; -} - -/*---------------------------------------------------------------------------- - close the serial port - *---------------------------------------------------------------------------*/ -void ser_ClosePort (char portNum ) { - if ( portNum == 0 ) - { - /* POrt 0 */ - PINCON->PINSEL0 &= ~0x000000F0; - /* Disable the interrupt in the VIC and UART controllers */ - UART0->IER = 0; - NVIC_DisableIRQ(UART0_IRQn); - } - else - { - /* Port 1 */ - PINCON->PINSEL4 &= ~0x0000000F; - /* Disable the interrupt in the VIC and UART controllers */ - UART1->IER = 0; - NVIC_DisableIRQ(UART1_IRQn); - } - return; -} - -/*---------------------------------------------------------------------------- - initialize the serial port - *---------------------------------------------------------------------------*/ -void ser_InitPort0 (unsigned long baudrate, unsigned int databits, - unsigned int parity, unsigned int stopbits) { - - unsigned char lcr_p, lcr_s, lcr_d; - unsigned int dll; - unsigned int pclkdiv, pclk; - - switch (databits) { - case 5: // 5 Data bits - lcr_d = 0x00; - break; - case 6: // 6 Data bits - lcr_d = 0x01; - break; - case 7: // 7 Data bits - lcr_d = 0x02; - break; - case 8: // 8 Data bits - default: - lcr_d = 0x03; - break; - } - - switch (stopbits) { - case 1: // 1,5 Stop bits - case 2: // 2 Stop bits - lcr_s = 0x04; - break; - case 0: // 1 Stop bit - default: - lcr_s = 0x00; - break; - } - - switch (parity) { - case 1: // Parity Odd - lcr_p = 0x08; - break; - case 2: // Parity Even - lcr_p = 0x18; - break; - case 3: // Parity Mark - lcr_p = 0x28; - break; - case 4: // Parity Space - lcr_p = 0x38; - break; - case 0: // Parity None - default: - lcr_p = 0x00; - break; - } - - SER_BUF_RESET(ser_out); // reset out buffer - SER_BUF_RESET(ser_in); // reset in buffer - - /* Bit 6~7 is for UART0 */ - pclkdiv = (SC->PCLKSEL0 >> 6) & 0x03; - - switch ( pclkdiv ) - { - case 0x00: - default: - pclk = SystemFrequency/4; - break; - case 0x01: - pclk = SystemFrequency; - break; - case 0x02: - pclk = SystemFrequency/2; - break; - case 0x03: - pclk = SystemFrequency/8; - break; - } - - dll = (pclk/16)/baudrate ; /*baud rate */ - UART0->FDR = 0; // Fractional divider not used - UART0->LCR = 0x80 | lcr_d | lcr_p | lcr_s; // Data bits, Parity, Stop bit - UART0->DLL = dll; // Baud Rate depending on PCLK - UART0->DLM = (dll >> 8); // High divisor latch - UART0->LCR = 0x00 | lcr_d | lcr_p | lcr_s; // DLAB = 0 - UART0->IER = 0x03; // Enable TX/RX interrupts - - UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */ - ser_txRestart = 1; // TX fifo is empty - - /* Enable the UART Interrupt */ - NVIC_EnableIRQ(UART0_IRQn); - return; -} - -/*---------------------------------------------------------------------------- - initialize the serial port - *---------------------------------------------------------------------------*/ -void ser_InitPort1 (unsigned long baudrate, unsigned int databits, - unsigned int parity, unsigned int stopbits) { - - unsigned char lcr_p, lcr_s, lcr_d; - unsigned int dll; - unsigned int pclkdiv, pclk; - - switch (databits) { - case 5: // 5 Data bits - lcr_d = 0x00; - break; - case 6: // 6 Data bits - lcr_d = 0x01; - break; - case 7: // 7 Data bits - lcr_d = 0x02; - break; - case 8: // 8 Data bits - default: - lcr_d = 0x03; - break; - } - - switch (stopbits) { - case 1: // 1,5 Stop bits - case 2: // 2 Stop bits - lcr_s = 0x04; - break; - case 0: // 1 Stop bit - default: - lcr_s = 0x00; - break; - } - - switch (parity) { - case 1: // Parity Odd - lcr_p = 0x08; - break; - case 2: // Parity Even - lcr_p = 0x18; - break; - case 3: // Parity Mark - lcr_p = 0x28; - break; - case 4: // Parity Space - lcr_p = 0x38; - break; - case 0: // Parity None - default: - lcr_p = 0x00; - break; - } - - SER_BUF_RESET(ser_out); // reset out buffer - SER_BUF_RESET(ser_in); // reset in buffer - - /* Bit 8,9 are for UART1 */ - pclkdiv = (SC->PCLKSEL0 >> 8) & 0x03; - - switch ( pclkdiv ) - { - case 0x00: - default: - pclk = SystemFrequency/4; - break; - case 0x01: - pclk = SystemFrequency; - break; - case 0x02: - pclk = SystemFrequency/2; - break; - case 0x03: - pclk = SystemFrequency/8; - break; - } - - dll = (pclk/16)/baudrate ; /*baud rate */ - UART1->FDR = 0; // Fractional divider not used - UART1->LCR = 0x80 | lcr_d | lcr_p | lcr_s; // Data bits, Parity, Stop bit - UART1->DLL = dll; // Baud Rate depending on PCLK - UART1->DLM = (dll >> 8); // High divisor latch - UART1->LCR = 0x00 | lcr_d | lcr_p | lcr_s; // DLAB = 0 - UART1->IER = 0x03; // Enable TX/RX interrupts - - UART1->FCR = 0x07; /* Enable and reset TX and RX FIFO. */ - ser_txRestart = 1; // TX fifo is empty - - /* Enable the UART Interrupt */ - NVIC_EnableIRQ(UART1_IRQn); - return; -} - -/*---------------------------------------------------------------------------- - read data from serial port - *---------------------------------------------------------------------------*/ -int ser_Read (char *buffer, const int *length) { - int bytesToRead, bytesRead; - - /* Read *length bytes, block if *bytes are not avaialable */ - bytesToRead = *length; - bytesToRead = (bytesToRead < (*length)) ? bytesToRead : (*length); - bytesRead = bytesToRead; - - while (bytesToRead--) { - while (SER_BUF_EMPTY(ser_in)); // Block until data is available if none - *buffer++ = SER_BUF_RD(ser_in); - } - return (bytesRead); -} - -/*---------------------------------------------------------------------------- - write data to the serial port - *---------------------------------------------------------------------------*/ -int ser_Write (char portNum, const char *buffer, int *length) { - int bytesToWrite, bytesWritten; - - // Write *length bytes - bytesToWrite = *length; - bytesWritten = bytesToWrite; - - while (!SER_BUF_EMPTY(ser_out)); // Block until space is available if none - while (bytesToWrite) { - SER_BUF_WR(ser_out, *buffer++); // Read Rx FIFO to buffer - bytesToWrite--; - } - - if (ser_txRestart) { - ser_txRestart = 0; - if ( portNum == 0 ) - { - UART0->THR = SER_BUF_RD(ser_out); // Write to the Tx Register - } - else - { - UART1->THR = SER_BUF_RD(ser_out); // Write to the Tx Register - } - } - - return (bytesWritten); -} - -/*---------------------------------------------------------------------------- - check if character(s) are available at the serial interface - *---------------------------------------------------------------------------*/ -void ser_AvailChar (int *availChar) { - - *availChar = SER_BUF_COUNT(ser_in); - -} - -/*---------------------------------------------------------------------------- - read the line state of the serial port - *---------------------------------------------------------------------------*/ -void ser_LineState (unsigned short *lineState) { - - *lineState = ser_lineState; - ser_lineState = 0; - -} - -/*---------------------------------------------------------------------------- - serial port 0 interrupt - *---------------------------------------------------------------------------*/ -void UART0_IRQHandler(void) -{ - volatile unsigned long iir; - - iir = UART0->IIR; - - if ((iir & 0x4) || (iir & 0xC)) { // RDA or CTI pending - while (UART0->LSR & 0x01) { // Rx FIFO is not empty - SER_BUF_WR(ser_in, UART0->RBR); // Read Rx FIFO to buffer - } - } - if ((iir & 0x2)) { // TXMIS pending - if (SER_BUF_COUNT(ser_out) != 0) { - UART0->THR = SER_BUF_RD(ser_out); // Write to the Tx FIFO - ser_txRestart = 0; - } - else { - ser_txRestart = 1; - } - } - ser_lineState = UART0->LSR & 0x1E; // update linestate - return; -} - -/*---------------------------------------------------------------------------- - serial port 1 interrupt - *---------------------------------------------------------------------------*/ -void UART1_IRQHandler(void) -{ - volatile unsigned long iir; - - iir = UART1->IIR; - - if ((iir & 0x4) || (iir & 0xC)) { // RDA or CTI pending - while (UART1->LSR & 0x01) { // Rx FIFO is not empty - SER_BUF_WR(ser_in, UART1->RBR); // Read Rx FIFO to buffer - } - } - if ((iir & 0x2)) { // TXMIS pending - if (SER_BUF_COUNT(ser_out) != 0) { - UART1->THR = SER_BUF_RD(ser_out); // Write to the Tx FIFO - ser_txRestart = 0; - } - else { - ser_txRestart = 1; - } - } - ser_lineState = ((UART1->MSR<<8)|UART1->LSR) & 0xE01E; // update linestate - return; -} - - +/*---------------------------------------------------------------------------- + * Name: serial.c + * Purpose: serial port handling for LPC17xx + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC microcontroller devices only. Nothing else + * gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ +#include // LPC17xx definitions +#include "lpc_types.h" +#include "serial.h" + + +/*---------------------------------------------------------------------------- + Defines for ring buffers + *---------------------------------------------------------------------------*/ +#define SER_BUF_SIZE (128) // serial buffer in bytes (power 2) +#define SER_BUF_MASK (SER_BUF_SIZE-1ul) // buffer size mask + +/* Buffer read / write macros */ +#define SER_BUF_RESET(serBuf) (serBuf.rdIdx = serBuf.wrIdx = 0) +#define SER_BUF_WR(serBuf, dataIn) (serBuf.data[SER_BUF_MASK & serBuf.wrIdx++] = (dataIn)) +#define SER_BUF_RD(serBuf) (serBuf.data[SER_BUF_MASK & serBuf.rdIdx++]) +#define SER_BUF_EMPTY(serBuf) (serBuf.rdIdx == serBuf.wrIdx) +#define SER_BUF_FULL(serBuf) (serBuf.rdIdx == serBuf.wrIdx+1) +#define SER_BUF_COUNT(serBuf) (SER_BUF_MASK & (serBuf.wrIdx - serBuf.rdIdx)) + +// buffer type +typedef struct __SER_BUF_T { + unsigned char data[SER_BUF_SIZE]; + unsigned int wrIdx; + unsigned int rdIdx; +} SER_BUF_T; + +unsigned long ser_txRestart; // NZ if TX restart is required +unsigned short ser_lineState; // ((msr << 8) | (lsr)) +SER_BUF_T ser_out; // Serial data buffers +SER_BUF_T ser_in; + +/*---------------------------------------------------------------------------- + open the serial port + *---------------------------------------------------------------------------*/ +void ser_OpenPort (char portNum) { + + if ( portNum == 0 ) + { + /* Port 0 */ + NVIC_DisableIRQ(UART0_IRQn); + PINCON->PINSEL0 &= ~0x000000F0; + PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2 */ + } + else + { + /* Port 1 */ + NVIC_DisableIRQ(UART1_IRQn); + PINCON->PINSEL4 &= ~0x0000000F; + PINCON->PINSEL4 |= 0x0000000A; /* Enable RxD1 P2.1, TxD1 P2.0 */ + } + return; +} + +/*---------------------------------------------------------------------------- + close the serial port + *---------------------------------------------------------------------------*/ +void ser_ClosePort (char portNum ) { + if ( portNum == 0 ) + { + /* POrt 0 */ + PINCON->PINSEL0 &= ~0x000000F0; + /* Disable the interrupt in the VIC and UART controllers */ + UART0->IER = 0; + NVIC_DisableIRQ(UART0_IRQn); + } + else + { + /* Port 1 */ + PINCON->PINSEL4 &= ~0x0000000F; + /* Disable the interrupt in the VIC and UART controllers */ + UART1->IER = 0; + NVIC_DisableIRQ(UART1_IRQn); + } + return; +} + +/*---------------------------------------------------------------------------- + initialize the serial port + *---------------------------------------------------------------------------*/ +void ser_InitPort0 (unsigned long baudrate, unsigned int databits, + unsigned int parity, unsigned int stopbits) { + + unsigned char lcr_p, lcr_s, lcr_d; + unsigned int dll; + unsigned int pclkdiv, pclk; + + switch (databits) { + case 5: // 5 Data bits + lcr_d = 0x00; + break; + case 6: // 6 Data bits + lcr_d = 0x01; + break; + case 7: // 7 Data bits + lcr_d = 0x02; + break; + case 8: // 8 Data bits + default: + lcr_d = 0x03; + break; + } + + switch (stopbits) { + case 1: // 1,5 Stop bits + case 2: // 2 Stop bits + lcr_s = 0x04; + break; + case 0: // 1 Stop bit + default: + lcr_s = 0x00; + break; + } + + switch (parity) { + case 1: // Parity Odd + lcr_p = 0x08; + break; + case 2: // Parity Even + lcr_p = 0x18; + break; + case 3: // Parity Mark + lcr_p = 0x28; + break; + case 4: // Parity Space + lcr_p = 0x38; + break; + case 0: // Parity None + default: + lcr_p = 0x00; + break; + } + + SER_BUF_RESET(ser_out); // reset out buffer + SER_BUF_RESET(ser_in); // reset in buffer + + /* Bit 6~7 is for UART0 */ + pclkdiv = (SC->PCLKSEL0 >> 6) & 0x03; + + switch ( pclkdiv ) + { + case 0x00: + default: + pclk = SystemFrequency/4; + break; + case 0x01: + pclk = SystemFrequency; + break; + case 0x02: + pclk = SystemFrequency/2; + break; + case 0x03: + pclk = SystemFrequency/8; + break; + } + + dll = (pclk/16)/baudrate ; /*baud rate */ + UART0->FDR = 0; // Fractional divider not used + UART0->LCR = 0x80 | lcr_d | lcr_p | lcr_s; // Data bits, Parity, Stop bit + UART0->DLL = dll; // Baud Rate depending on PCLK + UART0->DLM = (dll >> 8); // High divisor latch + UART0->LCR = 0x00 | lcr_d | lcr_p | lcr_s; // DLAB = 0 + UART0->IER = 0x03; // Enable TX/RX interrupts + + UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */ + ser_txRestart = 1; // TX fifo is empty + + /* Enable the UART Interrupt */ + NVIC_EnableIRQ(UART0_IRQn); + return; +} + +/*---------------------------------------------------------------------------- + initialize the serial port + *---------------------------------------------------------------------------*/ +void ser_InitPort1 (unsigned long baudrate, unsigned int databits, + unsigned int parity, unsigned int stopbits) { + + unsigned char lcr_p, lcr_s, lcr_d; + unsigned int dll; + unsigned int pclkdiv, pclk; + + switch (databits) { + case 5: // 5 Data bits + lcr_d = 0x00; + break; + case 6: // 6 Data bits + lcr_d = 0x01; + break; + case 7: // 7 Data bits + lcr_d = 0x02; + break; + case 8: // 8 Data bits + default: + lcr_d = 0x03; + break; + } + + switch (stopbits) { + case 1: // 1,5 Stop bits + case 2: // 2 Stop bits + lcr_s = 0x04; + break; + case 0: // 1 Stop bit + default: + lcr_s = 0x00; + break; + } + + switch (parity) { + case 1: // Parity Odd + lcr_p = 0x08; + break; + case 2: // Parity Even + lcr_p = 0x18; + break; + case 3: // Parity Mark + lcr_p = 0x28; + break; + case 4: // Parity Space + lcr_p = 0x38; + break; + case 0: // Parity None + default: + lcr_p = 0x00; + break; + } + + SER_BUF_RESET(ser_out); // reset out buffer + SER_BUF_RESET(ser_in); // reset in buffer + + /* Bit 8,9 are for UART1 */ + pclkdiv = (SC->PCLKSEL0 >> 8) & 0x03; + + switch ( pclkdiv ) + { + case 0x00: + default: + pclk = SystemFrequency/4; + break; + case 0x01: + pclk = SystemFrequency; + break; + case 0x02: + pclk = SystemFrequency/2; + break; + case 0x03: + pclk = SystemFrequency/8; + break; + } + + dll = (pclk/16)/baudrate ; /*baud rate */ + UART1->FDR = 0; // Fractional divider not used + UART1->LCR = 0x80 | lcr_d | lcr_p | lcr_s; // Data bits, Parity, Stop bit + UART1->DLL = dll; // Baud Rate depending on PCLK + UART1->DLM = (dll >> 8); // High divisor latch + UART1->LCR = 0x00 | lcr_d | lcr_p | lcr_s; // DLAB = 0 + UART1->IER = 0x03; // Enable TX/RX interrupts + + UART1->FCR = 0x07; /* Enable and reset TX and RX FIFO. */ + ser_txRestart = 1; // TX fifo is empty + + /* Enable the UART Interrupt */ + NVIC_EnableIRQ(UART1_IRQn); + return; +} + +/*---------------------------------------------------------------------------- + read data from serial port + *---------------------------------------------------------------------------*/ +int ser_Read (char *buffer, const int *length) { + int bytesToRead, bytesRead; + + /* Read *length bytes, block if *bytes are not avaialable */ + bytesToRead = *length; + bytesToRead = (bytesToRead < (*length)) ? bytesToRead : (*length); + bytesRead = bytesToRead; + + while (bytesToRead--) { + while (SER_BUF_EMPTY(ser_in)); // Block until data is available if none + *buffer++ = SER_BUF_RD(ser_in); + } + return (bytesRead); +} + +/*---------------------------------------------------------------------------- + write data to the serial port + *---------------------------------------------------------------------------*/ +int ser_Write (char portNum, const char *buffer, int *length) { + int bytesToWrite, bytesWritten; + + // Write *length bytes + bytesToWrite = *length; + bytesWritten = bytesToWrite; + + while (!SER_BUF_EMPTY(ser_out)); // Block until space is available if none + while (bytesToWrite) { + SER_BUF_WR(ser_out, *buffer++); // Read Rx FIFO to buffer + bytesToWrite--; + } + + if (ser_txRestart) { + ser_txRestart = 0; + if ( portNum == 0 ) + { + UART0->THR = SER_BUF_RD(ser_out); // Write to the Tx Register + } + else + { + UART1->THR = SER_BUF_RD(ser_out); // Write to the Tx Register + } + } + + return (bytesWritten); +} + +/*---------------------------------------------------------------------------- + check if character(s) are available at the serial interface + *---------------------------------------------------------------------------*/ +void ser_AvailChar (int *availChar) { + + *availChar = SER_BUF_COUNT(ser_in); + +} + +/*---------------------------------------------------------------------------- + read the line state of the serial port + *---------------------------------------------------------------------------*/ +void ser_LineState (unsigned short *lineState) { + + *lineState = ser_lineState; + ser_lineState = 0; + +} + +/*---------------------------------------------------------------------------- + serial port 0 interrupt + *---------------------------------------------------------------------------*/ +void UART0_IRQHandler(void) +{ + volatile unsigned long iir; + + iir = UART0->IIR; + + if ((iir & 0x4) || (iir & 0xC)) { // RDA or CTI pending + while (UART0->LSR & 0x01) { // Rx FIFO is not empty + SER_BUF_WR(ser_in, UART0->RBR); // Read Rx FIFO to buffer + } + } + if ((iir & 0x2)) { // TXMIS pending + if (SER_BUF_COUNT(ser_out) != 0) { + UART0->THR = SER_BUF_RD(ser_out); // Write to the Tx FIFO + ser_txRestart = 0; + } + else { + ser_txRestart = 1; + } + } + ser_lineState = UART0->LSR & 0x1E; // update linestate + return; +} + +/*---------------------------------------------------------------------------- + serial port 1 interrupt + *---------------------------------------------------------------------------*/ +void UART1_IRQHandler(void) +{ + volatile unsigned long iir; + + iir = UART1->IIR; + + if ((iir & 0x4) || (iir & 0xC)) { // RDA or CTI pending + while (UART1->LSR & 0x01) { // Rx FIFO is not empty + SER_BUF_WR(ser_in, UART1->RBR); // Read Rx FIFO to buffer + } + } + if ((iir & 0x2)) { // TXMIS pending + if (SER_BUF_COUNT(ser_out) != 0) { + UART1->THR = SER_BUF_RD(ser_out); // Write to the Tx FIFO + ser_txRestart = 0; + } + else { + ser_txRestart = 1; + } + } + ser_lineState = ((UART1->MSR<<8)|UART1->LSR) & 0xE01E; // update linestate + return; +} + + diff --git a/new_cmsis/usb/serial.h b/new_cmsis/usb/serial.h index 83ffd55..8a17e49 100755 --- a/new_cmsis/usb/serial.h +++ b/new_cmsis/usb/serial.h @@ -1,30 +1,30 @@ -/*---------------------------------------------------------------------------- - * Name: serial.h - * Purpose: serial port handling - * Version: V1.10 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC microcontroller devices only. Nothing else - * gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -#define PORT_NUM 1 - -/*---------------------------------------------------------------------------- - Serial interface related prototypes - *---------------------------------------------------------------------------*/ -extern void ser_OpenPort (char portNum); -extern void ser_ClosePort (char portNum); -extern void ser_InitPort0 (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits); -extern void ser_InitPort1 (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits); -extern void ser_AvailChar (int *availChar); -extern int ser_Write (char portNum, const char *buffer, int *length); -extern int ser_Read (char *buffer, const int *length); -extern void ser_LineState (unsigned short *lineState); - +/*---------------------------------------------------------------------------- + * Name: serial.h + * Purpose: serial port handling + * Version: V1.10 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC microcontroller devices only. Nothing else + * gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#define PORT_NUM 1 + +/*---------------------------------------------------------------------------- + Serial interface related prototypes + *---------------------------------------------------------------------------*/ +extern void ser_OpenPort (char portNum); +extern void ser_ClosePort (char portNum); +extern void ser_InitPort0 (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits); +extern void ser_InitPort1 (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits); +extern void ser_AvailChar (int *availChar); +extern int ser_Write (char portNum, const char *buffer, int *length); +extern int ser_Read (char *buffer, const int *length); +extern void ser_LineState (unsigned short *lineState); + diff --git a/new_cmsis/usb/startup.c b/new_cmsis/usb/startup.c deleted file mode 100644 index 07fd0fa..0000000 --- a/new_cmsis/usb/startup.c +++ /dev/null @@ -1,316 +0,0 @@ -//***************************************************************************** -// -// startup_gcc.c - Startup code for use with GNU tools. -// -// Copyright (c) 2009 Luminary Micro, Inc. All rights reserved. -// Software License Agreement -// -// Luminary Micro, Inc. (LMI) is supplying this software for use solely and -// exclusively on LMI's microcontroller products. -// -// The software is owned by LMI and/or its suppliers, and is protected under -// applicable copyright laws. All rights are reserved. You may not combine -// this software with "viral" open-source software in order to form a larger -// program. Any use in violation of the foregoing restrictions may subject -// the user to criminal sanctions under applicable laws, as well as to civil -// liability for the breach of the terms and conditions of this license. -// -// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED -// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. -// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR -// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. -// -// This is part of revision 32 of the Stellaris CMSIS Package. -// -//***************************************************************************** - -#define WEAK __attribute__ ((weak)) - -//***************************************************************************** -// -// Forward declaration of the default fault handlers. -// -//***************************************************************************** -void WEAK Reset_Handler(void); -static void Default_Handler(void); -void WEAK NMI_Handler(void); -void WEAK HardFault_Handler(void); -void WEAK MemManage_Handler(void); -void WEAK BusFault_Handler(void); -void WEAK UsageFault_Handler(void); -void WEAK MemManage_Handler(void); -void WEAK SVC_Handler(void); -void WEAK DebugMon_Handler(void); -void WEAK PendSV_Handler(void); -void WEAK SysTick_Handler(void); -void WEAK GPIOPortA_IRQHandler(void); -void WEAK GPIOPortB_IRQHandler(void); -void WEAK GPIOPortC_IRQHandler(void); -void WEAK GPIOPortD_IRQHandler(void); -void WEAK GPIOPortE_IRQHandler(void); -void WEAK UART0_IRQHandler(void); -void WEAK UART1_IRQHandler(void); -void WEAK SSI0_IRQHandler(void); -void WEAK I2C0_IRQHandler(void); -void WEAK PWMFault_IRQHandler(void); -void WEAK PWMGen0_IRQHandler(void); -void WEAK PWMGen1_IRQHandler(void); -void WEAK PWMGen2_IRQHandler(void); -void WEAK QEI0_IRQHandler(void); -void WEAK ADCSeq0_IRQHandler(void); -void WEAK ADCSeq1_IRQHandler(void); -void WEAK ADCSeq2_IRQHandler(void); -void WEAK ADCSeq3_IRQHandler(void); -void WEAK Watchdog_IRQHandler(void); -void WEAK Timer0A_IRQHandler(void); -void WEAK Timer0B_IRQHandler(void); -void WEAK Timer1A_IRQHandler(void); -void WEAK Timer1B_IRQHandler(void); -void WEAK Timer2A_IRQHandler(void); -void WEAK Timer2B_IRQHandler(void); -void WEAK Comp0_IRQHandler(void); -void WEAK Comp1_IRQHandler(void); -void WEAK Comp2_IRQHandler(void); -void WEAK SysCtrl_IRQHandler(void); -void WEAK FlashCtrl_IRQHandler(void); -void WEAK GPIOPortF_IRQHandler(void); -void WEAK GPIOPortG_IRQHandler(void); -void WEAK GPIOPortH_IRQHandler(void); -void WEAK UART2_IRQHandler(void); -void WEAK SSI1_IRQHandler(void); -void WEAK Timer3A_IRQHandler(void); -void WEAK Timer3B_IRQHandler(void); -void WEAK I2C1_IRQHandler(void); -void WEAK QEI1_IRQHandler(void); -void WEAK CAN0_IRQHandler(void); -void WEAK CAN1_IRQHandler(void); -void WEAK CAN2_IRQHandler(void); -void WEAK Ethernet_IRQHandler(void); -void WEAK Hibernate_IRQHandler(void); - -//***************************************************************************** -// -// The entry point for the application. -// -//***************************************************************************** -extern int main(void); - -//***************************************************************************** -// -// Reserve space for the system stack. -// -//***************************************************************************** -static unsigned long pulStack[64]; - -//***************************************************************************** -// -// The vector table. Note that the proper constructs must be placed on this to -// ensure that it ends up at physical address 0x0000.0000. -// -//***************************************************************************** -__attribute__ ((section(".isr_vector"))) -void (* const g_pfnVectors[])(void) = -{ - (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), - // The initial stack pointer - Reset_Handler, // The reset handler - NMI_Handler, // The NMI handler - HardFault_Handler, // The hard fault handler - MemManage_Handler, // The MPU fault handler - BusFault_Handler, // The bus fault handler - UsageFault_Handler, // The usage fault handler - 0xefff9d6e, // Reserved - 0, // Reserved - 0, // Reserved - 0, // Reserved - SVC_Handler, // SVCall handler - DebugMon_Handler, // Debug monitor handler - 0, // Reserved - PendSV_Handler, // The PendSV handler - SysTick_Handler, // The SysTick handler - - // - // External Interrupts - // - GPIOPortA_IRQHandler, // GPIO Port A - GPIOPortB_IRQHandler, // GPIO Port B - GPIOPortC_IRQHandler, // GPIO Port C - GPIOPortD_IRQHandler, // GPIO Port D - GPIOPortE_IRQHandler, // GPIO Port E - UART0_IRQHandler, // UART0 Rx and Tx - UART1_IRQHandler, // UART1 Rx and Tx - SSI0_IRQHandler, // SSI0 Rx and Tx - I2C0_IRQHandler, // I2C0 Master and Slave - PWMFault_IRQHandler, // PWM Fault - PWMGen0_IRQHandler, // PWM Generator 0 - PWMGen1_IRQHandler, // PWM Generator 1 - PWMGen2_IRQHandler, // PWM Generator 2 - QEI0_IRQHandler, // Quadrature Encoder 0 - ADCSeq0_IRQHandler, // ADC Sequence 0 - ADCSeq1_IRQHandler, // ADC Sequence 1 - ADCSeq2_IRQHandler, // ADC Sequence 2 - ADCSeq3_IRQHandler, // ADC Sequence 3 - Watchdog_IRQHandler, // Watchdog timer - Timer0A_IRQHandler, // Timer 0 subtimer A - Timer0B_IRQHandler, // Timer 0 subtimer B - Timer1A_IRQHandler, // Timer 1 subtimer A - Timer1B_IRQHandler, // Timer 1 subtimer B - Timer2A_IRQHandler, // Timer 2 subtimer A - Timer2B_IRQHandler, // Timer 2 subtimer B - Comp0_IRQHandler, // Analog Comparator 0 - Comp1_IRQHandler, // Analog Comparator 1 - Comp2_IRQHandler, // Analog Comparator 2 - SysCtrl_IRQHandler, // System Control (PLL, OSC, BO) - FlashCtrl_IRQHandler, // FLASH Control - GPIOPortF_IRQHandler, // GPIO Port F - GPIOPortG_IRQHandler, // GPIO Port G - GPIOPortH_IRQHandler, // GPIO Port H - UART2_IRQHandler, // UART2 Rx and Tx - SSI1_IRQHandler, // SSI1 Rx and Tx - Timer3A_IRQHandler, // Timer 3 subtimer A - Timer3B_IRQHandler, // Timer 3 subtimer B - I2C1_IRQHandler, // I2C1 Master and Slave - QEI1_IRQHandler, // Quadrature Encoder 1 - CAN0_IRQHandler, // CAN0 - CAN1_IRQHandler, // CAN1 - CAN2_IRQHandler, // CAN2 - Ethernet_IRQHandler, // Ethernet - Hibernate_IRQHandler // Hibernate -}; - -//***************************************************************************** -// -// The following are constructs created by the linker, indicating where the -// the "data" and "bss" segments reside in memory. The initializers for the -// for the "data" segment resides immediately following the "text" segment. -// -//***************************************************************************** -extern unsigned long _etext; -extern unsigned long _sdata; -extern unsigned long _edata; -extern unsigned long _sbss; -extern unsigned long _ebss; - -//***************************************************************************** -// -// This is the code that gets called when the processor first starts execution -// following a reset event. Only the absolutely necessary set is performed, -// after which the application supplied entry() routine is called. Any fancy -// actions (such as making decisions based on the reset cause register, and -// resetting the bits in that register) are left solely in the hands of the -// application. -// -//***************************************************************************** -void -Reset_Handler(void) -{ - unsigned long *pulSrc, *pulDest; - - // - // Copy the data segment initializers from flash to SRAM. - // - pulSrc = &_etext; - for(pulDest = &_sdata; pulDest < &_edata; ) - { - *pulDest++ = *pulSrc++; - } - - // - // Zero fill the bss segment. This is done with inline assembly since this - // will clear the value of pulDest if it is not kept in a register. - // - __asm(" ldr r0, =_sbss\n" - " ldr r1, =_ebss\n" - " mov r2, #0\n" - " .thumb_func\n" - "zero_loop:\n" - " cmp r0, r1\n" - " it lt\n" - " strlt r2, [r0], #4\n" - " blt zero_loop"); - - // - // Call the application's entry point. - // - main(); -} - -//***************************************************************************** -// -// Provide weak aliases for each Exception handler to the Default_Handler. -// As they are weak aliases, any function with the same name will override -// this definition. -// -//***************************************************************************** -#pragma weak NMI_Handler = Default_Handler -#pragma weak HardFault_Handler = Default_Handler -#pragma weak MemManage_Handler = Default_Handler -#pragma weak BusFault_Handler = Default_Handler -#pragma weak UsageFault_Handler = Default_Handler -#pragma weak SVC_Handler = Default_Handler -#pragma weak DebugMon_Handler = Default_Handler -#pragma weak PendSV_Handler = Default_Handler -#pragma weak SysTick_Handler = Default_Handler -#pragma weak GPIOPortA_IRQHandler = Default_Handler -#pragma weak GPIOPortB_IRQHandler = Default_Handler -#pragma weak GPIOPortC_IRQHandler = Default_Handler -#pragma weak GPIOPortD_IRQHandler = Default_Handler -#pragma weak GPIOPortE_IRQHandler = Default_Handler -#pragma weak UART0_IRQHandler = Default_Handler -#pragma weak UART1_IRQHandler = Default_Handler -#pragma weak SSI0_IRQHandler = Default_Handler -#pragma weak I2C0_IRQHandler = Default_Handler -#pragma weak PWMFault_IRQHandler = Default_Handler -#pragma weak PWMGen0_IRQHandler = Default_Handler -#pragma weak PWMGen1_IRQHandler = Default_Handler -#pragma weak PWMGen2_IRQHandler = Default_Handler -#pragma weak QEI0_IRQHandler = Default_Handler -#pragma weak ADCSeq0_IRQHandler = Default_Handler -#pragma weak ADCSeq1_IRQHandler = Default_Handler -#pragma weak ADCSeq2_IRQHandler = Default_Handler -#pragma weak ADCSeq3_IRQHandler = Default_Handler -#pragma weak Watchdog_IRQHandler = Default_Handler -#pragma weak Timer0A_IRQHandler = Default_Handler -#pragma weak Timer0B_IRQHandler = Default_Handler -#pragma weak Timer1A_IRQHandler = Default_Handler -#pragma weak Timer1B_IRQHandler = Default_Handler -#pragma weak Timer2A_IRQHandler = Default_Handler -#pragma weak Timer2B_IRQHandler = Default_Handler -#pragma weak Comp0_IRQHandler = Default_Handler -#pragma weak Comp1_IRQHandler = Default_Handler -#pragma weak Comp2_IRQHandler = Default_Handler -#pragma weak SysCtrl_IRQHandler = Default_Handler -#pragma weak FlashCtrl_IRQHandler = Default_Handler -#pragma weak GPIOPortF_IRQHandler = Default_Handler -#pragma weak GPIOPortG_IRQHandler = Default_Handler -#pragma weak GPIOPortH_IRQHandler = Default_Handler -#pragma weak UART2_IRQHandler = Default_Handler -#pragma weak SSI1_IRQHandler = Default_Handler -#pragma weak Timer3A_IRQHandler = Default_Handler -#pragma weak Timer3B_IRQHandler = Default_Handler -#pragma weak I2C1_IRQHandler = Default_Handler -#pragma weak QEI1_IRQHandler = Default_Handler -#pragma weak CAN0_IRQHandler = Default_Handler -#pragma weak CAN1_IRQHandler = Default_Handler -#pragma weak CAN2_IRQHandler = Default_Handler -#pragma weak Ethernet_IRQHandler = Default_Handler -#pragma weak Hibernate_IRQHandler = Default_Handler - -//***************************************************************************** -// -// This is the code that gets called when the processor receives an unexpected -// interrupt. This simply enters an infinite loop, preserving the system state -// for examination by a debugger. -// -//***************************************************************************** -static void -Default_Handler(void) -{ - // - // Go into an infinite loop. - // - while(1) - { - } -} diff --git a/new_cmsis/usb/usb.h b/new_cmsis/usb/usb.h index 21db7b4..ec4916e 100755 --- a/new_cmsis/usb/usb.h +++ b/new_cmsis/usb/usb.h @@ -1,352 +1,352 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: usb.h - * Purpose: USB Definitions - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC family microcontroller devices only. Nothing - * else gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -#ifndef __USB_H__ -#define __USB_H__ -#include "lpc_types.h" - -#if defined ( __GNUC__ ) -#define __packed __attribute__((__packed__)) -#endif - -#if defined ( __CC_ARM ) -typedef __packed union { -#elif defined ( __GNUC__ ) -typedef union __packed { -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef union { -#endif - uint16_t W; -#if defined ( __CC_ARM ) - __packed struct { -#elif defined ( __GNUC__ ) - struct __packed { -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) - struct { -#endif - uint8_t L; - uint8_t H; - } WB; -#ifdef __IAR_SYSTEMS_ICC__ -#pragma pack() -#endif -} WORD_BYTE; -#ifdef __IAR_SYSTEMS_ICC__ -#pragma pack() -#endif - - -/* bmRequestType.Dir */ -#define REQUEST_HOST_TO_DEVICE 0 -#define REQUEST_DEVICE_TO_HOST 1 - -/* bmRequestType.Type */ -#define REQUEST_STANDARD 0 -#define REQUEST_CLASS 1 -#define REQUEST_VENDOR 2 -#define REQUEST_RESERVED 3 - -/* bmRequestType.Recipient */ -#define REQUEST_TO_DEVICE 0 -#define REQUEST_TO_INTERFACE 1 -#define REQUEST_TO_ENDPOINT 2 -#define REQUEST_TO_OTHER 3 - -/* bmRequestType Definition */ -#if defined ( __CC_ARM ) -typedef __packed union _REQUEST_TYPE { -#elif defined ( __GNUC__ ) -typedef union __packed _REQUEST_TYPE { -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef union _REQUEST_TYPE { -#endif -#if defined ( __CC_ARM ) - __packed struct _BM { -#elif defined ( __GNUC__ ) - struct __packed _BM { -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) - struct _BM { -#endif - uint8_t Recipient : 5; - uint8_t Type : 2; - uint8_t Dir : 1; - } BM; -#ifdef __IAR_SYSTEMS_ICC__ -#pragma pack() -#endif - uint8_t B; -} REQUEST_TYPE; -#ifdef __IAR_SYSTEMS_ICC__ -#pragma pack() -#endif - -/* USB Standard Request Codes */ -#define USB_REQUEST_GET_STATUS 0 -#define USB_REQUEST_CLEAR_FEATURE 1 -#define USB_REQUEST_SET_FEATURE 3 -#define USB_REQUEST_SET_ADDRESS 5 -#define USB_REQUEST_GET_DESCRIPTOR 6 -#define USB_REQUEST_SET_DESCRIPTOR 7 -#define USB_REQUEST_GET_CONFIGURATION 8 -#define USB_REQUEST_SET_CONFIGURATION 9 -#define USB_REQUEST_GET_INTERFACE 10 -#define USB_REQUEST_SET_INTERFACE 11 -#define USB_REQUEST_SYNC_FRAME 12 - -/* USB GET_STATUS Bit Values */ -#define USB_GETSTATUS_SELF_POWERED 0x01 -#define USB_GETSTATUS_REMOTE_WAKEUP 0x02 -#define USB_GETSTATUS_ENDPOINT_STALL 0x01 - -/* USB Standard Feature selectors */ -#define USB_FEATURE_ENDPOINT_STALL 0 -#define USB_FEATURE_REMOTE_WAKEUP 1 - -/* USB Default Control Pipe Setup Packet */ -#if defined ( __CC_ARM ) -typedef __packed struct _USB_SETUP_PACKET { -#elif defined ( __GNUC__ ) -typedef struct __packed _USB_SETUP_PACKET { -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _USB_SETUP_PACKET { -#endif - REQUEST_TYPE bmRequestType; - uint8_t bRequest; - WORD_BYTE wValue; - WORD_BYTE wIndex; - uint16_t wLength; -} USB_SETUP_PACKET; -#ifdef __IAR_SYSTEMS_ICC__ -#pragma pack() -#endif - - -/* USB Descriptor Types */ -#define USB_DEVICE_DESCRIPTOR_TYPE 1 -#define USB_CONFIGURATION_DESCRIPTOR_TYPE 2 -#define USB_STRING_DESCRIPTOR_TYPE 3 -#define USB_INTERFACE_DESCRIPTOR_TYPE 4 -#define USB_ENDPOINT_DESCRIPTOR_TYPE 5 -#define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6 -#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7 -#define USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8 -#define USB_OTG_DESCRIPTOR_TYPE 9 -#define USB_DEBUG_DESCRIPTOR_TYPE 10 -#define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11 - -/* USB Device Classes */ -#define USB_DEVICE_CLASS_RESERVED 0x00 -#define USB_DEVICE_CLASS_AUDIO 0x01 -#define USB_DEVICE_CLASS_COMMUNICATIONS 0x02 -#define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03 -#define USB_DEVICE_CLASS_MONITOR 0x04 -#define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05 -#define USB_DEVICE_CLASS_POWER 0x06 -#define USB_DEVICE_CLASS_PRINTER 0x07 -#define USB_DEVICE_CLASS_STORAGE 0x08 -#define USB_DEVICE_CLASS_HUB 0x09 -#define USB_DEVICE_CLASS_MISCELLANEOUS 0xEF -#define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF - -/* bmAttributes in Configuration Descriptor */ -#define USB_CONFIG_POWERED_MASK 0x40 -#define USB_CONFIG_BUS_POWERED 0x80 -#define USB_CONFIG_SELF_POWERED 0xC0 -#define USB_CONFIG_REMOTE_WAKEUP 0x20 - -/* bMaxPower in Configuration Descriptor */ -#define USB_CONFIG_POWER_MA(mA) ((mA)/2) - -/* bEndpointAddress in Endpoint Descriptor */ -#define USB_ENDPOINT_DIRECTION_MASK 0x80 -#define USB_ENDPOINT_OUT(addr) ((addr) | 0x00) -#define USB_ENDPOINT_IN(addr) ((addr) | 0x80) - -/* bmAttributes in Endpoint Descriptor */ -#define USB_ENDPOINT_TYPE_MASK 0x03 -#define USB_ENDPOINT_TYPE_CONTROL 0x00 -#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01 -#define USB_ENDPOINT_TYPE_BULK 0x02 -#define USB_ENDPOINT_TYPE_INTERRUPT 0x03 -#define USB_ENDPOINT_SYNC_MASK 0x0C -#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00 -#define USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04 -#define USB_ENDPOINT_SYNC_ADAPTIVE 0x08 -#define USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C -#define USB_ENDPOINT_USAGE_MASK 0x30 -#define USB_ENDPOINT_USAGE_DATA 0x00 -#define USB_ENDPOINT_USAGE_FEEDBACK 0x10 -#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20 -#define USB_ENDPOINT_USAGE_RESERVED 0x30 - -/* USB Standard Device Descriptor */ -#if defined ( __CC_ARM ) -typedef __packed struct _USB_DEVICE_DESCRIPTOR { -#elif defined ( __GNUC__ ) -typedef struct __packed _USB_DEVICE_DESCRIPTOR { -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _USB_DEVICE_DESCRIPTOR { -#endif - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t bcdUSB; - uint8_t bDeviceClass; - uint8_t bDeviceSubClass; - uint8_t bDeviceProtocol; - uint8_t bMaxPacketSize0; - uint16_t idVendor; - uint16_t idProduct; - uint16_t bcdDevice; - uint8_t iManufacturer; - uint8_t iProduct; - uint8_t iSerialNumber; - uint8_t bNumConfigurations; -} USB_DEVICE_DESCRIPTOR; -#ifdef __IAR_SYSTEMS_ICC__ -#pragma pack() -#endif - -/* USB 2.0 Device Qualifier Descriptor */ -#if defined ( __CC_ARM ) -typedef __packed struct _USB_DEVICE_QUALIFIER_DESCRIPTOR { -#elif defined ( __GNUC__ ) -typedef struct __packed _USB_DEVICE_QUALIFIER_DESCRIPTOR { -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _USB_DEVICE_QUALIFIER_DESCRIPTOR { -#endif - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t bcdUSB; - uint8_t bDeviceClass; - uint8_t bDeviceSubClass; - uint8_t bDeviceProtocol; - uint8_t bMaxPacketSize0; - uint8_t bNumConfigurations; - uint8_t bReserved; -} USB_DEVICE_QUALIFIER_DESCRIPTOR; -#ifdef __IAR_SYSTEMS_ICC__ -#pragma pack() -#endif - -#if defined ( __CC_ARM ) -typedef __packed struct _USB_CONFIGURATION_DESCRIPTOR { -#elif defined ( __GNUC__ ) -typedef struct __packed _USB_CONFIGURATION_DESCRIPTOR { -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _USB_CONFIGURATION_DESCRIPTOR { -#endif - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t wTotalLength; - uint8_t bNumInterfaces; - uint8_t bConfigurationValue; - uint8_t iConfiguration; - uint8_t bmAttributes; - uint8_t bMaxPower; -} USB_CONFIGURATION_DESCRIPTOR; -#ifdef __IAR_SYSTEMS_ICC__ -#pragma pack() -#endif - -/* USB Standard Interface Descriptor */ -#if defined ( __CC_ARM ) -typedef __packed struct _USB_INTERFACE_DESCRIPTOR { -#elif defined ( __GNUC__ ) -typedef struct __packed _USB_INTERFACE_DESCRIPTOR { -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _USB_INTERFACE_DESCRIPTOR { -#endif - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bInterfaceNumber; - uint8_t bAlternateSetting; - uint8_t bNumEndpoints; - uint8_t bInterfaceClass; - uint8_t bInterfaceSubClass; - uint8_t bInterfaceProtocol; - uint8_t iInterface; -} USB_INTERFACE_DESCRIPTOR; -#ifdef __IAR_SYSTEMS_ICC__ -#pragma pack() -#endif - -/* USB Standard Endpoint Descriptor */ -#if defined ( __CC_ARM ) -typedef __packed struct _USB_ENDPOINT_DESCRIPTOR { -#elif defined ( __GNUC__ ) -typedef struct __packed _USB_ENDPOINT_DESCRIPTOR { -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _USB_ENDPOINT_DESCRIPTOR { -#endif - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bEndpointAddress; - uint8_t bmAttributes; - uint16_t wMaxPacketSize; - uint8_t bInterval; -} USB_ENDPOINT_DESCRIPTOR; -#ifdef __IAR_SYSTEMS_ICC__ -#pragma pack() -#endif - -/* USB String Descriptor */ -#if defined ( __CC_ARM ) -typedef __packed struct _USB_STRING_DESCRIPTOR { -#elif defined ( __GNUC__ ) -typedef struct __packed _USB_STRING_DESCRIPTOR { -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _USB_STRING_DESCRIPTOR { -#endif - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t bString/*[]*/; -} USB_STRING_DESCRIPTOR; -#ifdef __IAR_SYSTEMS_ICC__ -#pragma pack() -#endif - -/* USB Common Descriptor */ -#if defined ( __CC_ARM ) -typedef __packed struct _USB_COMMON_DESCRIPTOR { -#elif defined ( __GNUC__ ) -typedef struct __packed _USB_COMMON_DESCRIPTOR { -#elif defined ( __IAR_SYSTEMS_ICC__ ) -#pragma pack(1) -typedef struct _USB_COMMON_DESCRIPTOR { -#endif - uint8_t bLength; - uint8_t bDescriptorType; -} USB_COMMON_DESCRIPTOR; -#ifdef __IAR_SYSTEMS_ICC__ -#pragma pack() -#endif - - - -#endif /* __USB_H__ */ +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: usb.h + * Purpose: USB Definitions + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC family microcontroller devices only. Nothing + * else gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#ifndef __USB_H__ +#define __USB_H__ +#include "lpc_types.h" + +#if defined ( __GNUC__ ) +#define __packed __attribute__((__packed__)) +#endif + +#if defined ( __CC_ARM ) +typedef __packed union { +#elif defined ( __GNUC__ ) +typedef union __packed { +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef union { +#endif + uint16_t W; +#if defined ( __CC_ARM ) + __packed struct { +#elif defined ( __GNUC__ ) + struct __packed { +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) + struct { +#endif + uint8_t L; + uint8_t H; + } WB; +#ifdef __IAR_SYSTEMS_ICC__ +#pragma pack() +#endif +} WORD_BYTE; +#ifdef __IAR_SYSTEMS_ICC__ +#pragma pack() +#endif + + +/* bmRequestType.Dir */ +#define REQUEST_HOST_TO_DEVICE 0 +#define REQUEST_DEVICE_TO_HOST 1 + +/* bmRequestType.Type */ +#define REQUEST_STANDARD 0 +#define REQUEST_CLASS 1 +#define REQUEST_VENDOR 2 +#define REQUEST_RESERVED 3 + +/* bmRequestType.Recipient */ +#define REQUEST_TO_DEVICE 0 +#define REQUEST_TO_INTERFACE 1 +#define REQUEST_TO_ENDPOINT 2 +#define REQUEST_TO_OTHER 3 + +/* bmRequestType Definition */ +#if defined ( __CC_ARM ) +typedef __packed union _REQUEST_TYPE { +#elif defined ( __GNUC__ ) +typedef union __packed _REQUEST_TYPE { +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef union _REQUEST_TYPE { +#endif +#if defined ( __CC_ARM ) + __packed struct _BM { +#elif defined ( __GNUC__ ) + struct __packed _BM { +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) + struct _BM { +#endif + uint8_t Recipient : 5; + uint8_t Type : 2; + uint8_t Dir : 1; + } BM; +#ifdef __IAR_SYSTEMS_ICC__ +#pragma pack() +#endif + uint8_t B; +} REQUEST_TYPE; +#ifdef __IAR_SYSTEMS_ICC__ +#pragma pack() +#endif + +/* USB Standard Request Codes */ +#define USB_REQUEST_GET_STATUS 0 +#define USB_REQUEST_CLEAR_FEATURE 1 +#define USB_REQUEST_SET_FEATURE 3 +#define USB_REQUEST_SET_ADDRESS 5 +#define USB_REQUEST_GET_DESCRIPTOR 6 +#define USB_REQUEST_SET_DESCRIPTOR 7 +#define USB_REQUEST_GET_CONFIGURATION 8 +#define USB_REQUEST_SET_CONFIGURATION 9 +#define USB_REQUEST_GET_INTERFACE 10 +#define USB_REQUEST_SET_INTERFACE 11 +#define USB_REQUEST_SYNC_FRAME 12 + +/* USB GET_STATUS Bit Values */ +#define USB_GETSTATUS_SELF_POWERED 0x01 +#define USB_GETSTATUS_REMOTE_WAKEUP 0x02 +#define USB_GETSTATUS_ENDPOINT_STALL 0x01 + +/* USB Standard Feature selectors */ +#define USB_FEATURE_ENDPOINT_STALL 0 +#define USB_FEATURE_REMOTE_WAKEUP 1 + +/* USB Default Control Pipe Setup Packet */ +#if defined ( __CC_ARM ) +typedef __packed struct _USB_SETUP_PACKET { +#elif defined ( __GNUC__ ) +typedef struct __packed _USB_SETUP_PACKET { +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _USB_SETUP_PACKET { +#endif + REQUEST_TYPE bmRequestType; + uint8_t bRequest; + WORD_BYTE wValue; + WORD_BYTE wIndex; + uint16_t wLength; +} USB_SETUP_PACKET; +#ifdef __IAR_SYSTEMS_ICC__ +#pragma pack() +#endif + + +/* USB Descriptor Types */ +#define USB_DEVICE_DESCRIPTOR_TYPE 1 +#define USB_CONFIGURATION_DESCRIPTOR_TYPE 2 +#define USB_STRING_DESCRIPTOR_TYPE 3 +#define USB_INTERFACE_DESCRIPTOR_TYPE 4 +#define USB_ENDPOINT_DESCRIPTOR_TYPE 5 +#define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6 +#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7 +#define USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8 +#define USB_OTG_DESCRIPTOR_TYPE 9 +#define USB_DEBUG_DESCRIPTOR_TYPE 10 +#define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11 + +/* USB Device Classes */ +#define USB_DEVICE_CLASS_RESERVED 0x00 +#define USB_DEVICE_CLASS_AUDIO 0x01 +#define USB_DEVICE_CLASS_COMMUNICATIONS 0x02 +#define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03 +#define USB_DEVICE_CLASS_MONITOR 0x04 +#define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05 +#define USB_DEVICE_CLASS_POWER 0x06 +#define USB_DEVICE_CLASS_PRINTER 0x07 +#define USB_DEVICE_CLASS_STORAGE 0x08 +#define USB_DEVICE_CLASS_HUB 0x09 +#define USB_DEVICE_CLASS_MISCELLANEOUS 0xEF +#define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF + +/* bmAttributes in Configuration Descriptor */ +#define USB_CONFIG_POWERED_MASK 0x40 +#define USB_CONFIG_BUS_POWERED 0x80 +#define USB_CONFIG_SELF_POWERED 0xC0 +#define USB_CONFIG_REMOTE_WAKEUP 0x20 + +/* bMaxPower in Configuration Descriptor */ +#define USB_CONFIG_POWER_MA(mA) ((mA)/2) + +/* bEndpointAddress in Endpoint Descriptor */ +#define USB_ENDPOINT_DIRECTION_MASK 0x80 +#define USB_ENDPOINT_OUT(addr) ((addr) | 0x00) +#define USB_ENDPOINT_IN(addr) ((addr) | 0x80) + +/* bmAttributes in Endpoint Descriptor */ +#define USB_ENDPOINT_TYPE_MASK 0x03 +#define USB_ENDPOINT_TYPE_CONTROL 0x00 +#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01 +#define USB_ENDPOINT_TYPE_BULK 0x02 +#define USB_ENDPOINT_TYPE_INTERRUPT 0x03 +#define USB_ENDPOINT_SYNC_MASK 0x0C +#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00 +#define USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04 +#define USB_ENDPOINT_SYNC_ADAPTIVE 0x08 +#define USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C +#define USB_ENDPOINT_USAGE_MASK 0x30 +#define USB_ENDPOINT_USAGE_DATA 0x00 +#define USB_ENDPOINT_USAGE_FEEDBACK 0x10 +#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20 +#define USB_ENDPOINT_USAGE_RESERVED 0x30 + +/* USB Standard Device Descriptor */ +#if defined ( __CC_ARM ) +typedef __packed struct _USB_DEVICE_DESCRIPTOR { +#elif defined ( __GNUC__ ) +typedef struct __packed _USB_DEVICE_DESCRIPTOR { +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _USB_DEVICE_DESCRIPTOR { +#endif + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t bcdUSB; + uint8_t bDeviceClass; + uint8_t bDeviceSubClass; + uint8_t bDeviceProtocol; + uint8_t bMaxPacketSize0; + uint16_t idVendor; + uint16_t idProduct; + uint16_t bcdDevice; + uint8_t iManufacturer; + uint8_t iProduct; + uint8_t iSerialNumber; + uint8_t bNumConfigurations; +} USB_DEVICE_DESCRIPTOR; +#ifdef __IAR_SYSTEMS_ICC__ +#pragma pack() +#endif + +/* USB 2.0 Device Qualifier Descriptor */ +#if defined ( __CC_ARM ) +typedef __packed struct _USB_DEVICE_QUALIFIER_DESCRIPTOR { +#elif defined ( __GNUC__ ) +typedef struct __packed _USB_DEVICE_QUALIFIER_DESCRIPTOR { +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _USB_DEVICE_QUALIFIER_DESCRIPTOR { +#endif + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t bcdUSB; + uint8_t bDeviceClass; + uint8_t bDeviceSubClass; + uint8_t bDeviceProtocol; + uint8_t bMaxPacketSize0; + uint8_t bNumConfigurations; + uint8_t bReserved; +} USB_DEVICE_QUALIFIER_DESCRIPTOR; +#ifdef __IAR_SYSTEMS_ICC__ +#pragma pack() +#endif + +#if defined ( __CC_ARM ) +typedef __packed struct _USB_CONFIGURATION_DESCRIPTOR { +#elif defined ( __GNUC__ ) +typedef struct __packed _USB_CONFIGURATION_DESCRIPTOR { +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _USB_CONFIGURATION_DESCRIPTOR { +#endif + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t wTotalLength; + uint8_t bNumInterfaces; + uint8_t bConfigurationValue; + uint8_t iConfiguration; + uint8_t bmAttributes; + uint8_t bMaxPower; +} USB_CONFIGURATION_DESCRIPTOR; +#ifdef __IAR_SYSTEMS_ICC__ +#pragma pack() +#endif + +/* USB Standard Interface Descriptor */ +#if defined ( __CC_ARM ) +typedef __packed struct _USB_INTERFACE_DESCRIPTOR { +#elif defined ( __GNUC__ ) +typedef struct __packed _USB_INTERFACE_DESCRIPTOR { +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _USB_INTERFACE_DESCRIPTOR { +#endif + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bInterfaceNumber; + uint8_t bAlternateSetting; + uint8_t bNumEndpoints; + uint8_t bInterfaceClass; + uint8_t bInterfaceSubClass; + uint8_t bInterfaceProtocol; + uint8_t iInterface; +} USB_INTERFACE_DESCRIPTOR; +#ifdef __IAR_SYSTEMS_ICC__ +#pragma pack() +#endif + +/* USB Standard Endpoint Descriptor */ +#if defined ( __CC_ARM ) +typedef __packed struct _USB_ENDPOINT_DESCRIPTOR { +#elif defined ( __GNUC__ ) +typedef struct __packed _USB_ENDPOINT_DESCRIPTOR { +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _USB_ENDPOINT_DESCRIPTOR { +#endif + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bEndpointAddress; + uint8_t bmAttributes; + uint16_t wMaxPacketSize; + uint8_t bInterval; +} USB_ENDPOINT_DESCRIPTOR; +#ifdef __IAR_SYSTEMS_ICC__ +#pragma pack() +#endif + +/* USB String Descriptor */ +#if defined ( __CC_ARM ) +typedef __packed struct _USB_STRING_DESCRIPTOR { +#elif defined ( __GNUC__ ) +typedef struct __packed _USB_STRING_DESCRIPTOR { +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _USB_STRING_DESCRIPTOR { +#endif + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t bString/*[]*/; +} USB_STRING_DESCRIPTOR; +#ifdef __IAR_SYSTEMS_ICC__ +#pragma pack() +#endif + +/* USB Common Descriptor */ +#if defined ( __CC_ARM ) +typedef __packed struct _USB_COMMON_DESCRIPTOR { +#elif defined ( __GNUC__ ) +typedef struct __packed _USB_COMMON_DESCRIPTOR { +#elif defined ( __IAR_SYSTEMS_ICC__ ) +#pragma pack(1) +typedef struct _USB_COMMON_DESCRIPTOR { +#endif + uint8_t bLength; + uint8_t bDescriptorType; +} USB_COMMON_DESCRIPTOR; +#ifdef __IAR_SYSTEMS_ICC__ +#pragma pack() +#endif + + + +#endif /* __USB_H__ */ diff --git a/new_cmsis/usb/usbuser.c b/new_cmsis/usb/user.c similarity index 93% rename from new_cmsis/usb/usbuser.c rename to new_cmsis/usb/user.c index 03ade78..3d3fe72 100755 --- a/new_cmsis/usb/usbuser.c +++ b/new_cmsis/usb/user.c @@ -1,336 +1,336 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: usbuser.c - * Purpose: USB Custom User Module - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC family microcontroller devices only. Nothing - * else gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ -#include "lpc_types.h" - -#include "usb.h" -#include "usbcfg.h" -#include "usbhw.h" -#include "usbcore.h" -#include "usbuser.h" -#include "cdcuser.h" - - -/* - * USB Power Event Callback - * Called automatically on USB Power Event - * Parameter: power: On(TRUE)/Off(FALSE) - */ - -#if USB_POWER_EVENT -void USB_Power_Event (uint32_t power) { -} -#endif - - -/* - * USB Reset Event Callback - * Called automatically on USB Reset Event - */ - -#if USB_RESET_EVENT -void USB_Reset_Event (void) { - USB_ResetCore(); -} -#endif - - -/* - * USB Suspend Event Callback - * Called automatically on USB Suspend Event - */ - -#if USB_SUSPEND_EVENT -void USB_Suspend_Event (void) { -} -#endif - - -/* - * USB Resume Event Callback - * Called automatically on USB Resume Event - */ - -#if USB_RESUME_EVENT -void USB_Resume_Event (void) { -} -#endif - - -/* - * USB Remote Wakeup Event Callback - * Called automatically on USB Remote Wakeup Event - */ - -#if USB_WAKEUP_EVENT -void USB_WakeUp_Event (void) { -} -#endif - - -/* - * USB Start of Frame Event Callback - * Called automatically on USB Start of Frame Event - */ - -#if USB_SOF_EVENT -void USB_SOF_Event (void) { -} -#endif - - -/* - * USB Error Event Callback - * Called automatically on USB Error Event - * Parameter: error: Error Code - */ - -#if USB_ERROR_EVENT -void USB_Error_Event (uint32_t error) { -} -#endif - - -/* - * USB Set Configuration Event Callback - * Called automatically on USB Set Configuration Request - */ - -#if USB_CONFIGURE_EVENT -void USB_Configure_Event (void) { - - if (USB_Configuration) { /* Check if USB is configured */ - /* add your code here */ - } -} -#endif - - -/* - * USB Set Interface Event Callback - * Called automatically on USB Set Interface Request - */ - -#if USB_INTERFACE_EVENT -void USB_Interface_Event (void) { -} -#endif - - -/* - * USB Set/Clear Feature Event Callback - * Called automatically on USB Set/Clear Feature Request - */ - -#if USB_FEATURE_EVENT -void USB_Feature_Event (void) { -} -#endif - - -#define P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL) - -/* USB Endpoint Events Callback Pointers */ -void (* const USB_P_EP[16]) (uint32_t event) = { - P_EP(0), - P_EP(1), - P_EP(2), - P_EP(3), - P_EP(4), - P_EP(5), - P_EP(6), - P_EP(7), - P_EP(8), - P_EP(9), - P_EP(10), - P_EP(11), - P_EP(12), - P_EP(13), - P_EP(14), - P_EP(15), -}; - - -/* - * USB Endpoint 1 Event Callback - * Called automatically on USB Endpoint 1 Event - * Parameter: event - */ - -void USB_EndPoint1 (uint32_t event) { - uint16_t temp; - static uint16_t serialState; - - switch (event) { - case USB_EVT_IN: - temp = CDC_GetSerialState(); - if (serialState != temp) { - serialState = temp; - CDC_NotificationIn(); /* send SERIAL_STATE notification */ - } - break; - } -} - - -/* - * USB Endpoint 2 Event Callback - * Called automatically on USB Endpoint 2 Event - * Parameter: event - */ - -void USB_EndPoint2 (uint32_t event) { - - switch (event) { - case USB_EVT_OUT: - CDC_BulkOut (); /* data received from Host */ - break; - case USB_EVT_IN: - CDC_BulkIn (); /* data expected from Host */ - break; - } -} - - -/* - * USB Endpoint 3 Event Callback - * Called automatically on USB Endpoint 3 Event - * Parameter: event - */ - -void USB_EndPoint3 (uint32_t event) { -} - - -/* - * USB Endpoint 4 Event Callback - * Called automatically on USB Endpoint 4 Event - * Parameter: event - */ - -void USB_EndPoint4 (uint32_t event) { -} - - -/* - * USB Endpoint 5 Event Callback - * Called automatically on USB Endpoint 5 Event - * Parameter: event - */ - -void USB_EndPoint5 (uint32_t event) { -} - - -/* - * USB Endpoint 6 Event Callback - * Called automatically on USB Endpoint 6 Event - * Parameter: event - */ - -void USB_EndPoint6 (uint32_t event) { -} - - -/* - * USB Endpoint 7 Event Callback - * Called automatically on USB Endpoint 7 Event - * Parameter: event - */ - -void USB_EndPoint7 (uint32_t event) { -} - - -/* - * USB Endpoint 8 Event Callback - * Called automatically on USB Endpoint 8 Event - * Parameter: event - */ - -void USB_EndPoint8 (uint32_t event) { -} - - -/* - * USB Endpoint 9 Event Callback - * Called automatically on USB Endpoint 9 Event - * Parameter: event - */ - -void USB_EndPoint9 (uint32_t event) { -} - - -/* - * USB Endpoint 10 Event Callback - * Called automatically on USB Endpoint 10 Event - * Parameter: event - */ - -void USB_EndPoint10 (uint32_t event) { -} - - -/* - * USB Endpoint 11 Event Callback - * Called automatically on USB Endpoint 11 Event - * Parameter: event - */ - -void USB_EndPoint11 (uint32_t event) { -} - - -/* - * USB Endpoint 12 Event Callback - * Called automatically on USB Endpoint 12 Event - * Parameter: event - */ - -void USB_EndPoint12 (uint32_t event) { -} - - -/* - * USB Endpoint 13 Event Callback - * Called automatically on USB Endpoint 13 Event - * Parameter: event - */ - -void USB_EndPoint13 (uint32_t event) { -} - - -/* - * USB Endpoint 14 Event Callback - * Called automatically on USB Endpoint 14 Event - * Parameter: event - */ - -void USB_EndPoint14 (uint32_t event) { -} - - -/* - * USB Endpoint 15 Event Callback - * Called automatically on USB Endpoint 15 Event - * Parameter: event - */ - -void USB_EndPoint15 (uint32_t event) { -} +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: usbuser.c + * Purpose: USB Custom User Module + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC family microcontroller devices only. Nothing + * else gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ +#include "lpc_types.h" + +#include "usb.h" +#include "cfg.h" +#include "hw.h" +#include "core.h" +#include "user.h" +#include "cdcuser.h" + + +/* + * USB Power Event Callback + * Called automatically on USB Power Event + * Parameter: power: On(TRUE)/Off(FALSE) + */ + +#if USB_POWER_EVENT +void USB_Power_Event (uint32_t power) { +} +#endif + + +/* + * USB Reset Event Callback + * Called automatically on USB Reset Event + */ + +#if USB_RESET_EVENT +void USB_Reset_Event (void) { + USB_ResetCore(); +} +#endif + + +/* + * USB Suspend Event Callback + * Called automatically on USB Suspend Event + */ + +#if USB_SUSPEND_EVENT +void USB_Suspend_Event (void) { +} +#endif + + +/* + * USB Resume Event Callback + * Called automatically on USB Resume Event + */ + +#if USB_RESUME_EVENT +void USB_Resume_Event (void) { +} +#endif + + +/* + * USB Remote Wakeup Event Callback + * Called automatically on USB Remote Wakeup Event + */ + +#if USB_WAKEUP_EVENT +void USB_WakeUp_Event (void) { +} +#endif + + +/* + * USB Start of Frame Event Callback + * Called automatically on USB Start of Frame Event + */ + +#if USB_SOF_EVENT +void USB_SOF_Event (void) { +} +#endif + + +/* + * USB Error Event Callback + * Called automatically on USB Error Event + * Parameter: error: Error Code + */ + +#if USB_ERROR_EVENT +void USB_Error_Event (uint32_t error) { +} +#endif + + +/* + * USB Set Configuration Event Callback + * Called automatically on USB Set Configuration Request + */ + +#if USB_CONFIGURE_EVENT +void USB_Configure_Event (void) { + + if (USB_Configuration) { /* Check if USB is configured */ + /* add your code here */ + } +} +#endif + + +/* + * USB Set Interface Event Callback + * Called automatically on USB Set Interface Request + */ + +#if USB_INTERFACE_EVENT +void USB_Interface_Event (void) { +} +#endif + + +/* + * USB Set/Clear Feature Event Callback + * Called automatically on USB Set/Clear Feature Request + */ + +#if USB_FEATURE_EVENT +void USB_Feature_Event (void) { +} +#endif + + +#define P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL) + +/* USB Endpoint Events Callback Pointers */ +void (* const USB_P_EP[16]) (uint32_t event) = { + P_EP(0), + P_EP(1), + P_EP(2), + P_EP(3), + P_EP(4), + P_EP(5), + P_EP(6), + P_EP(7), + P_EP(8), + P_EP(9), + P_EP(10), + P_EP(11), + P_EP(12), + P_EP(13), + P_EP(14), + P_EP(15), +}; + + +/* + * USB Endpoint 1 Event Callback + * Called automatically on USB Endpoint 1 Event + * Parameter: event + */ + +void USB_EndPoint1 (uint32_t event) { + uint16_t temp; + static uint16_t serialState; + + switch (event) { + case USB_EVT_IN: + temp = CDC_GetSerialState(); + if (serialState != temp) { + serialState = temp; + CDC_NotificationIn(); /* send SERIAL_STATE notification */ + } + break; + } +} + + +/* + * USB Endpoint 2 Event Callback + * Called automatically on USB Endpoint 2 Event + * Parameter: event + */ + +void USB_EndPoint2 (uint32_t event) { + + switch (event) { + case USB_EVT_OUT: + CDC_BulkOut (); /* data received from Host */ + break; + case USB_EVT_IN: + CDC_BulkIn (); /* data expected from Host */ + break; + } +} + + +/* + * USB Endpoint 3 Event Callback + * Called automatically on USB Endpoint 3 Event + * Parameter: event + */ + +void USB_EndPoint3 (uint32_t event) { +} + + +/* + * USB Endpoint 4 Event Callback + * Called automatically on USB Endpoint 4 Event + * Parameter: event + */ + +void USB_EndPoint4 (uint32_t event) { +} + + +/* + * USB Endpoint 5 Event Callback + * Called automatically on USB Endpoint 5 Event + * Parameter: event + */ + +void USB_EndPoint5 (uint32_t event) { +} + + +/* + * USB Endpoint 6 Event Callback + * Called automatically on USB Endpoint 6 Event + * Parameter: event + */ + +void USB_EndPoint6 (uint32_t event) { +} + + +/* + * USB Endpoint 7 Event Callback + * Called automatically on USB Endpoint 7 Event + * Parameter: event + */ + +void USB_EndPoint7 (uint32_t event) { +} + + +/* + * USB Endpoint 8 Event Callback + * Called automatically on USB Endpoint 8 Event + * Parameter: event + */ + +void USB_EndPoint8 (uint32_t event) { +} + + +/* + * USB Endpoint 9 Event Callback + * Called automatically on USB Endpoint 9 Event + * Parameter: event + */ + +void USB_EndPoint9 (uint32_t event) { +} + + +/* + * USB Endpoint 10 Event Callback + * Called automatically on USB Endpoint 10 Event + * Parameter: event + */ + +void USB_EndPoint10 (uint32_t event) { +} + + +/* + * USB Endpoint 11 Event Callback + * Called automatically on USB Endpoint 11 Event + * Parameter: event + */ + +void USB_EndPoint11 (uint32_t event) { +} + + +/* + * USB Endpoint 12 Event Callback + * Called automatically on USB Endpoint 12 Event + * Parameter: event + */ + +void USB_EndPoint12 (uint32_t event) { +} + + +/* + * USB Endpoint 13 Event Callback + * Called automatically on USB Endpoint 13 Event + * Parameter: event + */ + +void USB_EndPoint13 (uint32_t event) { +} + + +/* + * USB Endpoint 14 Event Callback + * Called automatically on USB Endpoint 14 Event + * Parameter: event + */ + +void USB_EndPoint14 (uint32_t event) { +} + + +/* + * USB Endpoint 15 Event Callback + * Called automatically on USB Endpoint 15 Event + * Parameter: event + */ + +void USB_EndPoint15 (uint32_t event) { +} diff --git a/new_cmsis/usb/usbuser.h b/new_cmsis/usb/user.h similarity index 97% rename from new_cmsis/usb/usbuser.h rename to new_cmsis/usb/user.h index dee1d73..647fa03 100755 --- a/new_cmsis/usb/usbuser.h +++ b/new_cmsis/usb/user.h @@ -1,74 +1,74 @@ -/*---------------------------------------------------------------------------- - * U S B - K e r n e l - *---------------------------------------------------------------------------- - * Name: usbuser.h - * Purpose: USB Custom User Definitions - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC family microcontroller devices only. Nothing - * else gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -#ifndef __USBUSER_H__ -#define __USBUSER_H__ - - -/* USB Device Events Callback Functions */ -extern void USB_Power_Event (uint32_t power); -extern void USB_Reset_Event (void); -extern void USB_Suspend_Event (void); -extern void USB_Resume_Event (void); -extern void USB_WakeUp_Event (void); -extern void USB_SOF_Event (void); -extern void USB_Error_Event (uint32_t error); - -/* USB Endpoint Callback Events */ -#define USB_EVT_SETUP 1 /* Setup Packet */ -#define USB_EVT_OUT 2 /* OUT Packet */ -#define USB_EVT_IN 3 /* IN Packet */ -#define USB_EVT_OUT_NAK 4 /* OUT Packet - Not Acknowledged */ -#define USB_EVT_IN_NAK 5 /* IN Packet - Not Acknowledged */ -#define USB_EVT_OUT_STALL 6 /* OUT Packet - Stalled */ -#define USB_EVT_IN_STALL 7 /* IN Packet - Stalled */ -#define USB_EVT_OUT_DMA_EOT 8 /* DMA OUT EP - End of Transfer */ -#define USB_EVT_IN_DMA_EOT 9 /* DMA IN EP - End of Transfer */ -#define USB_EVT_OUT_DMA_NDR 10 /* DMA OUT EP - New Descriptor Request */ -#define USB_EVT_IN_DMA_NDR 11 /* DMA IN EP - New Descriptor Request */ -#define USB_EVT_OUT_DMA_ERR 12 /* DMA OUT EP - Error */ -#define USB_EVT_IN_DMA_ERR 13 /* DMA IN EP - Error */ - -/* USB Endpoint Events Callback Pointers */ -extern void (* const USB_P_EP[16])(uint32_t event); - -/* USB Endpoint Events Callback Functions */ -extern void USB_EndPoint0 (uint32_t event); -extern void USB_EndPoint1 (uint32_t event); -extern void USB_EndPoint2 (uint32_t event); -extern void USB_EndPoint3 (uint32_t event); -extern void USB_EndPoint4 (uint32_t event); -extern void USB_EndPoint5 (uint32_t event); -extern void USB_EndPoint6 (uint32_t event); -extern void USB_EndPoint7 (uint32_t event); -extern void USB_EndPoint8 (uint32_t event); -extern void USB_EndPoint9 (uint32_t event); -extern void USB_EndPoint10 (uint32_t event); -extern void USB_EndPoint11 (uint32_t event); -extern void USB_EndPoint12 (uint32_t event); -extern void USB_EndPoint13 (uint32_t event); -extern void USB_EndPoint14 (uint32_t event); -extern void USB_EndPoint15 (uint32_t event); - -/* USB Core Events Callback Functions */ -extern void USB_Configure_Event (void); -extern void USB_Interface_Event (void); -extern void USB_Feature_Event (void); - - -#endif /* __USBUSER_H__ */ +/*---------------------------------------------------------------------------- + * U S B - K e r n e l + *---------------------------------------------------------------------------- + * Name: usbuser.h + * Purpose: USB Custom User Definitions + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC family microcontroller devices only. Nothing + * else gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#ifndef __USBUSER_H__ +#define __USBUSER_H__ + + +/* USB Device Events Callback Functions */ +extern void USB_Power_Event (uint32_t power); +extern void USB_Reset_Event (void); +extern void USB_Suspend_Event (void); +extern void USB_Resume_Event (void); +extern void USB_WakeUp_Event (void); +extern void USB_SOF_Event (void); +extern void USB_Error_Event (uint32_t error); + +/* USB Endpoint Callback Events */ +#define USB_EVT_SETUP 1 /* Setup Packet */ +#define USB_EVT_OUT 2 /* OUT Packet */ +#define USB_EVT_IN 3 /* IN Packet */ +#define USB_EVT_OUT_NAK 4 /* OUT Packet - Not Acknowledged */ +#define USB_EVT_IN_NAK 5 /* IN Packet - Not Acknowledged */ +#define USB_EVT_OUT_STALL 6 /* OUT Packet - Stalled */ +#define USB_EVT_IN_STALL 7 /* IN Packet - Stalled */ +#define USB_EVT_OUT_DMA_EOT 8 /* DMA OUT EP - End of Transfer */ +#define USB_EVT_IN_DMA_EOT 9 /* DMA IN EP - End of Transfer */ +#define USB_EVT_OUT_DMA_NDR 10 /* DMA OUT EP - New Descriptor Request */ +#define USB_EVT_IN_DMA_NDR 11 /* DMA IN EP - New Descriptor Request */ +#define USB_EVT_OUT_DMA_ERR 12 /* DMA OUT EP - Error */ +#define USB_EVT_IN_DMA_ERR 13 /* DMA IN EP - Error */ + +/* USB Endpoint Events Callback Pointers */ +extern void (* const USB_P_EP[16])(uint32_t event); + +/* USB Endpoint Events Callback Functions */ +extern void USB_EndPoint0 (uint32_t event); +extern void USB_EndPoint1 (uint32_t event); +extern void USB_EndPoint2 (uint32_t event); +extern void USB_EndPoint3 (uint32_t event); +extern void USB_EndPoint4 (uint32_t event); +extern void USB_EndPoint5 (uint32_t event); +extern void USB_EndPoint6 (uint32_t event); +extern void USB_EndPoint7 (uint32_t event); +extern void USB_EndPoint8 (uint32_t event); +extern void USB_EndPoint9 (uint32_t event); +extern void USB_EndPoint10 (uint32_t event); +extern void USB_EndPoint11 (uint32_t event); +extern void USB_EndPoint12 (uint32_t event); +extern void USB_EndPoint13 (uint32_t event); +extern void USB_EndPoint14 (uint32_t event); +extern void USB_EndPoint15 (uint32_t event); + +/* USB Core Events Callback Functions */ +extern void USB_Configure_Event (void); +extern void USB_Interface_Event (void); +extern void USB_Feature_Event (void); + + +#endif /* __USBUSER_H__ */ diff --git a/new_cmsis/usb/vcomdemo.c b/new_cmsis/usb/vcom.c similarity index 77% rename from new_cmsis/usb/vcomdemo.c rename to new_cmsis/usb/vcom.c index e99e94e..dcc06e4 100755 --- a/new_cmsis/usb/vcomdemo.c +++ b/new_cmsis/usb/vcom.c @@ -1,124 +1,104 @@ -/*---------------------------------------------------------------------------- - * Name: vcomdemo.c - * Purpose: USB virtual COM port Demo - * Version: V1.20 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC microcontroller devices only. Nothing else - * gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -#include "../LPC17xx.h" -#include "lpc_types.h" - -#include "usb.h" -#include "usbcfg.h" -#include "usbhw.h" -#include "usbcore.h" -#include "cdc.h" -#include "cdcuser.h" -#include "serial.h" -#include "vcomdemo.h" - -/* Example group ----------------------------------------------------------- */ -/** @defgroup USBDEV_USBCDC USBCDC - * @ingroup USBDEV_Examples - * @{ - */ - -/*---------------------------------------------------------------------------- - Initialises the VCOM port. - Call this function before using VCOM_putchar or VCOM_getchar - *---------------------------------------------------------------------------*/ -void VCOM_Init(void) { -#if PORT_NUM - CDC_Init (1); -#else - CDC_Init (0); -#endif -} - - -/*---------------------------------------------------------------------------- - Reads character from serial port buffer and writes to USB buffer - *---------------------------------------------------------------------------*/ -void VCOM_Serial2Usb(void) { - static char serBuf [USB_CDC_BUFSIZE]; - int numBytesRead, numAvailByte; - - ser_AvailChar (&numAvailByte); - if (numAvailByte > 0) { - if (CDC_DepInEmpty) { - numBytesRead = ser_Read (&serBuf[0], &numAvailByte); - - CDC_DepInEmpty = 0; - USB_WriteEP (CDC_DEP_IN, (unsigned char *)&serBuf[0], numBytesRead); - } - } - -} - -/*---------------------------------------------------------------------------- - Reads character from USB buffer and writes to serial port buffer - *---------------------------------------------------------------------------*/ -void VCOM_Usb2Serial(void) { - static char serBuf [32]; - int numBytesToRead, numBytesRead, numAvailByte; - - CDC_OutBufAvailChar (&numAvailByte); - if (numAvailByte > 0) { - numBytesToRead = numAvailByte > 32 ? 32 : numAvailByte; - numBytesRead = CDC_RdOutBuf (&serBuf[0], &numBytesToRead); -#if PORT_NUM - ser_Write (1, &serBuf[0], &numBytesRead); -#else - ser_Write (0, &serBuf[0], &numBytesRead); -#endif - } - -} - - -/*---------------------------------------------------------------------------- - checks the serial state and initiates notification - *---------------------------------------------------------------------------*/ -void VCOM_CheckSerialState (void) { - unsigned short temp; - static unsigned short serialState; - - temp = CDC_GetSerialState(); - if (serialState != temp) { - serialState = temp; - CDC_NotificationIn(); // send SERIAL_STATE notification - } -} - -/*---------------------------------------------------------------------------- - Main Program - *---------------------------------------------------------------------------*/ -int main (void) { - SystemInit(); - - VCOM_Init(); // VCOM Initialization - - USB_Init(); // USB Initialization - USB_Connect(TRUE); // USB Connect - - while (!USB_Configuration) ; // wait until USB is configured - - while (1) { // Loop forever - VCOM_Serial2Usb(); // read serial port and initiate USB event - VCOM_CheckSerialState(); - VCOM_Usb2Serial(); - } // end while -} // end main () - -/* - * @} - */ +/*---------------------------------------------------------------------------- + * Name: vcomdemo.c + * Purpose: USB virtual COM port Demo + * Version: V1.20 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC microcontroller devices only. Nothing else + * gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#include +#include "lpc_types.h" + +#include "usb.h" +#include "cfg.h" +#include "hw.h" +#include "core.h" +#include "cdc.h" +#include "cdcuser.h" +#include "serial.h" +#include "vcom.h" + +/* Example group ----------------------------------------------------------- */ +/** @defgroup USBDEV_USBCDC USBCDC + * @ingroup USBDEV_Examples + * @{ + */ + +/*---------------------------------------------------------------------------- + Initialises the VCOM port. + Call this function before using VCOM_putchar or VCOM_getchar + *---------------------------------------------------------------------------*/ +void VCOM_Init(void) { +#if PORT_NUM + CDC_Init (1); +#else + CDC_Init (0); +#endif +} + + +/*---------------------------------------------------------------------------- + Reads character from serial port buffer and writes to USB buffer + *---------------------------------------------------------------------------*/ +void VCOM_Serial2Usb(void) { + static char serBuf [USB_CDC_BUFSIZE]; + int numBytesRead, numAvailByte; + + ser_AvailChar (&numAvailByte); + if (numAvailByte > 0) { + if (CDC_DepInEmpty) { + numBytesRead = ser_Read (&serBuf[0], &numAvailByte); + + CDC_DepInEmpty = 0; + USB_WriteEP (CDC_DEP_IN, (unsigned char *)&serBuf[0], numBytesRead); + } + } + +} + +/*---------------------------------------------------------------------------- + Reads character from USB buffer and writes to serial port buffer + *---------------------------------------------------------------------------*/ +void VCOM_Usb2Serial(void) { + static char serBuf [32]; + int numBytesToRead, numBytesRead, numAvailByte; + + CDC_OutBufAvailChar (&numAvailByte); + if (numAvailByte > 0) { + numBytesToRead = numAvailByte > 32 ? 32 : numAvailByte; + numBytesRead = CDC_RdOutBuf (&serBuf[0], &numBytesToRead); +#if PORT_NUM + ser_Write (1, &serBuf[0], &numBytesRead); +#else + ser_Write (0, &serBuf[0], &numBytesRead); +#endif + } + +} + + +/*---------------------------------------------------------------------------- + checks the serial state and initiates notification + *---------------------------------------------------------------------------*/ +void VCOM_CheckSerialState (void) { + unsigned short temp; + static unsigned short serialState; + + temp = CDC_GetSerialState(); + if (serialState != temp) { + serialState = temp; + CDC_NotificationIn(); // send SERIAL_STATE notification + } +} + +/* + * @} + */ diff --git a/new_cmsis/usb/vcomdemo.h b/new_cmsis/usb/vcom.h similarity index 92% rename from new_cmsis/usb/vcomdemo.h rename to new_cmsis/usb/vcom.h index 75cbbd8..e9157ae 100755 --- a/new_cmsis/usb/vcomdemo.h +++ b/new_cmsis/usb/vcom.h @@ -1,31 +1,35 @@ -/*---------------------------------------------------------------------------- - * Name: vcomdemo.h - * Purpose: USB virtual COM port Demo Definitions - * Version: V1.02 - *---------------------------------------------------------------------------- - * This software is supplied "AS IS" without any warranties, express, - * implied or statutory, including but not limited to the implied - * warranties of fitness for purpose, satisfactory quality and - * noninfringement. Keil extends you a royalty-free right to reproduce - * and distribute executable files created using this software for use - * on NXP Semiconductors LPC microcontroller devices only. Nothing else - * gives you the right to use this software. - * - * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -/* Push Button Definitions */ -#define S2 0x00000400 /* P2.10 */ - -/* LED Definitions */ -#define LED1 0x00000001 /* P2.00 */ -#define LED2 0x00000002 /* P2.01 */ -#define LED3 0x00000004 /* P2.02 */ -#define LED4 0x00000008 /* P2.03 */ -#define LED5 0x00000010 /* P2.04 */ -#define LED6 0x00000020 /* P2.05 */ -#define LED7 0x00000040 /* P2.06 */ -#define LED8 0x00000080 /* P2.07 */ - -#define LEDMSK 0x000000FF /* P2.0..7 */ - +/*---------------------------------------------------------------------------- + * Name: vcomdemo.h + * Purpose: USB virtual COM port Demo Definitions + * Version: V1.02 + *---------------------------------------------------------------------------- + * This software is supplied "AS IS" without any warranties, express, + * implied or statutory, including but not limited to the implied + * warranties of fitness for purpose, satisfactory quality and + * noninfringement. Keil extends you a royalty-free right to reproduce + * and distribute executable files created using this software for use + * on NXP Semiconductors LPC microcontroller devices only. Nothing else + * gives you the right to use this software. + * + * Copyright (c) 2009 Keil - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +/* Push Button Definitions */ +#define S2 0x00000400 /* P2.10 */ + +/* LED Definitions */ +#define LED1 0x00000001 /* P2.00 */ +#define LED2 0x00000002 /* P2.01 */ +#define LED3 0x00000004 /* P2.02 */ +#define LED4 0x00000008 /* P2.03 */ +#define LED5 0x00000010 /* P2.04 */ +#define LED6 0x00000020 /* P2.05 */ +#define LED7 0x00000040 /* P2.06 */ +#define LED8 0x00000080 /* P2.07 */ + +#define LEDMSK 0x000000FF /* P2.0..7 */ + +void VCOM_Init(void); +void VCOM_Serial2Usb(void); +void VCOM_Usb2Serial(void); +void VCOM_CheckSerialState (void);