-//*****************************************************************************\r
-//\r
-// startup_gcc.c - Startup code for use with GNU tools.\r
-//\r
-// Copyright (c) 2009 Luminary Micro, Inc. All rights reserved.\r
-// Software License Agreement\r
-// \r
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and\r
-// exclusively on LMI's microcontroller products.\r
-// \r
-// The software is owned by LMI and/or its suppliers, and is protected under\r
-// applicable copyright laws. All rights are reserved. You may not combine\r
-// this software with "viral" open-source software in order to form a larger\r
-// program. Any use in violation of the foregoing restrictions may subject\r
-// the user to criminal sanctions under applicable laws, as well as to civil\r
-// liability for the breach of the terms and conditions of this license.\r
-// \r
-// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
-// \r
-// This is part of revision 32 of the Stellaris CMSIS Package.\r
-//\r
-//*****************************************************************************\r
-\r
-#define WEAK __attribute__ ((weak))\r
-\r
-//*****************************************************************************\r
-//\r
-// Forward declaration of the default fault handlers.\r
-//\r
-//*****************************************************************************\r
-void WEAK Reset_Handler(void);\r
-static void Default_Handler(void);\r
-void WEAK NMI_Handler(void);\r
-void WEAK HardFault_Handler(void);\r
-void WEAK MemManage_Handler(void);\r
-void WEAK BusFault_Handler(void);\r
-void WEAK UsageFault_Handler(void);\r
-void WEAK MemManage_Handler(void);\r
-void WEAK SVC_Handler(void);\r
-void WEAK DebugMon_Handler(void);\r
-void WEAK PendSV_Handler(void);\r
-void WEAK SysTick_Handler(void);\r
-void WEAK GPIOPortA_IRQHandler(void);\r
-void WEAK GPIOPortB_IRQHandler(void);\r
-void WEAK GPIOPortC_IRQHandler(void);\r
-void WEAK GPIOPortD_IRQHandler(void);\r
-void WEAK GPIOPortE_IRQHandler(void);\r
-void WEAK UART0_IRQHandler(void);\r
-void WEAK UART1_IRQHandler(void);\r
-void WEAK SSI0_IRQHandler(void);\r
-void WEAK I2C0_IRQHandler(void);\r
-void WEAK PWMFault_IRQHandler(void);\r
-void WEAK PWMGen0_IRQHandler(void);\r
-void WEAK PWMGen1_IRQHandler(void);\r
-void WEAK PWMGen2_IRQHandler(void);\r
-void WEAK QEI0_IRQHandler(void);\r
-void WEAK ADCSeq0_IRQHandler(void);\r
-void WEAK ADCSeq1_IRQHandler(void);\r
-void WEAK ADCSeq2_IRQHandler(void);\r
-void WEAK ADCSeq3_IRQHandler(void);\r
-void WEAK Watchdog_IRQHandler(void);\r
-void WEAK Timer0A_IRQHandler(void);\r
-void WEAK Timer0B_IRQHandler(void);\r
-void WEAK Timer1A_IRQHandler(void);\r
-void WEAK Timer1B_IRQHandler(void);\r
-void WEAK Timer2A_IRQHandler(void);\r
-void WEAK Timer2B_IRQHandler(void);\r
-void WEAK Comp0_IRQHandler(void);\r
-void WEAK Comp1_IRQHandler(void);\r
-void WEAK Comp2_IRQHandler(void);\r
-void WEAK SysCtrl_IRQHandler(void);\r
-void WEAK FlashCtrl_IRQHandler(void);\r
-void WEAK GPIOPortF_IRQHandler(void);\r
-void WEAK GPIOPortG_IRQHandler(void);\r
-void WEAK GPIOPortH_IRQHandler(void);\r
-void WEAK UART2_IRQHandler(void);\r
-void WEAK SSI1_IRQHandler(void);\r
-void WEAK Timer3A_IRQHandler(void);\r
-void WEAK Timer3B_IRQHandler(void);\r
-void WEAK I2C1_IRQHandler(void);\r
-void WEAK QEI1_IRQHandler(void);\r
-void WEAK CAN0_IRQHandler(void);\r
-void WEAK CAN1_IRQHandler(void);\r
-void WEAK CAN2_IRQHandler(void);\r
-void WEAK Ethernet_IRQHandler(void);\r
-void WEAK Hibernate_IRQHandler(void);\r
-\r
-//*****************************************************************************\r
-//\r
-// The entry point for the application.\r
-//\r
-//*****************************************************************************\r
-extern int main(void);\r
-\r
-//*****************************************************************************\r
-//\r
-// Reserve space for the system stack.\r
-//\r
-//*****************************************************************************\r
-static unsigned long pulStack[64];\r
-\r
-//*****************************************************************************\r
-//\r
-// The vector table. Note that the proper constructs must be placed on this to\r
-// ensure that it ends up at physical address 0x0000.0000.\r
-//\r
-//*****************************************************************************\r
-__attribute__ ((section(".isr_vector")))\r
-void (* const g_pfnVectors[])(void) =\r
-{\r
- (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)),\r
- // The initial stack pointer\r
- Reset_Handler, // The reset handler\r
- NMI_Handler, // The NMI handler\r
- HardFault_Handler, // The hard fault handler\r
- MemManage_Handler, // The MPU fault handler\r
- BusFault_Handler, // The bus fault handler\r
- UsageFault_Handler, // The usage fault handler\r
- 0xeffff74e, // Reserved\r
- 0, // Reserved\r
- 0, // Reserved\r
- 0, // Reserved\r
- SVC_Handler, // SVCall handler\r
- DebugMon_Handler, // Debug monitor handler\r
- 0, // Reserved\r
- PendSV_Handler, // The PendSV handler\r
- SysTick_Handler, // The SysTick handler\r
-\r
- //\r
- // External Interrupts\r
- //\r
- GPIOPortA_IRQHandler, // GPIO Port A\r
- GPIOPortB_IRQHandler, // GPIO Port B\r
- GPIOPortC_IRQHandler, // GPIO Port C\r
- GPIOPortD_IRQHandler, // GPIO Port D\r
- GPIOPortE_IRQHandler, // GPIO Port E\r
- UART0_IRQHandler, // UART0 Rx and Tx\r
- UART1_IRQHandler, // UART1 Rx and Tx\r
- SSI0_IRQHandler, // SSI0 Rx and Tx\r
- I2C0_IRQHandler, // I2C0 Master and Slave\r
- PWMFault_IRQHandler, // PWM Fault\r
- PWMGen0_IRQHandler, // PWM Generator 0\r
- PWMGen1_IRQHandler, // PWM Generator 1\r
- PWMGen2_IRQHandler, // PWM Generator 2\r
- QEI0_IRQHandler, // Quadrature Encoder 0\r
- ADCSeq0_IRQHandler, // ADC Sequence 0\r
- ADCSeq1_IRQHandler, // ADC Sequence 1\r
- ADCSeq2_IRQHandler, // ADC Sequence 2\r
- ADCSeq3_IRQHandler, // ADC Sequence 3\r
- Watchdog_IRQHandler, // Watchdog timer\r
- Timer0A_IRQHandler, // Timer 0 subtimer A\r
- Timer0B_IRQHandler, // Timer 0 subtimer B\r
- Timer1A_IRQHandler, // Timer 1 subtimer A\r
- Timer1B_IRQHandler, // Timer 1 subtimer B\r
- Timer2A_IRQHandler, // Timer 2 subtimer A\r
- Timer2B_IRQHandler, // Timer 2 subtimer B\r
- Comp0_IRQHandler, // Analog Comparator 0\r
- Comp1_IRQHandler, // Analog Comparator 1\r
- Comp2_IRQHandler, // Analog Comparator 2\r
- SysCtrl_IRQHandler, // System Control (PLL, OSC, BO)\r
- FlashCtrl_IRQHandler, // FLASH Control\r
- GPIOPortF_IRQHandler, // GPIO Port F\r
- GPIOPortG_IRQHandler, // GPIO Port G\r
- GPIOPortH_IRQHandler, // GPIO Port H\r
- UART2_IRQHandler, // UART2 Rx and Tx\r
- SSI1_IRQHandler, // SSI1 Rx and Tx\r
- Timer3A_IRQHandler, // Timer 3 subtimer A\r
- Timer3B_IRQHandler, // Timer 3 subtimer B\r
- I2C1_IRQHandler, // I2C1 Master and Slave\r
- QEI1_IRQHandler, // Quadrature Encoder 1\r
- CAN0_IRQHandler, // CAN0\r
- CAN1_IRQHandler, // CAN1\r
- CAN2_IRQHandler, // CAN2\r
- Ethernet_IRQHandler, // Ethernet\r
- Hibernate_IRQHandler // Hibernate\r
-};\r
-\r
-//*****************************************************************************\r
-//\r
-// The following are constructs created by the linker, indicating where the\r
-// the "data" and "bss" segments reside in memory. The initializers for the\r
-// for the "data" segment resides immediately following the "text" segment.\r
-//\r
-//*****************************************************************************\r
-extern unsigned long _etext;\r
-extern unsigned long _sdata;\r
-extern unsigned long _edata;\r
-extern unsigned long _sbss;\r
-extern unsigned long _ebss;\r
-\r
-//*****************************************************************************\r
-//\r
-// This is the code that gets called when the processor first starts execution\r
-// following a reset event. Only the absolutely necessary set is performed,\r
-// after which the application supplied entry() routine is called. Any fancy\r
-// actions (such as making decisions based on the reset cause register, and\r
-// resetting the bits in that register) are left solely in the hands of the\r
-// application.\r
-//\r
-//*****************************************************************************\r
-void\r
-Reset_Handler(void)\r
-{\r
- unsigned long *pulSrc, *pulDest;\r
-\r
- //\r
- // Copy the data segment initializers from flash to SRAM.\r
- //\r
- pulSrc = &_etext;\r
- for(pulDest = &_sdata; pulDest < &_edata; )\r
- {\r
- *pulDest++ = *pulSrc++;\r
- }\r
-\r
- //\r
- // Zero fill the bss segment. This is done with inline assembly since this\r
- // will clear the value of pulDest if it is not kept in a register.\r
- //\r
- __asm(" ldr r0, =_sbss\n"\r
- " ldr r1, =_ebss\n"\r
- " mov r2, #0\n"\r
- " .thumb_func\n"\r
- "zero_loop:\n"\r
- " cmp r0, r1\n"\r
- " it lt\n"\r
- " strlt r2, [r0], #4\n"\r
- " blt zero_loop");\r
-\r
- //\r
- // Call the application's entry point.\r
- //\r
- main();\r
-}\r
-\r
-//*****************************************************************************\r
-//\r
-// Provide weak aliases for each Exception handler to the Default_Handler.\r
-// As they are weak aliases, any function with the same name will override\r
-// this definition.\r
-//\r
-//*****************************************************************************\r
-#pragma weak NMI_Handler = Default_Handler\r
-#pragma weak HardFault_Handler = Default_Handler\r
-#pragma weak MemManage_Handler = Default_Handler\r
-#pragma weak BusFault_Handler = Default_Handler\r
-#pragma weak UsageFault_Handler = Default_Handler\r
-#pragma weak SVC_Handler = Default_Handler\r
-#pragma weak DebugMon_Handler = Default_Handler\r
-#pragma weak PendSV_Handler = Default_Handler\r
-#pragma weak SysTick_Handler = Default_Handler\r
-#pragma weak GPIOPortA_IRQHandler = Default_Handler\r
-#pragma weak GPIOPortB_IRQHandler = Default_Handler\r
-#pragma weak GPIOPortC_IRQHandler = Default_Handler\r
-#pragma weak GPIOPortD_IRQHandler = Default_Handler\r
-#pragma weak GPIOPortE_IRQHandler = Default_Handler\r
-#pragma weak UART0_IRQHandler = Default_Handler\r
-#pragma weak UART1_IRQHandler = Default_Handler\r
-#pragma weak SSI0_IRQHandler = Default_Handler\r
-#pragma weak I2C0_IRQHandler = Default_Handler\r
-#pragma weak PWMFault_IRQHandler = Default_Handler\r
-#pragma weak PWMGen0_IRQHandler = Default_Handler\r
-#pragma weak PWMGen1_IRQHandler = Default_Handler\r
-#pragma weak PWMGen2_IRQHandler = Default_Handler\r
-#pragma weak QEI0_IRQHandler = Default_Handler\r
-#pragma weak ADCSeq0_IRQHandler = Default_Handler\r
-#pragma weak ADCSeq1_IRQHandler = Default_Handler\r
-#pragma weak ADCSeq2_IRQHandler = Default_Handler\r
-#pragma weak ADCSeq3_IRQHandler = Default_Handler\r
-#pragma weak Watchdog_IRQHandler = Default_Handler\r
-#pragma weak Timer0A_IRQHandler = Default_Handler\r
-#pragma weak Timer0B_IRQHandler = Default_Handler\r
-#pragma weak Timer1A_IRQHandler = Default_Handler\r
-#pragma weak Timer1B_IRQHandler = Default_Handler\r
-#pragma weak Timer2A_IRQHandler = Default_Handler\r
-#pragma weak Timer2B_IRQHandler = Default_Handler\r
-#pragma weak Comp0_IRQHandler = Default_Handler\r
-#pragma weak Comp1_IRQHandler = Default_Handler\r
-#pragma weak Comp2_IRQHandler = Default_Handler\r
-#pragma weak SysCtrl_IRQHandler = Default_Handler\r
-#pragma weak FlashCtrl_IRQHandler = Default_Handler\r
-#pragma weak GPIOPortF_IRQHandler = Default_Handler\r
-#pragma weak GPIOPortG_IRQHandler = Default_Handler\r
-#pragma weak GPIOPortH_IRQHandler = Default_Handler\r
-#pragma weak UART2_IRQHandler = Default_Handler\r
-#pragma weak SSI1_IRQHandler = Default_Handler\r
-#pragma weak Timer3A_IRQHandler = Default_Handler\r
-#pragma weak Timer3B_IRQHandler = Default_Handler\r
-#pragma weak I2C1_IRQHandler = Default_Handler\r
-#pragma weak QEI1_IRQHandler = Default_Handler\r
-#pragma weak CAN0_IRQHandler = Default_Handler\r
-#pragma weak CAN1_IRQHandler = Default_Handler\r
-#pragma weak CAN2_IRQHandler = Default_Handler\r
-#pragma weak Ethernet_IRQHandler = Default_Handler\r
-#pragma weak Hibernate_IRQHandler = Default_Handler\r
-\r
-//*****************************************************************************\r
-//\r
-// This is the code that gets called when the processor receives an unexpected\r
-// interrupt. This simply enters an infinite loop, preserving the system state\r
-// for examination by a debugger.\r
-//\r
-//*****************************************************************************\r
-static void\r
-Default_Handler(void)\r
-{\r
- //\r
- // Go into an infinite loop.\r
- //\r
- while(1)\r
- {\r
- }\r
-}\r
+//*****************************************************************************
+//
+// startup_gcc.c - Startup code for use with GNU tools.
+//
+// Copyright (c) 2009 Luminary Micro, Inc. All rights reserved.
+// Software License Agreement
+//
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+// exclusively on LMI's microcontroller products.
+//
+// The software is owned by LMI and/or its suppliers, and is protected under
+// applicable copyright laws. All rights are reserved. You may not combine
+// this software with "viral" open-source software in order to form a larger
+// program. Any use in violation of the foregoing restrictions may subject
+// the user to criminal sanctions under applicable laws, as well as to civil
+// liability for the breach of the terms and conditions of this license.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+// This is part of revision 32 of the Stellaris CMSIS Package.
+//
+//*****************************************************************************
+
+#define WEAK __attribute__ ((weak))
+
+//*****************************************************************************
+//
+// Forward declaration of the default fault handlers.
+//
+//*****************************************************************************
+void WEAK Reset_Handler(void);
+static void Default_Handler(void);
+void WEAK NMI_Handler(void);
+void WEAK HardFault_Handler(void);
+void WEAK MemManage_Handler(void);
+void WEAK BusFault_Handler(void);
+void WEAK UsageFault_Handler(void);
+void WEAK MemManage_Handler(void);
+void WEAK SVC_Handler(void);
+void WEAK DebugMon_Handler(void);
+void WEAK PendSV_Handler(void);
+void WEAK SysTick_Handler(void);
+
+void WEAK WDT_IRQHandler(void);
+void WEAK TIMER0_IRQHandler(void);
+void WEAK TIMER1_IRQHandler(void);
+void WEAK TIMER2_IRQHandler(void);
+void WEAK TIMER3_IRQHandler(void);
+void WEAK UART0_IRQHandler(void);
+void WEAK UART1_IRQHandler(void);
+void WEAK UART2_IRQHandler(void);
+void WEAK UART3_IRQHandler(void);
+void WEAK PWM1_IRQHandler(void);
+void WEAK I2C0_IRQHandler(void);
+void WEAK I2C1_IRQHandler(void);
+void WEAK I2C2_IRQHandler(void);
+void WEAK SPI_IRQHandler(void);
+void WEAK SSP0_IRQHandler(void);
+void WEAK SSP1_IRQHandler(void);
+void WEAK PLL0_IRQHandler(void);
+void WEAK RTC_IRQHandler(void);
+void WEAK EINT0_IRQHandler(void);
+void WEAK EINT1_IRQHandler(void);
+void WEAK EINT2_IRQHandler(void);
+void WEAK EINT3_IRQHandler(void);
+void WEAK ADC_IRQHandler(void);
+void WEAK BOD_IRQHandler(void);
+void WEAK USB_IRQHandler(void);
+void WEAK CAN_IRQHandler(void);
+void WEAK DMA_IRQHandler(void);
+void WEAK I2S_IRQHandler(void);
+void WEAK ENET_IRQHandler(void);
+void WEAK RIT_IRQHandler(void);
+void WEAK MCPWM_IRQHandler(void);
+void WEAK QEI_IRQHandler(void);
+void WEAK PLL1_IRQHandler(void);
+void WEAK USBActivity_IRQHandler(void);
+void WEAK CANActivity_IRQHandler(void);
+
+//*****************************************************************************
+//
+// The entry point for the application.
+//
+//*****************************************************************************
+extern int main(void);
+
+//*****************************************************************************
+//
+// Reserve space for the system stack.
+//
+//*****************************************************************************
+static unsigned long pulStack[64];
+
+//*****************************************************************************
+//
+// The vector table. Note that the proper constructs must be placed on this to
+// ensure that it ends up at physical address 0x0000.0000.
+//
+//*****************************************************************************
+__attribute__ ((section(".isr_vector")))
+void (* const g_pfnVectors[])(void) =
+{
+ (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)),
+ // The initial stack pointer
+ Reset_Handler, // The reset handler
+ NMI_Handler, // The NMI handler
+ HardFault_Handler, // The hard fault handler
+ MemManage_Handler, // The MPU fault handler
+ BusFault_Handler, // The bus fault handler
+ UsageFault_Handler, // The usage fault handler
+ 0xeffffcbf, // Interrupt CRC
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ SVC_Handler, // SVCall handler
+ DebugMon_Handler, // Debug monitor handler
+ 0, // Reserved
+ PendSV_Handler, // The PendSV handler
+ SysTick_Handler, // The SysTick handler
+
+ //
+ // External Interrupts
+ //
+ WDT_IRQHandler, /* 16: Watchdog Timer */
+ TIMER0_IRQHandler, /* 17: Timer0 */
+ TIMER1_IRQHandler, /* 18: Timer1 */
+ TIMER2_IRQHandler, /* 19: Timer2 */
+ TIMER3_IRQHandler, /* 20: Timer3 */
+ UART0_IRQHandler, /* 21: UART0 */
+ UART1_IRQHandler, /* 22: UART1 */
+ UART2_IRQHandler, /* 23: UART2 */
+ UART3_IRQHandler, /* 24: UART3 */
+ PWM1_IRQHandler, /* 25: PWM1 */
+ I2C0_IRQHandler, /* 26: I2C0 */
+ I2C1_IRQHandler, /* 27: I2C1 */
+ I2C2_IRQHandler, /* 28: I2C2 */
+ SPI_IRQHandler, /* 29: SPI */
+ SSP0_IRQHandler, /* 30: SSP0 */
+ SSP1_IRQHandler, /* 31: SSP1 */
+ PLL0_IRQHandler, /* 32: PLL0 Lock (Main PLL) */
+ RTC_IRQHandler, /* 33: Real Time Clock */
+ EINT0_IRQHandler, /* 34: External Interrupt 0 */
+ EINT1_IRQHandler, /* 35: External Interrupt 1 */
+ EINT2_IRQHandler, /* 36: External Interrupt 2 */
+ EINT3_IRQHandler, /* 37: External Interrupt 3 */
+ ADC_IRQHandler, /* 38: A/D Converter */
+ BOD_IRQHandler, /* 39: Brown-Out Detect */
+ USB_IRQHandler, /* 40: USB */
+ CAN_IRQHandler, /* 41: CAN */
+ DMA_IRQHandler, /* 42: General Purpose DMA */
+ I2S_IRQHandler, /* 43: I2S */
+ ENET_IRQHandler, /* 44: Ethernet */
+ RIT_IRQHandler, /* 45: Repetitive Interrupt Timer */
+ MCPWM_IRQHandler, /* 46: Motor Control PWM */
+ QEI_IRQHandler, /* 47: Quadrature Encoder Interface */
+ PLL1_IRQHandler, /* 48: PLL1 Lock (USB PLL) */
+ USBActivity_IRQHandler, /* 49: USB Activity interrupt to wakeup */
+ CANActivity_IRQHandler /* 50: CAN Activity interrupt to wakeup */
+};
+
+//*****************************************************************************
+//
+// The following are constructs created by the linker, indicating where the
+// the "data" and "bss" segments reside in memory. The initializers for the
+// for the "data" segment resides immediately following the "text" segment.
+//
+//*****************************************************************************
+extern unsigned long _etext;
+extern unsigned long _sdata;
+extern unsigned long _edata;
+extern unsigned long _sbss;
+extern unsigned long _ebss;
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor first starts execution
+// following a reset event. Only the absolutely necessary set is performed,
+// after which the application supplied entry() routine is called. Any fancy
+// actions (such as making decisions based on the reset cause register, and
+// resetting the bits in that register) are left solely in the hands of the
+// application.
+//
+//*****************************************************************************
+void
+Reset_Handler(void)
+{
+ unsigned long *pulSrc, *pulDest;
+
+ //
+ // Copy the data segment initializers from flash to SRAM.
+ //
+ pulSrc = &_etext;
+ for(pulDest = &_sdata; pulDest < &_edata; )
+ {
+ *pulDest++ = *pulSrc++;
+ }
+
+ //
+ // Zero fill the bss segment. This is done with inline assembly since this
+ // will clear the value of pulDest if it is not kept in a register.
+ //
+ __asm(" ldr r0, =_sbss\n"
+ " ldr r1, =_ebss\n"
+ " mov r2, #0\n"
+ " .thumb_func\n"
+ "zero_loop:\n"
+ " cmp r0, r1\n"
+ " it lt\n"
+ " strlt r2, [r0], #4\n"
+ " blt zero_loop");
+
+ //
+ // Call the application's entry point.
+ //
+ main();
+}
+
+//*****************************************************************************
+//
+// Provide weak aliases for each Exception handler to the Default_Handler.
+// As they are weak aliases, any function with the same name will override
+// this definition.
+//
+//*****************************************************************************
+#pragma weak WDT_IRQHandler = Default_Handler
+#pragma weak TIMER0_IRQHandler = Default_Handler
+#pragma weak TIMER1_IRQHandler = Default_Handler
+#pragma weak TIMER2_IRQHandler = Default_Handler
+#pragma weak TIMER3_IRQHandler = Default_Handler
+#pragma weak UART0_IRQHandler = Default_Handler
+#pragma weak UART1_IRQHandler = Default_Handler
+#pragma weak UART2_IRQHandler = Default_Handler
+#pragma weak UART3_IRQHandler = Default_Handler
+#pragma weak PWM1_IRQHandler = Default_Handler
+#pragma weak I2C0_IRQHandler = Default_Handler
+#pragma weak I2C1_IRQHandler = Default_Handler
+#pragma weak I2C2_IRQHandler = Default_Handler
+#pragma weak SPI_IRQHandler = Default_Handler
+#pragma weak SSP0_IRQHandler = Default_Handler
+#pragma weak SSP1_IRQHandler = Default_Handler
+#pragma weak PLL0_IRQHandler = Default_Handler
+#pragma weak RTC_IRQHandler = Default_Handler
+#pragma weak EINT0_IRQHandler = Default_Handler
+#pragma weak EINT1_IRQHandler = Default_Handler
+#pragma weak EINT2_IRQHandler = Default_Handler
+#pragma weak EINT3_IRQHandler = Default_Handler
+#pragma weak ADC_IRQHandler = Default_Handler
+#pragma weak BOD_IRQHandler = Default_Handler
+#pragma weak USB_IRQHandler = Default_Handler
+#pragma weak CAN_IRQHandler = Default_Handler
+#pragma weak DMA_IRQHandler = Default_Handler
+#pragma weak I2S_IRQHandler = Default_Handler
+#pragma weak ENET_IRQHandler = Default_Handler
+#pragma weak RIT_IRQHandler = Default_Handler
+#pragma weak MCPWM_IRQHandler = Default_Handler
+#pragma weak QEI_IRQHandler = Default_Handler
+#pragma weak PPL1_IRQHandler = Default_Handler
+#pragma weak USBActivity_IRQHandler = Default_Handler
+#pragma weak CANActivity_IRQHandler = Default_Handler
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives an unexpected
+// interrupt. This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+static void
+Default_Handler(void)
+{
+ //
+ // Go into an infinite loop.
+ //
+ while(1)
+ {
+ }
+}
git.asbjorn.biz / rapper.git / blobdiff